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[2a01:c23:c046:3500::e63]) by smtp.googlemail.com with ESMTPSA id 18-20020a170906211200b00779cde476e4sm10748721ejt.62.2022.10.20.14.03.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 14:03:42 -0700 (PDT) From: Martin Blumenstingl To: linux@roeck-us.net, linux-hwmon@vger.kernel.org Cc: jdelvare@suse.com, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [RFC PATCH v2 1/4] hwmon: (jc42) Convert register access to use an I2C regmap Date: Thu, 20 Oct 2022 23:03:17 +0200 Message-Id: <20221020210320.1624617-2-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221020210320.1624617-1-martin.blumenstingl@googlemail.com> References: <20221020210320.1624617-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747242225707568453?= X-GMAIL-MSGID: =?utf-8?q?1747242225707568453?= Switch the jc42 driver to use an I2C regmap to access the registers. This is done in preparation for improving the caching of registers and to restore the cached limits during system resume. Signed-off-by: Martin Blumenstingl --- drivers/hwmon/Kconfig | 1 + drivers/hwmon/jc42.c | 102 +++++++++++++++++++++++++----------------- 2 files changed, 63 insertions(+), 40 deletions(-) diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 7ac3daaf59ce..d3bccc8176c5 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -799,6 +799,7 @@ config SENSORS_IT87 config SENSORS_JC42 tristate "JEDEC JC42.4 compliant memory module temperature sensors" depends on I2C + select REGMAP_I2C help If you say yes here, you get support for JEDEC JC42.4 compliant temperature sensors, which are used on many DDR3 memory modules for diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c index 30888feaf589..329a80264556 100644 --- a/drivers/hwmon/jc42.c +++ b/drivers/hwmon/jc42.c @@ -19,6 +19,7 @@ #include #include #include +#include /* Addresses to scan */ static const unsigned short normal_i2c[] = { @@ -216,7 +217,7 @@ static const u8 temp_regs[t_num_temp] = { /* Each client has this additional data */ struct jc42_data { - struct i2c_client *client; + struct regmap *regmap; struct mutex update_lock; /* protect register access */ bool extended; /* true if extended range supported */ bool valid; @@ -251,19 +252,16 @@ static int jc42_temp_from_reg(s16 reg) static struct jc42_data *jc42_update_device(struct device *dev) { struct jc42_data *data = dev_get_drvdata(dev); - struct i2c_client *client = data->client; - struct jc42_data *ret = data; - int i, val; + unsigned int i, val; + int ret; mutex_lock(&data->update_lock); if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { for (i = 0; i < t_num_temp; i++) { - val = i2c_smbus_read_word_swapped(client, temp_regs[i]); - if (val < 0) { - ret = ERR_PTR(val); + ret = regmap_read(data->regmap, temp_regs[i], &val); + if (ret) goto abort; - } data->temp[i] = val; } data->last_updated = jiffies; @@ -271,7 +269,7 @@ static struct jc42_data *jc42_update_device(struct device *dev) } abort: mutex_unlock(&data->update_lock); - return ret; + return ret ? ERR_PTR(ret) : data; } static int jc42_read(struct device *dev, enum hwmon_sensor_types type, @@ -326,7 +324,6 @@ static int jc42_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) { struct jc42_data *data = dev_get_drvdata(dev); - struct i2c_client *client = data->client; int diff, hyst; int ret; @@ -335,18 +332,18 @@ static int jc42_write(struct device *dev, enum hwmon_sensor_types type, switch (attr) { case hwmon_temp_min: data->temp[t_min] = jc42_temp_to_reg(val, data->extended); - ret = i2c_smbus_write_word_swapped(client, temp_regs[t_min], - data->temp[t_min]); + ret = regmap_write(data->regmap, temp_regs[t_min], + data->temp[t_min]); break; case hwmon_temp_max: data->temp[t_max] = jc42_temp_to_reg(val, data->extended); - ret = i2c_smbus_write_word_swapped(client, temp_regs[t_max], - data->temp[t_max]); + ret = regmap_write(data->regmap, temp_regs[t_max], + data->temp[t_max]); break; case hwmon_temp_crit: data->temp[t_crit] = jc42_temp_to_reg(val, data->extended); - ret = i2c_smbus_write_word_swapped(client, temp_regs[t_crit], - data->temp[t_crit]); + ret = regmap_write(data->regmap, temp_regs[t_crit], + data->temp[t_crit]); break; case hwmon_temp_crit_hyst: /* @@ -368,9 +365,8 @@ static int jc42_write(struct device *dev, enum hwmon_sensor_types type, } data->config = (data->config & ~JC42_CFG_HYST_MASK) | (hyst << JC42_CFG_HYST_SHIFT); - ret = i2c_smbus_write_word_swapped(data->client, - JC42_REG_CONFIG, - data->config); + ret = regmap_write(data->regmap, JC42_REG_CONFIG, + data->config); break; default: ret = -EOPNOTSUPP; @@ -470,51 +466,79 @@ static const struct hwmon_chip_info jc42_chip_info = { .info = jc42_info, }; +static bool jc42_readable_reg(struct device *dev, unsigned int reg) +{ + return (reg >= JC42_REG_CAP && reg <= JC42_REG_DEVICEID) || + reg == JC42_REG_SMBUS; +} + +static bool jc42_writable_reg(struct device *dev, unsigned int reg) +{ + return (reg >= JC42_REG_CONFIG && reg <= JC42_REG_TEMP_CRITICAL) || + reg == JC42_REG_SMBUS; +} + +static bool jc42_volatile_reg(struct device *dev, unsigned int reg) +{ + return reg == JC42_REG_CONFIG || reg == JC42_REG_TEMP; +} + +static const struct regmap_config jc42_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .val_format_endian = REGMAP_ENDIAN_BIG, + .max_register = JC42_REG_SMBUS, + .writeable_reg = jc42_writable_reg, + .readable_reg = jc42_readable_reg, + .volatile_reg = jc42_volatile_reg, +}; + static int jc42_probe(struct i2c_client *client) { struct device *dev = &client->dev; struct device *hwmon_dev; + unsigned int config, cap; struct jc42_data *data; - int config, cap; + int ret; data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL); if (!data) return -ENOMEM; - data->client = client; + data->regmap = devm_regmap_init_i2c(client, &jc42_regmap_config); + if (IS_ERR(data->regmap)) + return PTR_ERR(data->regmap); + i2c_set_clientdata(client, data); mutex_init(&data->update_lock); - cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP); - if (cap < 0) - return cap; + ret = regmap_read(data->regmap, JC42_REG_CAP, &cap); + if (ret) + return ret; data->extended = !!(cap & JC42_CAP_RANGE); if (device_property_read_bool(dev, "smbus-timeout-disable")) { - int smbus; - /* * Not all chips support this register, but from a * quick read of various datasheets no chip appears * incompatible with the below attempt to disable * the timeout. And the whole thing is opt-in... */ - smbus = i2c_smbus_read_word_swapped(client, JC42_REG_SMBUS); - if (smbus < 0) - return smbus; - i2c_smbus_write_word_swapped(client, JC42_REG_SMBUS, - smbus | SMBUS_STMOUT); + ret = regmap_set_bits(data->regmap, JC42_REG_SMBUS, + SMBUS_STMOUT); + if (ret) + return ret; } - config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG); - if (config < 0) - return config; + ret = regmap_read(data->regmap, JC42_REG_CONFIG, &config); + if (ret) + return ret; data->orig_config = config; if (config & JC42_CFG_SHUTDOWN) { config &= ~JC42_CFG_SHUTDOWN; - i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config); + regmap_write(data->regmap, JC42_REG_CONFIG, config); } data->config = config; @@ -535,7 +559,7 @@ static void jc42_remove(struct i2c_client *client) config = (data->orig_config & ~JC42_CFG_HYST_MASK) | (data->config & JC42_CFG_HYST_MASK); - i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config); + regmap_write(data->regmap, JC42_REG_CONFIG, config); } } @@ -546,8 +570,7 @@ static int jc42_suspend(struct device *dev) struct jc42_data *data = dev_get_drvdata(dev); data->config |= JC42_CFG_SHUTDOWN; - i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG, - data->config); + regmap_write(data->regmap, JC42_REG_CONFIG, data->config); return 0; } @@ -556,8 +579,7 @@ static int jc42_resume(struct device *dev) struct jc42_data *data = dev_get_drvdata(dev); data->config &= ~JC42_CFG_SHUTDOWN; - i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG, - data->config); + regmap_write(data->regmap, JC42_REG_CONFIG, data->config); return 0; } From patchwork Thu Oct 20 21:03:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 6401 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4242:0:0:0:0:0 with SMTP id s2csp322740wrr; Thu, 20 Oct 2022 14:05:38 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4pbvd4oij2DSe6XiTBxFdicr2B6niC0Z0cdXjfUzpiN8sOd4O27S/dhmU+i/8w38OKZf7X X-Received: by 2002:a17:907:75f2:b0:78d:49a6:5052 with SMTP id jz18-20020a17090775f200b0078d49a65052mr12260035ejc.680.1666299937873; Thu, 20 Oct 2022 14:05:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666299937; cv=none; d=google.com; s=arc-20160816; b=Z5qNmuNctPe/wHvr04LS2p3akLgb/A5rzpg353dkzQ1qTMrGnlCnDGn7n0u5mkCxbY stt8Lr7ddr8FtMq5tAuR6diXrT6QnuompFK/90ZQDJPg0ZTX15ISeiRz/RbWUN1E14P9 bLP8OA59DQtJ2JEhNj7BHR111N+bYHDg04btKxR5LCcIjuITKUYj1pbuZXwUytZrUstQ 9Owb3qAGyaQh72IV+gfeJ2mW5WHJ66PwCLaRJ9NdAYxVLOMTbVk/6d0ltllTeeNFUUlu t9pqL3UMi3kW2S+vImks5by/6kYQdxiLUowP05pRU1VY/jUZGmyz9r5T7kC9uwo/8mRY C4fw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=91jTp+vVBC1xOtBKmUzVXsrC90O9nlN7ucaxFP7eflw=; b=Mc8rfKC0P/b8qOIxHl9jB9E4itRA/p4+oN5/5SIg0vYPc9QRVPUXtl1+RF0ZIymV2O VUlXnCyq9bX6oExNPYu2OtDhfpQjHRJ9qwFquL/TWKDN5sM8ja+cCN+XjPDtLLvx8/xK GzhhuGPVj+YONxdyGRAHzjYu3nVGg/7HD31/x8JlYrZh3mOuCOAKfBRZw+Thddne0pA1 bg6H6TGLuGYo6JAkTXsiRT4NqYmVima9iD5alrR1VFM0YXY9Z34s3yq/5vx1okMXjDq7 wmdfqTKkonQEhxy/wDFFsLT0e3XTg4SqdrPobPe79W3ooUfwmORoRwGp+OYlf0XN3hkF dLLA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@googlemail.com header.s=20210112 header.b=hYiKVyh8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=googlemail.com Received: from out1.vger.email (out1.vger.email. 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[2a01:c23:c046:3500::e63]) by smtp.googlemail.com with ESMTPSA id 18-20020a170906211200b00779cde476e4sm10748721ejt.62.2022.10.20.14.03.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 14:03:43 -0700 (PDT) From: Martin Blumenstingl To: linux@roeck-us.net, linux-hwmon@vger.kernel.org Cc: jdelvare@suse.com, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [RFC PATCH v2 2/4] hwmon: (jc42) Convert to regmap's built-in caching Date: Thu, 20 Oct 2022 23:03:18 +0200 Message-Id: <20221020210320.1624617-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221020210320.1624617-1-martin.blumenstingl@googlemail.com> References: <20221020210320.1624617-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747242123778503874?= X-GMAIL-MSGID: =?utf-8?q?1747242123778503874?= Move over to regmap's built-in caching instead of adding a custom caching implementation. This works for JC42_REG_TEMP_UPPER, JC42_REG_TEMP_LOWER and JC42_REG_TEMP_CRITICAL as these values never change except when explicitly written. For JC42_REG_TEMP a cache variable is still kept as regmap cannot cache this register (because it's volatile, meaning it can change at any time). Signed-off-by: Martin Blumenstingl --- drivers/hwmon/jc42.c | 97 ++++++++++++++++++++++++-------------------- 1 file changed, 54 insertions(+), 43 deletions(-) diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c index 329a80264556..3f524ab5451c 100644 --- a/drivers/hwmon/jc42.c +++ b/drivers/hwmon/jc42.c @@ -200,21 +200,6 @@ static struct jc42_chips jc42_chips[] = { { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK }, }; -enum temp_index { - t_input = 0, - t_crit, - t_min, - t_max, - t_num_temp -}; - -static const u8 temp_regs[t_num_temp] = { - [t_input] = JC42_REG_TEMP, - [t_crit] = JC42_REG_TEMP_CRITICAL, - [t_min] = JC42_REG_TEMP_LOWER, - [t_max] = JC42_REG_TEMP_UPPER, -}; - /* Each client has this additional data */ struct jc42_data { struct regmap *regmap; @@ -224,7 +209,7 @@ struct jc42_data { unsigned long last_updated; /* In jiffies */ u16 orig_config; /* original configuration */ u16 config; /* current configuration */ - u16 temp[t_num_temp];/* Temperatures */ + u16 temp; /* Cached temperature register value */ }; #define JC42_TEMP_MIN_EXTENDED (-40000) @@ -252,18 +237,17 @@ static int jc42_temp_from_reg(s16 reg) static struct jc42_data *jc42_update_device(struct device *dev) { struct jc42_data *data = dev_get_drvdata(dev); - unsigned int i, val; + unsigned int val; int ret; mutex_lock(&data->update_lock); if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { - for (i = 0; i < t_num_temp; i++) { - ret = regmap_read(data->regmap, temp_regs[i], &val); - if (ret) - goto abort; - data->temp[i] = val; - } + ret = regmap_read(data->regmap, JC42_REG_TEMP, &val); + if (ret) + goto abort; + + data->temp = val; data->last_updated = jiffies; data->valid = true; } @@ -276,44 +260,67 @@ static int jc42_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) { struct jc42_data *data = jc42_update_device(dev); - int temp, hyst; + unsigned int regval; + int ret, temp, hyst; if (IS_ERR(data)) return PTR_ERR(data); switch (attr) { case hwmon_temp_input: - *val = jc42_temp_from_reg(data->temp[t_input]); + *val = jc42_temp_from_reg(data->temp); return 0; case hwmon_temp_min: - *val = jc42_temp_from_reg(data->temp[t_min]); + ret = regmap_read(data->regmap, JC42_REG_TEMP_LOWER, ®val); + if (ret) + return ret; + + *val = jc42_temp_from_reg(regval); return 0; case hwmon_temp_max: - *val = jc42_temp_from_reg(data->temp[t_max]); + ret = regmap_read(data->regmap, JC42_REG_TEMP_UPPER, ®val); + if (ret) + return ret; + + *val = jc42_temp_from_reg(regval); return 0; case hwmon_temp_crit: - *val = jc42_temp_from_reg(data->temp[t_crit]); + ret = regmap_read(data->regmap, JC42_REG_TEMP_CRITICAL, + ®val); + if (ret) + return ret; + + *val = jc42_temp_from_reg(regval); return 0; case hwmon_temp_max_hyst: - temp = jc42_temp_from_reg(data->temp[t_max]); + ret = regmap_read(data->regmap, JC42_REG_TEMP_UPPER, ®val); + if (ret) + return ret; + + temp = jc42_temp_from_reg(regval); hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK) >> JC42_CFG_HYST_SHIFT]; *val = temp - hyst; return 0; case hwmon_temp_crit_hyst: - temp = jc42_temp_from_reg(data->temp[t_crit]); + ret = regmap_read(data->regmap, JC42_REG_TEMP_CRITICAL, + ®val); + if (ret) + return ret; + + temp = jc42_temp_from_reg(regval); hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK) >> JC42_CFG_HYST_SHIFT]; *val = temp - hyst; return 0; case hwmon_temp_min_alarm: - *val = (data->temp[t_input] >> JC42_ALARM_MIN_BIT) & 1; + *val = (data->temp >> JC42_ALARM_MIN_BIT) & 1; return 0; case hwmon_temp_max_alarm: - *val = (data->temp[t_input] >> JC42_ALARM_MAX_BIT) & 1; + *val = (data->temp >> JC42_ALARM_MAX_BIT) & 1; return 0; case hwmon_temp_crit_alarm: - *val = (data->temp[t_input] >> JC42_ALARM_CRIT_BIT) & 1; + *val = (data->temp >> JC42_ALARM_CRIT_BIT) & 1; return 0; default: return -EOPNOTSUPP; @@ -324,6 +331,7 @@ static int jc42_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) { struct jc42_data *data = dev_get_drvdata(dev); + unsigned int regval; int diff, hyst; int ret; @@ -331,21 +339,23 @@ static int jc42_write(struct device *dev, enum hwmon_sensor_types type, switch (attr) { case hwmon_temp_min: - data->temp[t_min] = jc42_temp_to_reg(val, data->extended); - ret = regmap_write(data->regmap, temp_regs[t_min], - data->temp[t_min]); + ret = regmap_write(data->regmap, JC42_REG_TEMP_LOWER, + jc42_temp_to_reg(val, data->extended)); break; case hwmon_temp_max: - data->temp[t_max] = jc42_temp_to_reg(val, data->extended); - ret = regmap_write(data->regmap, temp_regs[t_max], - data->temp[t_max]); + ret = regmap_write(data->regmap, JC42_REG_TEMP_UPPER, + jc42_temp_to_reg(val, data->extended)); break; case hwmon_temp_crit: - data->temp[t_crit] = jc42_temp_to_reg(val, data->extended); - ret = regmap_write(data->regmap, temp_regs[t_crit], - data->temp[t_crit]); + ret = regmap_write(data->regmap, JC42_REG_TEMP_CRITICAL, + jc42_temp_to_reg(val, data->extended)); break; case hwmon_temp_crit_hyst: + ret = regmap_read(data->regmap, JC42_REG_TEMP_CRITICAL, + ®val); + if (ret) + return ret; + /* * JC42.4 compliant chips only support four hysteresis values. * Pick best choice and go from there. @@ -353,7 +363,7 @@ static int jc42_write(struct device *dev, enum hwmon_sensor_types type, val = clamp_val(val, (data->extended ? JC42_TEMP_MIN_EXTENDED : JC42_TEMP_MIN) - 6000, JC42_TEMP_MAX); - diff = jc42_temp_from_reg(data->temp[t_crit]) - val; + diff = jc42_temp_from_reg(regval) - val; hyst = 0; if (diff > 0) { if (diff < 2250) @@ -491,6 +501,7 @@ static const struct regmap_config jc42_regmap_config = { .writeable_reg = jc42_writable_reg, .readable_reg = jc42_readable_reg, .volatile_reg = jc42_volatile_reg, + .cache_type = REGCACHE_RBTREE, }; static int jc42_probe(struct i2c_client *client) From patchwork Thu Oct 20 21:03:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 6404 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4242:0:0:0:0:0 with SMTP id s2csp323244wrr; Thu, 20 Oct 2022 14:06:32 -0700 (PDT) X-Google-Smtp-Source: AMsMyM70NFgmvHRENZjpZz4YlS8uMJen/z8HguMrLRpvH9l2kXS/MY+YMUC9ForEDB3kFGoSxrPH X-Received: by 2002:a17:90b:1b0b:b0:20d:7c31:e75d with SMTP id nu11-20020a17090b1b0b00b0020d7c31e75dmr17744089pjb.101.1666299992267; Thu, 20 Oct 2022 14:06:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666299992; cv=none; d=google.com; s=arc-20160816; b=EtPt8T1nrevCioPRnewMKwGPdLB6ejoVchg8liMSE5leSjX/osrnTpSvHpfCgcJYHP MetpP4olGRJLBWvOqDGRnfdp5mhMQ2y+11uREA8g56Q4LaSsDHRD4QZ+1KSVkFznDUE6 ++/N5ykcucFc2ixqREgEDKk5XjqmXaawIi8xEwHRz7XPBJSFl5Ol3S0de4wFhj8cmCwr 2E97dmsK2XkHjp+RI9fOxvBr+V2LQxpnAzeqMLtamPnUE7IZ/ILxkVJdyBJw+AJuQHwF SMWe5kAxRNp+WyNs7BZJcyQ27uAIdwuOhnFmE/nnprduGTwalt3E/nZVOuK8QJwDYhum 1s7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=VcGsClt3EeHDOcwNreFbmj7M3tyyEYsggkdvW5UHGGM=; b=vfO6f9DL44nWRT6TNZSFo34aOjKwt776gUOnl9HzqrbjiOs7nn4cI2Tabpnm4mIkfE IxXNZF+ghuFYPC+5pyDrhLqp9Sd1o2aEtbObUohFx4CIKdilswsXIMAP8+SDFBQnGXnd GXBLpBmAGk318ZcMjQda12w9ySjVwn1OpmoZMJeab2eLUf/RBQ9N0/oAm+DLr5phKwTG U60Ns0yut6bNuWAoGmsqVNLLJXhvHghS+5+fJ3EHNxr/Xx0PUHAUKMU0g2l9+3AfKPM3 /ezSBehCjcX6pDO8Q6QVkoliqS8o+YGMnxBSWDmhfACPHuWAqFMer5ncyVT2RR6RsE0I cPpg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@googlemail.com header.s=20210112 header.b=oLpOq5hM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=googlemail.com Received: from out1.vger.email (out1.vger.email. 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[2a01:c23:c046:3500::e63]) by smtp.googlemail.com with ESMTPSA id 18-20020a170906211200b00779cde476e4sm10748721ejt.62.2022.10.20.14.03.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 14:03:44 -0700 (PDT) From: Martin Blumenstingl To: linux@roeck-us.net, linux-hwmon@vger.kernel.org Cc: jdelvare@suse.com, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [RFC PATCH v2 3/4] hwmon: (jc42) Restore the min/max/critical temperatures on resume Date: Thu, 20 Oct 2022 23:03:19 +0200 Message-Id: <20221020210320.1624617-4-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221020210320.1624617-1-martin.blumenstingl@googlemail.com> References: <20221020210320.1624617-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747242180651183326?= X-GMAIL-MSGID: =?utf-8?q?1747242180651183326?= The JC42 compatible thermal sensor on Kingston KSM32ES8/16ME DIMMs (using Micron E-Die) is an ST Microelectronics STTS2004 (manufacturer 0x104a, device 0x2201). It does not keep the previously programmed minimum, maximum and critical temperatures after system suspend and resume (which is a shutdown / startup cycle for the JC42 temperature sensor). This results in an alarm on system resume because the hardware default for these values is 0°C (so any environment temperature greater than 0°C will trigger the alarm). Example before system suspend: jc42-i2c-0-1a Adapter: SMBus PIIX4 adapter port 0 at 0b00 temp1: +34.8°C (low = +0.0°C) (high = +85.0°C, hyst = +85.0°C) (crit = +95.0°C, hyst = +95.0°C) Example after system resume (without this change): jc42-i2c-0-1a Adapter: SMBus PIIX4 adapter port 0 at 0b00 temp1: +34.8°C (low = +0.0°C) ALARM (HIGH, CRIT) (high = +0.0°C, hyst = +0.0°C) (crit = +0.0°C, hyst = +0.0°C) Apply the cached values from the JC42_REG_TEMP_UPPER, JC42_REG_TEMP_LOWER, JC42_REG_TEMP_CRITICAL and JC42_REG_SMBUS (where the SMBUS register is not related to this issue but a side-effect of using regcache_sync() during system resume with the previously cached/programmed values. This fixes the alarm due to the hardware defaults of 0°C because the previously applied limits (set by userspace) are re-applied on system resume. Fixes: 175c490c9e7f ("hwmon: (jc42) Add support for STTS2004 and AT30TSE004") Signed-off-by: Martin Blumenstingl --- drivers/hwmon/jc42.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c index 3f524ab5451c..61311483a5c6 100644 --- a/drivers/hwmon/jc42.c +++ b/drivers/hwmon/jc42.c @@ -582,6 +582,10 @@ static int jc42_suspend(struct device *dev) data->config |= JC42_CFG_SHUTDOWN; regmap_write(data->regmap, JC42_REG_CONFIG, data->config); + + regcache_cache_only(data->regmap, true); + regcache_mark_dirty(data->regmap); + return 0; } @@ -589,9 +593,13 @@ static int jc42_resume(struct device *dev) { struct jc42_data *data = dev_get_drvdata(dev); + regcache_cache_only(data->regmap, false); + data->config &= ~JC42_CFG_SHUTDOWN; regmap_write(data->regmap, JC42_REG_CONFIG, data->config); - return 0; + + /* Restore cached register values to hardware */ + return regcache_sync(data->regmap); } static const struct dev_pm_ops jc42_dev_pm_ops = { From patchwork Thu Oct 20 21:03:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 6403 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4242:0:0:0:0:0 with SMTP id s2csp323138wrr; Thu, 20 Oct 2022 14:06:21 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6ZOg/H4mFvO36zuFftRg07SRWFNi+oTjSRdDFUrcxMFDhYi0TjeU4lvaBCAsLmxKPH3rag X-Received: by 2002:a05:6402:3789:b0:461:3ae6:8d73 with SMTP id et9-20020a056402378900b004613ae68d73mr634040edb.229.1666299981366; Thu, 20 Oct 2022 14:06:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666299981; cv=none; d=google.com; s=arc-20160816; b=azZfZawR2WWbufGxHGYRC8n2NAWEgDlUNyR6U6nPo74BdBYFab8mZmxVNyEg1BoeWF TsFn61obHN1fJRNrojek+9+7L+tKiT4zhP+4B6WLF+vOmVSbKuWJd/iJ/coMxdGD4wq+ aphfTE39Z9Mum2eYJOWQ7ZdutrG1eOuUydkhJ6VMUyLwhX3lBkV4H4KxTf4n3gX+DlT2 rM1KCRC4p3I7X2D/WOPyl87j+AFzXSy0PaYy15PMpR53ZpzyQjZXtWkcDYTvU94Hwj6u O1xK5M8COp+R4iZ3CJqIC6zkGvtmcXZ5gOlEeEiy7cInhR4J0tzrlbg/F8IfsqTKccRw gzlw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qxDfXjVat7Kys3E9Hetmxuq6ShOthTcFMt0dPFfzKbQ=; b=GE2V/lHkME4ekTW135s7ppOa2fggwRPUDFGp1Klk2/JBNkXuTkP397kU4X7cRaaYpq FCM2uwwZj0PWH0jo/iUmpoACATIQU2t+tRIT8kPwv1pjPEmfCpDK/RQBVtS8HiQHkOJN LEjp9JUYGCzs/VcSE2Ek+TnPP59JNwqCA5v05Q1wmfuiW6nJngMG/wVIGC3Psy1NP1dw X6kbLsr8qdaLcqh0ro/SL38BL6xM1k9u80aYzA+f+WW9DBa8ocDzXbe5JHy/Ol6pMl5l hT/7fCyfBlnx2ES+0Qh2c/yyOU1oD0kHad0Velx/V2Q6gydWiV95FKggy6e2fvT1LX9c 0pzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@googlemail.com header.s=20210112 header.b=D8hXj+Ch; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=googlemail.com Received: from out1.vger.email (out1.vger.email. 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[2a01:c23:c046:3500::e63]) by smtp.googlemail.com with ESMTPSA id 18-20020a170906211200b00779cde476e4sm10748721ejt.62.2022.10.20.14.03.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 14:03:45 -0700 (PDT) From: Martin Blumenstingl To: linux@roeck-us.net, linux-hwmon@vger.kernel.org Cc: jdelvare@suse.com, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [RFC PATCH v2 4/4] hwmon: (jc42) Don't cache the temperature register Date: Thu, 20 Oct 2022 23:03:20 +0200 Message-Id: <20221020210320.1624617-5-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221020210320.1624617-1-martin.blumenstingl@googlemail.com> References: <20221020210320.1624617-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747242169431749617?= X-GMAIL-MSGID: =?utf-8?q?1747242169431749617?= Now that we're utilizing regmap and it's regcache for the minimum/maximum/critical temperature registers the only cached register that's left is the actual temperature register. Drop the custom cache implementation as it just complicates things. Signed-off-by: Martin Blumenstingl --- drivers/hwmon/jc42.c | 59 ++++++++++++++++---------------------------- 1 file changed, 21 insertions(+), 38 deletions(-) diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c index 61311483a5c6..52a60eb0791b 100644 --- a/drivers/hwmon/jc42.c +++ b/drivers/hwmon/jc42.c @@ -203,13 +203,10 @@ static struct jc42_chips jc42_chips[] = { /* Each client has this additional data */ struct jc42_data { struct regmap *regmap; - struct mutex update_lock; /* protect register access */ bool extended; /* true if extended range supported */ bool valid; - unsigned long last_updated; /* In jiffies */ u16 orig_config; /* original configuration */ u16 config; /* current configuration */ - u16 temp; /* Cached temperature register value */ }; #define JC42_TEMP_MIN_EXTENDED (-40000) @@ -234,41 +231,20 @@ static int jc42_temp_from_reg(s16 reg) return reg * 125 / 2; } -static struct jc42_data *jc42_update_device(struct device *dev) -{ - struct jc42_data *data = dev_get_drvdata(dev); - unsigned int val; - int ret; - - mutex_lock(&data->update_lock); - - if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { - ret = regmap_read(data->regmap, JC42_REG_TEMP, &val); - if (ret) - goto abort; - - data->temp = val; - data->last_updated = jiffies; - data->valid = true; - } -abort: - mutex_unlock(&data->update_lock); - return ret ? ERR_PTR(ret) : data; -} - static int jc42_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) { - struct jc42_data *data = jc42_update_device(dev); + struct jc42_data *data = dev_get_drvdata(dev); unsigned int regval; int ret, temp, hyst; - if (IS_ERR(data)) - return PTR_ERR(data); - switch (attr) { case hwmon_temp_input: - *val = jc42_temp_from_reg(data->temp); + ret = regmap_read(data->regmap, JC42_REG_TEMP, ®val); + if (ret) + return ret; + + *val = jc42_temp_from_reg(regval); return 0; case hwmon_temp_min: ret = regmap_read(data->regmap, JC42_REG_TEMP_LOWER, ®val); @@ -314,13 +290,25 @@ static int jc42_read(struct device *dev, enum hwmon_sensor_types type, *val = temp - hyst; return 0; case hwmon_temp_min_alarm: - *val = (data->temp >> JC42_ALARM_MIN_BIT) & 1; + ret = regmap_read(data->regmap, JC42_REG_TEMP, ®val); + if (ret) + return ret; + + *val = (regval >> JC42_ALARM_MIN_BIT) & 1; return 0; case hwmon_temp_max_alarm: - *val = (data->temp >> JC42_ALARM_MAX_BIT) & 1; + ret = regmap_read(data->regmap, JC42_REG_TEMP, ®val); + if (ret) + return ret; + + *val = (regval >> JC42_ALARM_MAX_BIT) & 1; return 0; case hwmon_temp_crit_alarm: - *val = (data->temp >> JC42_ALARM_CRIT_BIT) & 1; + ret = regmap_read(data->regmap, JC42_REG_TEMP, ®val); + if (ret) + return ret; + + *val = (regval >> JC42_ALARM_CRIT_BIT) & 1; return 0; default: return -EOPNOTSUPP; @@ -335,8 +323,6 @@ static int jc42_write(struct device *dev, enum hwmon_sensor_types type, int diff, hyst; int ret; - mutex_lock(&data->update_lock); - switch (attr) { case hwmon_temp_min: ret = regmap_write(data->regmap, JC42_REG_TEMP_LOWER, @@ -383,8 +369,6 @@ static int jc42_write(struct device *dev, enum hwmon_sensor_types type, break; } - mutex_unlock(&data->update_lock); - return ret; } @@ -521,7 +505,6 @@ static int jc42_probe(struct i2c_client *client) return PTR_ERR(data->regmap); i2c_set_clientdata(client, data); - mutex_init(&data->update_lock); ret = regmap_read(data->regmap, JC42_REG_CAP, &cap); if (ret)