From patchwork Mon Apr 3 13:30:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 78551 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2312325vqo; Mon, 3 Apr 2023 06:43:15 -0700 (PDT) X-Google-Smtp-Source: AKy350Z8tNV5ymnGEEJE+r5dzAk9QKzwOFos7c9I+sZQtwbJemG2KBPqS6AltRRvp8gM3+S+nYB7 X-Received: by 2002:aa7:d815:0:b0:4fd:2533:f56 with SMTP id v21-20020aa7d815000000b004fd25330f56mr33141035edq.39.1680529394867; Mon, 03 Apr 2023 06:43:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680529394; cv=none; d=google.com; s=arc-20160816; b=c1GHTJtJ6Xs0eWk5Mt0H1H1qvS/Tm4AI93DJ++9uFBw2O4E3Zk4uRysCRaoWw4fyaQ RPEF+eQ/qwP3n9RTLQjkdyxMqpE5Uq4xnd4x6PToAmre0V2U2Ln471ekL3J2icLwe2Pg ru0o/y+Vly0h85GNW8jDUI/+lvrFRR0eoIM5PbhB/w0H/YPKFI7DbHni2GJUxgv4Frob 05sMSdZtIuArNiO80tgzomS7BKJ8of2BJrYvPnESUvJTWS/Hwk/WdCQjr7XI2+YDdMQj +zNhqMN9DS/j09OZ1cibGCztH4RouFsXb1mxfeVCP6pd4pqG+gD1jtauRVfvxPaEKPon oBzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=CU2rECyEMJthSMbBkPmB4ARhBI3HTIqLuygygc/BZ9A=; b=QIhEQU9QTF2AeX19NYMB9GkTdGOlYTrrxDrVcD/eu1sLDDM86emoAZJffrB7xtKmAM C65T2kiq7uF0HHadj8lbXAhYdEfW6tbYoOaU7aCYwW7vNuILNCQXw1zfooFyFfCLfyF1 EQYuL2HrbtinnRkeGbf48UPu/UypkyawAXdp6TKShg0m4qjvng5XyNFfMZGB4P5DYLmT Rf5cCQ/kYYCRWzeXlsJQx1O+/6IPIeEzZSW/icimaOKWJvZWELOPe/Rb9lPO8vOrjzZA Ys7fjq8dns62O1KbcZ+FPyo7NVZiKw1cT0FCHSwLKshIlE9lCqlciB9QcXx6HfYsA3YV dTBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=gjxT+m2A; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w20-20020aa7dcd4000000b004acdca4cb9asi8511316edu.636.2023.04.03.06.42.51; Mon, 03 Apr 2023 06:43:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=gjxT+m2A; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232539AbjDCNbJ (ORCPT + 99 others); Mon, 3 Apr 2023 09:31:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232415AbjDCNbE (ORCPT ); Mon, 3 Apr 2023 09:31:04 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 909364C0A; Mon, 3 Apr 2023 06:31:03 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 872C766003B1; Mon, 3 Apr 2023 14:31:01 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680528662; bh=++loIoPqiqnGGTd1ang00wuiYVquczoRpePLER4RqUU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gjxT+m2Ah+kCTuvUOY9tjJuw9qCUKk2oRh+J1/+uKe6XFO5z/queg1h3gngEPzyOY wxqfUN2/A39W6wzBb5SWgvsaLoeRPKMxWJ7nDKvOK1oFqb+E4nV53dRkMZkwzfoNid dFFpNnfY66PAQL5yyXSHyZ5H0lE0+TDSJf3/jKj9hWRyxdsvWWyGmInb4aBnupRUKB ZzQ8NPMOsx4exJNAZvtU4Btl6/OXW/S3DzSwbwaSMyKFjZSKvcbw2jdqe9wh4sriz2 eoM0krYhN2xgvyCbuFe0nnWSYMksXC0RQr9jPjbIHv6EV4nfiODYpBSBWDKGhF1/7u 5t3xEiguxRNPA== From: AngeloGioacchino Del Regno To: thierry.reding@gmail.com Cc: u.kleine-koenig@pengutronix.de, matthias.bgg@gmail.com, weiqing.kong@mediatek.com, jitao.shi@mediatek.com, linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, wenst@chromium.org, AngeloGioacchino Del Regno , =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= Subject: [PATCH RESEND 1/2] pwm: mtk-disp: Disable shadow registers before setting backlight values Date: Mon, 3 Apr 2023 15:30:53 +0200 Message-Id: <20230403133054.319070-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230403133054.319070-1-angelogioacchino.delregno@collabora.com> References: <20230403133054.319070-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762162790628856245?= X-GMAIL-MSGID: =?utf-8?q?1762162790628856245?= If shadow registers usage is not desired, disable that before performing any write to CON0/1 registers in the .apply() callback, otherwise we may lose clkdiv or period/width updates. Fixes: cd4b45ac449a ("pwm: Add MediaTek MT2701 display PWM driver support") Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Nícolas F. R. A. Prado Tested-by: Nícolas F. R. A. Prado Reviewed-by: Alexandre Mergnat Tested-by: Alexandre Mergnat --- drivers/pwm/pwm-mtk-disp.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c index 692a06121b28..82b430d881a2 100644 --- a/drivers/pwm/pwm-mtk-disp.c +++ b/drivers/pwm/pwm-mtk-disp.c @@ -138,6 +138,19 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, high_width = mul_u64_u64_div_u64(state->duty_cycle, rate, div); value = period | (high_width << PWM_HIGH_WIDTH_SHIFT); + if (mdp->data->bls_debug && !mdp->data->has_commit) { + /* + * For MT2701, disable double buffer before writing register + * and select manual mode and use PWM_PERIOD/PWM_HIGH_WIDTH. + */ + mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug, + mdp->data->bls_debug_mask, + mdp->data->bls_debug_mask); + mtk_disp_pwm_update_bits(mdp, mdp->data->con0, + mdp->data->con0_sel, + mdp->data->con0_sel); + } + mtk_disp_pwm_update_bits(mdp, mdp->data->con0, PWM_CLKDIV_MASK, clk_div << PWM_CLKDIV_SHIFT); @@ -152,17 +165,6 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, mtk_disp_pwm_update_bits(mdp, mdp->data->commit, mdp->data->commit_mask, 0x0); - } else { - /* - * For MT2701, disable double buffer before writing register - * and select manual mode and use PWM_PERIOD/PWM_HIGH_WIDTH. - */ - mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug, - mdp->data->bls_debug_mask, - mdp->data->bls_debug_mask); - mtk_disp_pwm_update_bits(mdp, mdp->data->con0, - mdp->data->con0_sel, - mdp->data->con0_sel); } mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, mdp->data->enable_mask, From patchwork Mon Apr 3 13:30:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 78555 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2313496vqo; Mon, 3 Apr 2023 06:45:09 -0700 (PDT) X-Google-Smtp-Source: AKy350Yd9iZThgzCocFEhqKFtwMUZ5PYfs+MOWLHVrSlC4IQrXY1ev+mLjFIY0KyqdMmvCgHAYMU X-Received: by 2002:a17:907:1c21:b0:8dd:5710:a017 with SMTP id nc33-20020a1709071c2100b008dd5710a017mr44993461ejc.4.1680529509204; Mon, 03 Apr 2023 06:45:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680529509; cv=none; d=google.com; s=arc-20160816; b=k184tETuPnvMv2uVKSU7XwC0njpHCY9aQdJ3c627svmFHmh0s9cJi/j9Nnmnt0tLwg Xa8yt97TWSM4NK/phP3XEJy5qTnyaOI+HtXWifQSZOMHPHK7tPQeAoQVx1G/PNAixx3X uasB46q3oQqfKmkNRjupaVIee7Dkpm4Ff/8nwJ9n2ghms7eWYG4afIdd1cfBEHFdP2bz xwzW0t8pXBSIiaVfawKfEXsM6LgCy+8mxDSgQyQpNHrEmk5AIamk+nuLBjmCOWSbbbzy JXq2USwrB2zxd1W6n0MRGM4wVwy6htHzrcnU9e0GEo+Rs8a84ePrB9MYEPEHBLUDOmuZ s4hg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=fC2SQukrdlRH4bXEEK9Gukshi7+NUmqYTaSoVo70VIo=; b=XbbnluUawHdLXfel5Xz7SMgK/vQrBPatM+zPiEhhxMF/rlIzyXKL6+jpivEiI1sSkp 1bbEvE2igxJjxD4GzWy2BYI6YM3ZSuN11XuHrnePSFCYKRxRoHUUxEYMG/SdLZHBFOo5 i+C7Su4HNqYlIZUnbwHm8gMbvZqTJhYzQcJoPU8j9UgAqa9zu67JpEDbjcwdRHZpKL00 7yL9WmqwTeH7izZNclVhk3f3oyhULxNjpZvaHyxwrEdr1ZqWAAyZD4tls/Nk7/Hw+P23 JlX94Cj38WabJOWCAVnl+qGhM+djHQM6GCF+/NI1//TaColwoeO1WsIBc6/nf9odQo+z EJxg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=k7yAan3K; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d6-20020aa7ce06000000b00501dd7cb827si8046451edv.285.2023.04.03.06.44.45; Mon, 03 Apr 2023 06:45:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=k7yAan3K; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232628AbjDCNbM (ORCPT + 99 others); Mon, 3 Apr 2023 09:31:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34446 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232524AbjDCNbF (ORCPT ); Mon, 3 Apr 2023 09:31:05 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56CC3A9; Mon, 3 Apr 2023 06:31:04 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5A7C366015A6; Mon, 3 Apr 2023 14:31:02 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680528663; bh=M00de/+bvoV9U86ljAmvP+igaGDFeCArUsyDx0C6F+Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k7yAan3K0CvLHCCUoEPCyRmus7Fc9pRo4GyMmVBdbpeb3L4kuTYptEnkefa8tgIYA P18G/pJctn9O5hRkf1aH2hIID0wvQ3md6HcHxbOdWv9JsYhUH4FDG1LNaYUQO00uuP UbU+PdeDCMA/2tVaW2V3/LdDKX3hEIE7p+5udl7gESo3osN7b6YhlOYnWAlyOwjYqK 9ubgtWCluN/hKI33Jls+JC3MqgAxbYEd05VwmCS8xP9PtfT6cq0Vvz98hwwXcl2riB I90uGqGdosWbxeKVg2V+MoAn9v3EsQ29ENkBMKY1ZL5uFKnInnBIz1JtB0gdNkrwGj eqiBI3C+bpvEw== From: AngeloGioacchino Del Regno To: thierry.reding@gmail.com Cc: u.kleine-koenig@pengutronix.de, matthias.bgg@gmail.com, weiqing.kong@mediatek.com, jitao.shi@mediatek.com, linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, wenst@chromium.org, AngeloGioacchino Del Regno , =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= Subject: [PATCH RESEND 2/2] pwm: mtk-disp: Configure double buffering before reading in .get_state() Date: Mon, 3 Apr 2023 15:30:54 +0200 Message-Id: <20230403133054.319070-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230403133054.319070-1-angelogioacchino.delregno@collabora.com> References: <20230403133054.319070-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762162910622279329?= X-GMAIL-MSGID: =?utf-8?q?1762162910622279329?= The DISP_PWM controller's default behavior is to always use register double buffering: all reads/writes are then performed on shadow registers instead of working registers and this becomes an issue in case our chosen configuration in Linux is different from the default (or from the one that was pre-applied by the bootloader). An example of broken behavior is when the controller is configured to use shadow registers, but this driver wants to configure it otherwise: what happens is that the .get_state() callback is called right after registering the pwmchip and checks whether the PWM is enabled by reading the DISP_PWM_EN register; At this point, if shadow registers are enabled but their content was not committed before booting Linux, we are *not* reading the current PWM enablement status, leading to the kernel knowing that the hardware is actually enabled when, in reality, it's not. The aforementioned issue emerged since this driver was fixed with commit 0b5ef3429d8f ("pwm: mtk-disp: Fix the parameters calculated by the enabled flag of disp_pwm") making it to read the enablement status from the right register. Configure the controller in the .get_state() callback to avoid this desync issue and get the backlight properly working again. Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()") Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Nícolas F. R. A. Prado Tested-by: Nícolas F. R. A. Prado Reviewed-by: Alexandre Mergnat Tested-by: Alexandre Mergnat --- drivers/pwm/pwm-mtk-disp.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c index 82b430d881a2..fe9593f968ee 100644 --- a/drivers/pwm/pwm-mtk-disp.c +++ b/drivers/pwm/pwm-mtk-disp.c @@ -196,6 +196,16 @@ static int mtk_disp_pwm_get_state(struct pwm_chip *chip, return err; } + /* + * Apply DISP_PWM_DEBUG settings to choose whether to enable or disable + * registers double buffer and manual commit to working register before + * performing any read/write operation + */ + if (mdp->data->bls_debug) + mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug, + mdp->data->bls_debug_mask, + mdp->data->bls_debug_mask); + rate = clk_get_rate(mdp->clk_main); con0 = readl(mdp->base + mdp->data->con0); con1 = readl(mdp->base + mdp->data->con1);