From patchwork Sun Apr 2 09:50:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 78211 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1657095vqo; Sun, 2 Apr 2023 02:51:55 -0700 (PDT) X-Google-Smtp-Source: AKy350YARHv1Z49jVHrbXAMIvd7Op3aldev1557hhfKZpWC6IUvlS8PGvhQTwV3lrO3ooRfAcNQe X-Received: by 2002:a17:90b:3b45:b0:23f:86c2:54e2 with SMTP id ot5-20020a17090b3b4500b0023f86c254e2mr35759946pjb.16.1680429115156; Sun, 02 Apr 2023 02:51:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680429115; cv=none; d=google.com; s=arc-20160816; b=YlUtA4zuLdGj128a5/zTwkgp3zfrdhFcUdx61SbppilQqA5B38WNrG43IWPyL/VjdX oHOkeHW8HOhUhv9db8QapEmlF3hatCDL+wcFh3U3H1AmQE6HEKy8bMEmtBHH/5SHYr+F EYu28T7oi+hETaDce8U9OdzNg2USMuptaSrffEqUzIKzNaQH3pSLURyNaluTT/6Glxk/ +4hOd+AMevuUXKbmPxk6lIbe/J+7Qn6C2qEhB8YHgOKJmY3/6NHwwtVJvZD5iz9WxBsz +ssObV1I/dwT+jXAIUQ01vMaExDd1szNwiMSRUpZnJIFS5vUc7YNFE3ETPvwII0vELeq Qecg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=FHZjDh1HL4uiNHytpvgnAx4D6fHoug/Bs73vq6qH5YE=; b=aoCk0H9WH+3HL5SOjjWBkoM98zCrKRvUH1HuMdz4iuAozRVFOKAhWXRi+gPgNgiDWt EWi7iIAKxtuoKuKZWk2/i0n5faGco2HAiyMQT4460ZBmXwhELv7m3qB9sR5/pouZl22V HCzKchDshmXeDPVB70PF1+yENPi1d7d6xPcY5d4fuz5jx9YFm5+96XupCa0Fy1/gNpfb Wn8Pq+e5PxpL6qjMg0nxTX//yvcihN5wkDTgAK265mFckW6hlqfMFR2z4GXnqiu/2i0O Y6CoERsFXqGCMXyz6tI1NgS2K3xxgxo+PoJW6KtbnKyDa6z7qNF4Teoxo2pwdB8oHeA9 VQ6A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=QIo9uK7+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ay3-20020a17090b030300b0023a177c4951si5887018pjb.39.2023.04.02.02.51.43; Sun, 02 Apr 2023 02:51:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=QIo9uK7+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230258AbjDBJvI (ORCPT + 99 others); Sun, 2 Apr 2023 05:51:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230218AbjDBJvF (ORCPT ); Sun, 2 Apr 2023 05:51:05 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6665059E8; Sun, 2 Apr 2023 02:51:04 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id CF83D660312D; Sun, 2 Apr 2023 10:51:02 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680429063; bh=SvocWMiVjKrI7HollcLDxvyJtaFIB6bgp0o82PWqs70=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QIo9uK7+AH7ROGJvnguRB1/dtbxQviEQzGpzG1Y6HUMwCYqSyeiMJr8qk5c3+sT64 M/8o4CFuIfXFDXhARCPHDoGq9beaSCPe55liYqH7R5NuZ5iebo+DJvvvawDU4qqHK4 7/wiPV/7IIeX3f0vX8dggrqWSZarwAejtu03J2ouqKjPnoMMr/rYcAhgPiEXzuD4Hm Yy26n7XIWbt/jLt7GsGyPiBJpoHqjgn58zyXUIcBTI2GKU/8qmUxwvc00iT7QY7g5E 2W11StE3PCPPTHsMeWc3IVukwpgaZosXovx0aHLeoPoZv0CNtYN5neJ0epyoJut/RJ kAuLb0Sbcrqfg== From: Cristian Ciocaltea To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Sugar Zhang , Jagan Teki , Kever Yang , Elaine Zhang , Nicolas Frattaroli Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, Sebastian Reichel Subject: [PATCH v4 1/5] arm64: dts: rockchip: rk3588s: Fix SCMI assigned clocks Date: Sun, 2 Apr 2023 12:50:50 +0300 Message-Id: <20230402095054.384739-2-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230402095054.384739-1-cristian.ciocaltea@collabora.com> References: <20230402095054.384739-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762057640053679730?= X-GMAIL-MSGID: =?utf-8?q?1762057640053679730?= Since commit df4fdd0db475 ("dt-bindings: firmware: arm,scmi: Restrict protocol child node properties") the following dtbs_check warning is shown: rk3588-rock-5b.dtb: scmi: protocol@14: Unevaluated properties are not allowed ('assigned-clock-rates', 'assigned-clocks' were unexpected) Because adding the missing properties to firmware/arm,scmi.yaml binding document was not an acceptable solution, move SCMI_CLK_CPUB01 and SCMI_CLK_CPUB23 assigned clocks to the related CPU nodes and also add the missing SCMI_CLK_CPUL. Additionally, adjust frequency to 816 MHz for all the above mentioned assigned clocks, in order to match the firmware defaults. Suggested-by: Sebastian Reichel Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 7840767dfcd8..028dc62f63ce 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -60,6 +60,8 @@ cpu_l0: cpu@0 { enable-method = "psci"; capacity-dmips-mhz = <530>; clocks = <&scmi_clk SCMI_CLK_CPUL>; + assigned-clocks = <&scmi_clk SCMI_CLK_CPUL>; + assigned-clock-rates = <816000000>; cpu-idle-states = <&CPU_SLEEP>; i-cache-size = <32768>; i-cache-line-size = <64>; @@ -136,6 +138,8 @@ cpu_b0: cpu@400 { enable-method = "psci"; capacity-dmips-mhz = <1024>; clocks = <&scmi_clk SCMI_CLK_CPUB01>; + assigned-clocks = <&scmi_clk SCMI_CLK_CPUB01>; + assigned-clock-rates = <816000000>; cpu-idle-states = <&CPU_SLEEP>; i-cache-size = <65536>; i-cache-line-size = <64>; @@ -174,6 +178,8 @@ cpu_b2: cpu@600 { enable-method = "psci"; capacity-dmips-mhz = <1024>; clocks = <&scmi_clk SCMI_CLK_CPUB23>; + assigned-clocks = <&scmi_clk SCMI_CLK_CPUB23>; + assigned-clock-rates = <816000000>; cpu-idle-states = <&CPU_SLEEP>; i-cache-size = <65536>; i-cache-line-size = <64>; @@ -313,10 +319,6 @@ scmi: scmi { scmi_clk: protocol@14 { reg = <0x14>; - assigned-clocks = <&scmi_clk SCMI_CLK_CPUB01>, - <&scmi_clk SCMI_CLK_CPUB23>; - assigned-clock-rates = <1200000000>, - <1200000000>; #clock-cells = <1>; }; From patchwork Sun Apr 2 09:50:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 78217 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1659686vqo; Sun, 2 Apr 2023 03:01:11 -0700 (PDT) X-Google-Smtp-Source: AKy350ZgClT3R5YLYkxQZgr423bxVaQ3ilnfEUuGBhMcipIYAylHqimaz7jHe1e/ivvcI5rOPomJ X-Received: by 2002:a17:903:22c4:b0:1a2:8924:2259 with SMTP id y4-20020a17090322c400b001a289242259mr16693849plg.23.1680429671042; Sun, 02 Apr 2023 03:01:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680429671; cv=none; d=google.com; s=arc-20160816; b=D3Zp73bbFM1zsmeCDXtQR3JZ7dg+YhLbUva/zELqi81iKsy3IL1cw/QWnUBNjeJiiy Ql0CNJM8FvHMZccf26TF/0nE76o2GfIx4LITG5FOQy7qCqknUZJk4o+G1gKNVVx4VSxG +/oCuCKRU4Lz6c3QwpV0N7Wg64DHev4nRiUZgoztvCi2XvbC+MjniMZFf/2oHkiNgREi 3XxcDpEvDSksA+AR4ZMirDmejFuLixxsTCuzLu6LrqImGlWHCiW1HaaIdcRqKU+VoAdR weh91BgextwDVxJtRdnzTE7DQgncIZkyX/kFLNfMAh3ctv5umLbjZjyov4Z0Nr7GQ/s/ b8Kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tG/JXy9IlMGntA3z/wRcP0Qp8pKjpaJq/PVWrnzjn0k=; b=pmgVUzgCoZl+zF/Ppo/yH1TV0PvkDJayvf6NYgRu3Sv9KRnXd2JM0EnXLep5ORyjQr eGpHe60zZykhKCF7rJZw0g6WOSHfAKk2ouq4S70z2GlAcWPdXGRmu+zVIA9bnLTwcmRJ GATgQj0jfiRRLf1Y9Yl/SloOlVLqGC+Et+p1gD2d8VwF/6jDox3728lCHXLyqte6k13F iLGIkSo1VBQRu3wEIYad0pYAPdcaDBgUBrQRYkkPzd76g0bHlpgSVqP67zMsz9L0xzbv 5bcHsHvuvf5f4izf79SHL9HvyJyJA/SkDoFPvBOBtMrG/EbuI9/8rKk7VY3uPteJ7OWp A0Qw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=DpvJMONW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u14-20020a170903124e00b001a2a1064a20si5549122plh.606.2023.04.02.03.00.56; Sun, 02 Apr 2023 03:01:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=DpvJMONW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230319AbjDBJvO (ORCPT + 99 others); Sun, 2 Apr 2023 05:51:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230248AbjDBJvH (ORCPT ); Sun, 2 Apr 2023 05:51:07 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED7347EDB; Sun, 2 Apr 2023 02:51:06 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id AA5BE660313D; Sun, 2 Apr 2023 10:51:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680429065; bh=otwKTZ+LUzkWr51HoDAAyTXvgoa041tRNRUmqfxmfo4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DpvJMONWIUvQWf/Pz9uUmvEgABMS/2S1rppOj3+jUUu39V/rxYeVArTa5QS46wSpd I0m6Lz60eeCxZ3/lP3LNl5lRLSEwa18qlhLe0NW/JiL+fIfREKsF6x/xrWcI7AsWHt ROV6ZYdp9OVgx8AN2hhdEneFJHqQ8X7tqHLNPkpNRZoMZUqBXevDS5Sw2e1il/LI3X rZyyHWa7zIzAVAXtYVTOMCpT0GvdutwRXbEw2wveUj7voH8ZTuE8SxCMHS/RMucY28 wToN5ELgGariQp6SHSaT3874opD0gZUJ+WurAoZgYGLgR4iVYIO9nrpPt/46JrWB9s bj/fVoSisjGLA== From: Cristian Ciocaltea To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Sugar Zhang , Jagan Teki , Kever Yang , Elaine Zhang , Nicolas Frattaroli Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, Sebastian Reichel Subject: [PATCH v4 2/5] arm64: dts: rockchip: rk3588s: Assign PLL_PPLL clock rate to 1.1 GHz Date: Sun, 2 Apr 2023 12:50:51 +0300 Message-Id: <20230402095054.384739-3-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230402095054.384739-1-cristian.ciocaltea@collabora.com> References: <20230402095054.384739-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762058222795080159?= X-GMAIL-MSGID: =?utf-8?q?1762058222795080159?= The clock rate for PLL_PPLL has been wrongly initialized to 100 MHz instead of 1.1 GHz. Fix it. Fixes: c9211fa2602b ("arm64: dts: rockchip: Add base DT for rk3588 SoC") Reported-by: Sebastian Reichel Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 028dc62f63ce..e3546cfacc88 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -425,7 +425,7 @@ cru: clock-controller@fd7c0000 { <&cru ACLK_BUS_ROOT>, <&cru CLK_150M_SRC>, <&cru CLK_GPU>; assigned-clock-rates = - <100000000>, <786432000>, + <1100000000>, <786432000>, <850000000>, <1188000000>, <702000000>, <400000000>, <500000000>, From patchwork Sun Apr 2 09:50:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 78215 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1658874vqo; Sun, 2 Apr 2023 02:59:11 -0700 (PDT) X-Google-Smtp-Source: AKy350bKOXpadNB4t63JAnU6RWFdEDw0eQnEWA5EgVEhbvJ0M9fjFyjW7Mrc7Lc6Gcw+9CsXpCsr X-Received: by 2002:a17:903:1391:b0:1a0:4033:f72d with SMTP id jx17-20020a170903139100b001a04033f72dmr29691488plb.16.1680429550837; Sun, 02 Apr 2023 02:59:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680429550; cv=none; d=google.com; s=arc-20160816; b=SbZBnjHJPxMZf5hQdEe8/fhlfF7eVUUZeS2t1dI4koU6VaBcbJpV164OsCQ9F8UWBq NMTNhTZLnqW8hlLrqXBvZh4LyH9SHfNRVRuk8GJbKLU7Uteea137xkHLwplEU0IZ+yaT 5Ro1enVWzv65sly5T36Vgwr16YanQPRmWmocAF7xeHKH8eeARqv9tcyOGb39ihPc+fkp 4oFTaUyGveYiSIFBDjxortOFqNf4WEUIUAZNl2GXvQms6QEodx2HwSaggnX1DaFA0aip +FYvzqC1rqgHVkJLJVJqGTvmpWh33yoLgdH1Z6YNbD8m8guaK0LoaO4gdttgS5KRWVJD N0lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=JCrB6us8pM595DyGVdbv3Znr5BTnvK1wwmdp9Uv+4e8=; b=A+b6qYVMf+9bUYOLe1sRd28vII7fZbhlBotEXUtDRFWtLbprCjFFF8hQnt9E8CFdRa 9pxUslARy5EoGpz4IzZIcHIiRRlU51qXjvMYIl8iMFB54amP+L95YdN7guGKA7nSP75v ayoQbb7RFAM6YmbMguvtGrEHGI7WG1OUawHzp1Upqq71A2fm9sAMSE8tgN6SqssZ56oi YC/TGlbLpHf9qYX11b68/xMe039P/ddt+sOxehy3K1VikaDyI+MP2HD1KWai8rPuL5we mICTWdH5ykLSHvupwTs8Hcw0+vlqOpeja5zHfeHRdsnd2+BGLCSAoONFCcjr9QEI8iOE DXtw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=VaYy3P1c; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b127-20020a621b85000000b0062a41fe2281si2282399pfb.286.2023.04.02.02.58.58; Sun, 02 Apr 2023 02:59:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=VaYy3P1c; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230341AbjDBJvQ (ORCPT + 99 others); Sun, 2 Apr 2023 05:51:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229945AbjDBJvL (ORCPT ); Sun, 2 Apr 2023 05:51:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B59605FF9; Sun, 2 Apr 2023 02:51:09 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 658BD660312B; Sun, 2 Apr 2023 10:51:08 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680429068; bh=XO/BROgu9s186EZyA4Y0THzEjWTcDSJbUQnZjuYVoLk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VaYy3P1c5C4yOiVjw4jLJMVn6oiNQLeU6vIS3veMtCPgK//cvJXZe7EjMFPQ6yWkk UwnKKjqIBRn7tj2zhPtm9gIE66LX+ORhkyhVP76/mImhtBsENGXLLoQRGG26ujSjpa Vrzu8CUkcfGd74qgJnz5vWHX5UR3lB8N/A1I8W1Atf6jEjTbPi5P34aswjDV8qqAjL JJ5THpKvVrh24ccUgNEMfDbuyIilxrdb3/D+cOle4/7RXRK5Ji1QlJ6pMlwgvBCl7p FyiI7RCD9113eBy/D0pzcIdUrnFqIu3q0wBzr7AUu1/QFWZ3ut7shhUdhXTyqMLx1r RKzmoDWUvwUqg== From: Cristian Ciocaltea To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Sugar Zhang , Jagan Teki , Kever Yang , Elaine Zhang , Nicolas Frattaroli Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH v4 3/5] arm64: dts: rockchip: rk3588s: Add I2S nodes Date: Sun, 2 Apr 2023 12:50:52 +0300 Message-Id: <20230402095054.384739-4-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230402095054.384739-1-cristian.ciocaltea@collabora.com> References: <20230402095054.384739-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762058096514159294?= X-GMAIL-MSGID: =?utf-8?q?1762058096514159294?= There are five I2S/PCM/TDM controllers and two I2S/PCM controllers embedded in the RK3588 and RK3588S SoCs. Add the DT nodes corresponding to the above mentioned Rockchip controllers. Also note RK3588 SoC contains four additional I2S/PCM/TDM controllers, which are handled via a separate patch. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 148 ++++++++++++++++++++++ 1 file changed, 148 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index e3546cfacc88..cabf1cfe208e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -821,6 +821,57 @@ power-domain@RK3588_PD_SDMMC { }; }; + i2s4_8ch: i2s@fddc0000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x0 0xfddc0000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S4_8CH_TX>, <&cru MCLK_I2S4_8CH_TX>, <&cru HCLK_I2S4_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + assigned-clocks = <&cru CLK_I2S4_8CH_TX_SRC>; + assigned-clock-parents = <&cru PLL_AUPLL>; + dmas = <&dmac2 0>; + dma-names = "tx"; + power-domains = <&power RK3588_PD_VO0>; + resets = <&cru SRST_M_I2S4_8CH_TX>; + reset-names = "tx-m"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s5_8ch: i2s@fddf0000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x0 0xfddf0000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S5_8CH_TX>, <&cru MCLK_I2S5_8CH_TX>, <&cru HCLK_I2S5_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + assigned-clocks = <&cru CLK_I2S5_8CH_TX_SRC>; + assigned-clock-parents = <&cru PLL_AUPLL>; + dmas = <&dmac2 2>; + dma-names = "tx"; + power-domains = <&power RK3588_PD_VO1>; + resets = <&cru SRST_M_I2S5_8CH_TX>; + reset-names = "tx-m"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s9_8ch: i2s@fddfc000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x0 0xfddfc000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S9_8CH_RX>, <&cru MCLK_I2S9_8CH_RX>, <&cru HCLK_I2S9_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + assigned-clocks = <&cru CLK_I2S9_8CH_RX_SRC>; + assigned-clock-parents = <&cru PLL_AUPLL>; + dmas = <&dmac2 23>; + dma-names = "rx"; + power-domains = <&power RK3588_PD_VO1>; + resets = <&cru SRST_M_I2S9_8CH_RX>; + reset-names = "rx-m"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + qos_gpu_m0: qos@fdf35000 { compatible = "rockchip,rk3588-qos", "syscon"; reg = <0x0 0xfdf35000 0x0 0x20>; @@ -1143,6 +1194,103 @@ sdhci: mmc@fe2e0000 { status = "disabled"; }; + i2s0_8ch: i2s@fe470000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x0 0xfe470000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>; + assigned-clock-parents = <&cru PLL_AUPLL>, <&cru PLL_AUPLL>; + dmas = <&dmac0 0>, <&dmac0 1>; + dma-names = "tx", "rx"; + power-domains = <&power RK3588_PD_AUDIO>; + resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>; + reset-names = "tx-m", "rx-m"; + rockchip,trcm-sync-tx-only; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_lrck + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdi1 + &i2s0_sdi2 + &i2s0_sdi3 + &i2s0_sdo0 + &i2s0_sdo1 + &i2s0_sdo2 + &i2s0_sdo3>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s1_8ch: i2s@fe480000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x0 0xfe480000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, <&cru HCLK_I2S1_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + dmas = <&dmac0 2>, <&dmac0 3>; + dma-names = "tx", "rx"; + resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>; + reset-names = "tx-m", "rx-m"; + rockchip,trcm-sync-tx-only; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_lrck + &i2s1m0_sclk + &i2s1m0_sdi0 + &i2s1m0_sdi1 + &i2s1m0_sdi2 + &i2s1m0_sdi3 + &i2s1m0_sdo0 + &i2s1m0_sdo1 + &i2s1m0_sdo2 + &i2s1m0_sdo3>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s2_2ch: i2s@fe490000 { + compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s"; + reg = <0x0 0xfe490000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>; + clock-names = "i2s_clk", "i2s_hclk"; + assigned-clocks = <&cru CLK_I2S2_2CH_SRC>; + assigned-clock-parents = <&cru PLL_AUPLL>; + dmas = <&dmac1 0>, <&dmac1 1>; + dma-names = "tx", "rx"; + power-domains = <&power RK3588_PD_AUDIO>; + rockchip,trcm-sync-tx-only; + pinctrl-names = "default"; + pinctrl-0 = <&i2s2m1_lrck + &i2s2m1_sclk + &i2s2m1_sdi + &i2s2m1_sdo>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s3_2ch: i2s@fe4a0000 { + compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s"; + reg = <0x0 0xfe4a0000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S3_2CH>, <&cru HCLK_I2S3_2CH>; + clock-names = "i2s_clk", "i2s_hclk"; + assigned-clocks = <&cru CLK_I2S3_2CH_SRC>; + assigned-clock-parents = <&cru PLL_AUPLL>; + dmas = <&dmac1 2>, <&dmac1 3>; + dma-names = "tx", "rx"; + power-domains = <&power RK3588_PD_AUDIO>; + rockchip,trcm-sync-tx-only; + pinctrl-names = "default"; + pinctrl-0 = <&i2s3_lrck + &i2s3_sclk + &i2s3_sdi + &i2s3_sdo>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@fe600000 { compatible = "arm,gic-v3"; reg = <0x0 0xfe600000 0 0x10000>, /* GICD */ From patchwork Sun Apr 2 09:50:53 2023 Content-Type: text/plain; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c5-20020a170902aa4500b001a216fddd01si5986579plr.647.2023.04.02.02.58.42; Sun, 02 Apr 2023 02:59:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=Vx8WEjF2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230336AbjDBJv3 (ORCPT + 99 others); Sun, 2 Apr 2023 05:51:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229945AbjDBJvX (ORCPT ); Sun, 2 Apr 2023 05:51:23 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A7B15B8D; Sun, 2 Apr 2023 02:51:13 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 28108660312D; Sun, 2 Apr 2023 10:51:12 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680429072; bh=VEHW/c/2s4Nzddue0SQRQN8yI6FlgApEF6XFoJ9BplU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Vx8WEjF2lA7GED+2VC23ZSYMdFobqU6uXTqxv01t8b6pc6fuoRjKnC3wlmrGV9Rna A2NEmDM81oWgSfprFVwTY/kwcnTT5+t6RMfreeRP8NRT3J7mhtJhDMNwDWyvk1K+s8 QtISG3TuVBmYCr3OMa+eAX6DAQD7QyIVi2p8ZCjSenNr6piCSoOX0jQw9IPR4e+uzT FngRE128Fc1XhUzQuu2EWFg+QriyzKuyE/FUnfT0Cxee/llX4UcQa1J7HtU9aYlXMy yj6E2U4NMhLAkq0xWyfIvIBRQR+lQ+JWZlP6WuHlrqXZpRHlD/dDim1JQo8QuRHT5o 8HPGl7Y9OiVbw== From: Cristian Ciocaltea To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Sugar Zhang , Jagan Teki , Kever Yang , Elaine Zhang , Nicolas Frattaroli Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH v4 4/5] arm64: dts: rockchip: rk3588: Add I2S nodes Date: Sun, 2 Apr 2023 12:50:53 +0300 Message-Id: <20230402095054.384739-5-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230402095054.384739-1-cristian.ciocaltea@collabora.com> References: <20230402095054.384739-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762058085416647918?= X-GMAIL-MSGID: =?utf-8?q?1762058085416647918?= In addition to the five I2S/PCM/TDM controllers and the two I2S/PCM controllers shared between the RK3588 and RK3588S SoCs, RK3588 provides another group of four I2S/PCM/TDM controllers. Add the DT nodes corresponding to the additional controllers. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 68 ++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index d085e57fbc4c..8be75556af8f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -7,6 +7,74 @@ #include "rk3588-pinctrl.dtsi" / { + i2s8_8ch: i2s@fddc8000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x0 0xfddc8000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S8_8CH_TX>, <&cru MCLK_I2S8_8CH_TX>, <&cru HCLK_I2S8_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + assigned-clocks = <&cru CLK_I2S8_8CH_TX_SRC>; + assigned-clock-parents = <&cru PLL_AUPLL>; + dmas = <&dmac2 22>; + dma-names = "tx"; + power-domains = <&power RK3588_PD_VO0>; + resets = <&cru SRST_M_I2S8_8CH_TX>; + reset-names = "tx-m"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s6_8ch: i2s@fddf4000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x0 0xfddf4000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S6_8CH_TX>, <&cru MCLK_I2S6_8CH_TX>, <&cru HCLK_I2S6_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + assigned-clocks = <&cru CLK_I2S6_8CH_TX_SRC>; + assigned-clock-parents = <&cru PLL_AUPLL>; + dmas = <&dmac2 4>; + dma-names = "tx"; + power-domains = <&power RK3588_PD_VO1>; + resets = <&cru SRST_M_I2S6_8CH_TX>; + reset-names = "tx-m"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s7_8ch: i2s@fddf8000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x0 0xfddf8000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S7_8CH_RX>, <&cru MCLK_I2S7_8CH_RX>, <&cru HCLK_I2S7_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + assigned-clocks = <&cru CLK_I2S7_8CH_RX_SRC>; + assigned-clock-parents = <&cru PLL_AUPLL>; + dmas = <&dmac2 21>; + dma-names = "rx"; + power-domains = <&power RK3588_PD_VO1>; + resets = <&cru SRST_M_I2S7_8CH_RX>; + reset-names = "rx-m"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s10_8ch: i2s@fde00000 { + compatible = "rockchip,rk3588-i2s-tdm"; + reg = <0x0 0xfde00000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S10_8CH_RX>, <&cru MCLK_I2S10_8CH_RX>, <&cru HCLK_I2S10_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + assigned-clocks = <&cru CLK_I2S10_8CH_RX_SRC>; + assigned-clock-parents = <&cru PLL_AUPLL>; + dmas = <&dmac2 24>; + dma-names = "rx"; + power-domains = <&power RK3588_PD_VO1>; + resets = <&cru SRST_M_I2S10_8CH_RX>; + reset-names = "rx-m"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + gmac0: ethernet@fe1b0000 { compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a"; reg = <0x0 0xfe1b0000 0x0 0x10000>; From patchwork Sun Apr 2 09:50:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 78212 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1657236vqo; Sun, 2 Apr 2023 02:52:24 -0700 (PDT) X-Google-Smtp-Source: AKy350YZFaFABHrtwdgdPJQ9iZXHZHlj7QfUtWDgyc3fasp5uHHNxBYJX1gmZybzmes1pk9S4NVq X-Received: by 2002:a17:903:294c:b0:19f:1871:3dcd with SMTP id li12-20020a170903294c00b0019f18713dcdmr29001373plb.5.1680429144483; Sun, 02 Apr 2023 02:52:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680429144; cv=none; d=google.com; s=arc-20160816; b=fRiM8m5O7G9k7r1vI0NTp5i3/NHulYyYD0b/VI34y3w7S1vbfCylKQP8mAhsZcCKsV kBADmusew8YwfRiR2RNG+9DIG2KhbLX1heIl8KUC0XmqVikjspZfAeIAGSyxcg5XK4Iw vDlLPe9tTd60fxpO+1YAsMgj5qkHoGaGaewUq84M+OIwq8v0KAn/YTcT859/DmhIeVla 2kNUxaR341pzsLHdrQhuKqP0zdldmgM7HFNZXyztcYMWhCzXhX0+wWLSyoOf0+xkm4dO mrrdysPg5yjr7vEOD3GXQ4AaJsNpIhMs4zclMiMDvQihWxY62Gx5OHB6JzqVZr8wbRDx JIyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ERHLqYOak3PribhDtDxY6bXVcyH/JJNOSe11G9Wp/FY=; b=gMdXJiR5BakcggV8h06jDlATGkOouqlJ3/ZNjCH/QDWcZQO9/ZMGr0cL97z+lkYRx5 ZIvhTQM4WblMlgSJ3e2KdvKihEQ8SHSLodi3xl/jas8scB/fd53UqPwI82Sp2fD+56dN 9jFfNh0GZYfGweRtM+KEsfxDUKA7e9DDj7ujh32Oz0SGF/hbI08WODZ6CzTACj3CUy7g b3fMPeJ+NJIYXNa482rE7jOZjBPTNIYwrw7RHFr6Tk10VOZeaV4ak+nhkkUn/vlqPbLc r2cwUmmtIkdevjYm1TvJenv0sPpqa9s58eSQYSmFllN/HPn7H21+/G0QaaC6DkH39Jca dr+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=VPVs0DcG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id kb14-20020a170903338e00b001a1c5d7f9a5si5644636plb.14.2023.04.02.02.52.12; Sun, 02 Apr 2023 02:52:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=VPVs0DcG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230389AbjDBJvd (ORCPT + 99 others); Sun, 2 Apr 2023 05:51:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230338AbjDBJv0 (ORCPT ); Sun, 2 Apr 2023 05:51:26 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2200C2702E; Sun, 2 Apr 2023 02:51:17 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 124C0660312B; Sun, 2 Apr 2023 10:51:15 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680429075; bh=kJdtSesynjBrpuEEDEDtpj5X9IcAxkUH0Y/1s8Txv6c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VPVs0DcGUSDRxbBrFcdRhMjqt8jtEg5eb28bos+eF5kpI1VDZqZ+dhsFH6buDdKEF WRtsAa5DN849V5kQTAZqh5CSiBloB8WjFuyNhoQOPhwCLtLqjX41p9uS7ig9l+0g7O x+YMryXdGC068oBI9C4vV1pMHo2HR7hpKbgZrM6yfoRb55Oh08or6wydCW73SySoDl wI6DD6mb+GWdIwzNpGS3MsuMEvfsi3FV4pI4887sWayoBH6bMHxmvqRZH22yVcpoGN b9Wwd9LRONXwRIlWMy0iTmmYe3yohpbl5kNze3lBsMqTI2caZkP7C2rUdnPF9IMStE xba9WMu6jAwSg== From: Cristian Ciocaltea To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Sugar Zhang , Jagan Teki , Kever Yang , Elaine Zhang , Nicolas Frattaroli Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH v4 5/5] arm64: dts: rockchip: rk3588-rock-5b: Add analog audio Date: Sun, 2 Apr 2023 12:50:54 +0300 Message-Id: <20230402095054.384739-6-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230402095054.384739-1-cristian.ciocaltea@collabora.com> References: <20230402095054.384739-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762057670243949643?= X-GMAIL-MSGID: =?utf-8?q?1762057670243949643?= Add the necessary DT nodes for the Rock 5B board to enable the analog audio support provided by the Everest Semi ES8316 codec. Signed-off-by: Cristian Ciocaltea Reviewed-by: Christopher Obbard --- .../boot/dts/rockchip/rk3588-rock-5b.dts | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts index 95805cb0adfa..a9e12e098d48 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -2,6 +2,7 @@ /dts-v1/; +#include #include "rk3588.dtsi" / { @@ -17,6 +18,23 @@ chosen { stdout-path = "serial2:1500000n8"; }; + sound { + compatible = "audio-graph-card"; + label = "Analog"; + + widgets = "Microphone", "Mic Jack", + "Headphone", "Headphones"; + + routing = "MIC2", "Mic Jack", + "Headphones", "HPOL", + "Headphones", "HPOR"; + + dais = <&i2s0_8ch_p0>; + hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hp_detect>; + }; + vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; @@ -27,6 +45,50 @@ vcc5v0_sys: vcc5v0-sys-regulator { }; }; +&i2c7 { + status = "okay"; + + es8316: es8316@11 { + compatible = "everest,es8316"; + reg = <0x11>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + + port { + es8316_p0_0: endpoint { + remote-endpoint = <&i2s0_8ch_p0_0>; + }; + }; + }; +}; + +&i2s0_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_lrck + &i2s0_mclk + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; + status = "okay"; + + i2s0_8ch_p0: port { + i2s0_8ch_p0_0: endpoint { + dai-format = "i2s"; + mclk-fs = <256>; + remote-endpoint = <&es8316_p0_0>; + }; + }; +}; + +&pinctrl { + sound { + hp_detect: hp-detect { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + &sdhci { bus-width = <8>; no-sdio;