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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team Cc: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Fabio Estevam , NXP Linux Team , Maxime Coquelin , Wong Vee Khee , Andrey Konovalov , Revanth Kumar Uppala , Tan Tee Min , Shenwei Wang , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-kernel@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH v2 1/2] net: stmmac: add support for platform specific reset Date: Fri, 31 Mar 2023 11:31:42 -0500 Message-Id: <20230331163143.52506-1-shenwei.wang@nxp.com> X-Mailer: git-send-email 2.34.1 X-ClientProxiedBy: BY3PR05CA0040.namprd05.prod.outlook.com (2603:10b6:a03:39b::15) To PAXPR04MB9185.eurprd04.prod.outlook.com (2603:10a6:102:231::11) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9185:EE_|VE1PR04MB7213:EE_ X-MS-Office365-Filtering-Correlation-Id: c1f7d365-bcfe-402b-a490-08db32057896 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Some SoCs require a different reset mechanism than the standard dwmac IP reset. To support these platforms, a new function pointer 'fix_soc_reset' is added to the plat_stmmacenet_data structure. The stmmac_reset macro in hwif.h is modified to call the 'fix_soc_reset' function if it exists. This enables the driver to use the platform-specific reset logic when necessary. Signed-off-by: Shenwei Wang --- drivers/net/ethernet/stmicro/stmmac/hwif.c | 10 ++++++++++ drivers/net/ethernet/stmicro/stmmac/hwif.h | 3 +-- include/linux/stmmac.h | 1 + 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c index bb7114f970f8..0eefa697ffe8 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.c +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c @@ -87,6 +87,16 @@ static int stmmac_dwxlgmac_quirks(struct stmmac_priv *priv) return 0; } +int stmmac_reset(struct stmmac_priv *priv, void __iomem *ioaddr) +{ + struct plat_stmmacenet_data *plat = priv ? priv->plat : NULL; + + if (plat && plat->fix_soc_reset) + return plat->fix_soc_reset(plat, ioaddr); + + return stmmac_do_callback(priv, dma, reset, ioaddr); +} + static const struct stmmac_hwif_entry { bool gmac; bool gmac4; diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h index 16a7421715cb..47a68f506c10 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.h +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h @@ -214,8 +214,6 @@ struct stmmac_dma_ops { int (*enable_tbs)(void __iomem *ioaddr, bool en, u32 chan); }; -#define stmmac_reset(__priv, __args...) \ - stmmac_do_callback(__priv, dma, reset, __args) #define stmmac_dma_init(__priv, __args...) \ stmmac_do_void_callback(__priv, dma, init, __args) #define stmmac_init_chan(__priv, __args...) \ @@ -640,6 +638,7 @@ extern const struct stmmac_mmc_ops dwxgmac_mmc_ops; #define GMAC_VERSION 0x00000020 /* GMAC CORE Version */ #define GMAC4_VERSION 0x00000110 /* GMAC4+ CORE Version */ +int stmmac_reset(struct stmmac_priv *priv, void *ioaddr); int stmmac_hwif_init(struct stmmac_priv *priv); #endif /* __STMMAC_HWIF_H__ */ diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index a152678b82b7..9044477fad61 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -223,6 +223,7 @@ struct plat_stmmacenet_data { struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES]; struct stmmac_txq_cfg tx_queues_cfg[MTL_MAX_TX_QUEUES]; void (*fix_mac_speed)(void *priv, unsigned int speed); + int (*fix_soc_reset)(void *priv, void __iomem *ioaddr); int (*serdes_powerup)(struct net_device *ndev, void *priv); void (*serdes_powerdown)(struct net_device *ndev, void *priv); void (*speed_mode_2500)(struct net_device *ndev, void *priv); From patchwork Fri Mar 31 16:31:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shenwei Wang X-Patchwork-Id: 77918 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp713984vqo; Fri, 31 Mar 2023 10:11:27 -0700 (PDT) X-Google-Smtp-Source: AKy350Z2z2uTvFTQLX1xUAvLOqkZmS/sXKVGpRZEdENa3ohOwgRv3hCP609ORcIkn0Ny0+UsS6Or X-Received: by 2002:a17:90a:34c:b0:23d:360:877d with SMTP id 12-20020a17090a034c00b0023d0360877dmr29672346pjf.32.1680282687204; Fri, 31 Mar 2023 10:11:27 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1680282687; cv=pass; d=google.com; s=arc-20160816; b=09sjJgdeMyC/gETUI+lmVl9m5ch83XrjCwuI4Sw3snxR4eEdS8r5ADIOOUGQZNtNBO El+JXKCQCvO0BWvyZW77Wre7dqaOPPIe+OxjxOw6O1XDmo9Jn7kf51ELZ/cDQ00UOCvQ 1lyUZrxdjv9AlAIZPaQbGbv73Tx/btj/9DH31YWSBvqu2D2/4JEfSvxMFWhSkic5yxQI PmSGuwXCNAwQRQH9GINxemRC1REybxJle7hZKM9qqL3u6yrzTT1NstMLC21rcBx39mo/ Ytko6TLJ+AiUrRQJRc4pXA79jcBw7/ZLQGJaJ4sBrjsORmuFvs3ND3q0eYtp6HtH6bLP gvkA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:content-transfer-encoding :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=yl/Nal0PpgBFmmyQJ3enEWiLymBs3mGdmq4D2SJEd18=; b=QjcVxdJ4Bu1VVVgGQpietl9X6ROl5GA2pu7nytedbqfFHWT1VbUbXMi5ZMvf/yuPCX Rl44cBc1vfm+t3xZuQmLvbeqz3+6hzMKI0gCaN947cOdMVFN1g3CjwknQnygpT6J90sT vJNUr87N29wpB1RsEdyzHWbFW760KK1S2sOa3lLXxdGifZjiRSELFohuG0RLzXEPqF0E LqPzUZKfV/+RSlgzWTP5XXluJxb3QekQ95bpCZ96lsGmD8RNspbz0Frn8fY1aZoga3fy kRFrdpI3XGnKiiR8vQAkGE1qFxQRk97tRMP2Tn7vUYAw7CmGcTHh88Jsj3mr1gnkTbHG S/QA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@nxp.com header.s=selector2 header.b=cPPzTDKn; arc=pass (i=1 spf=pass spfdomain=nxp.com dkim=pass dkdomain=nxp.com dmarc=pass fromdomain=nxp.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from out1.vger.email (out1.vger.email. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team Cc: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Fabio Estevam , NXP Linux Team , Maxime Coquelin , Wong Vee Khee , Andrey Konovalov , Revanth Kumar Uppala , Tan Tee Min , Shenwei Wang , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-kernel@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH v2 2/2] net: stmmac: dwmac-imx: use platform specific reset for imx93 SoCs Date: Fri, 31 Mar 2023 11:31:43 -0500 Message-Id: <20230331163143.52506-2-shenwei.wang@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230331163143.52506-1-shenwei.wang@nxp.com> References: <20230331163143.52506-1-shenwei.wang@nxp.com> X-ClientProxiedBy: SJ0PR03CA0072.namprd03.prod.outlook.com (2603:10b6:a03:331::17) To PAXPR04MB9185.eurprd04.prod.outlook.com (2603:10a6:102:231::11) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9185:EE_|VE1PR04MB7213:EE_ X-MS-Office365-Filtering-Correlation-Id: 6085b80a-0fc0-42f9-5485-08db32057cb7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The patch implements a fix_soc_reset function and uses it specifically for the i.MX93 SoCs. Signed-off-by: Shenwei Wang --- .../net/ethernet/stmicro/stmmac/dwmac-imx.c | 27 ++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c index ac8580f501e2..3329150010ce 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c @@ -19,9 +19,9 @@ #include #include #include -#include #include "stmmac_platform.h" +#include "common.h" #define GPR_ENET_QOS_INTF_MODE_MASK GENMASK(21, 16) #define GPR_ENET_QOS_INTF_SEL_MII (0x0 << 16) @@ -37,6 +37,10 @@ #define MX93_GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 1) #define MX93_GPR_ENET_QOS_CLK_GEN_EN (0x1 << 0) +#define DMA_BUS_MODE 0x00001000 +#define DMA_BUS_MODE_SFT_RESET (0x1 << 0) +#define RMII_RESET_SPEED (0x3 << 14) + struct imx_dwmac_ops { u32 addr_width; bool mac_rgmii_txclk_auto_adj; @@ -207,6 +211,24 @@ static void imx_dwmac_fix_speed(void *priv, unsigned int speed) dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate); } +static int imx_dwmac_mx93_reset(void *priv, void __iomem *ioaddr) +{ + struct plat_stmmacenet_data *plat_dat = priv; + u32 value = readl(ioaddr + DMA_BUS_MODE); + + /* DMA SW reset */ + value |= DMA_BUS_MODE_SFT_RESET; + writel(value, ioaddr + DMA_BUS_MODE); + + usleep_range(100, 200); + if (plat_dat->interface == PHY_INTERFACE_MODE_RMII) + writel(RMII_RESET_SPEED, ioaddr + MAC_CTRL_REG); + + return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value, + !(value & DMA_BUS_MODE_SFT_RESET), + 10000, 1000000); +} + static int imx_dwmac_parse_dt(struct imx_priv_data *dwmac, struct device *dev) { @@ -305,6 +327,9 @@ static int imx_dwmac_probe(struct platform_device *pdev) if (ret) goto err_dwmac_init; + if (of_machine_is_compatible("fsl,imx93")) + dwmac->plat_dat->fix_soc_reset = imx_dwmac_mx93_reset; + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); if (ret) goto err_drv_probe;