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d="scan'208";a="717730409" Received: from lab-ah.igk.intel.com ([10.102.138.202]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Mar 2023 07:16:48 -0700 From: Andrzej Hajda Date: Fri, 31 Mar 2023 16:16:36 +0200 Subject: [PATCH v2] drm/i915/gt: Hold a wakeref for the active VM MIME-Version: 1.0 Message-Id: <20230330-hold_wakeref_for_active_vm-v2-1-724d201499c2@intel.com> X-B4-Tracking: v=1; b=H4sIAETrJmQC/42OSw6DIBRFt2IYl4aP0dhR99EYgvgoL1UxQGgb4 96LrqDDc2/uZyMRAkIkt2ojATJG9EsBcamIcXp5AsWxMBFMSCYlo85Po3rrFwSwyvqgtEmYQeWZ tpZxqeu6AytJKRh0BDoEvRh3VIxhpgnXw1lLGD/n7KMv7DAmH77ni8wP9a/BzCmngza65aLphG3 uuCSYrsbPpN/3/QdPBHkC3gAAAA== To: Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Daniel Vetter Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Chris Wilson , Andi Shyti , Chris Wilson , Andrzej Hajda X-Mailer: b4 0.11.1 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761893226828590265?= X-GMAIL-MSGID: =?utf-8?q?1761893226828590265?= From: Chris Wilson There may be a disconnect between the GT used by the engine and the GT used for the VM, requiring us to hold a wakeref on both while the GPU is active with this request. v2: added explanation to __queue_and_release_pm Signed-off-by: Chris Wilson [ahajda: removed not-yet-upstremed wakeref tracking bits] Signed-off-by: Andrzej Hajda Reviewed-by: Tvrtko Ursulin Reviewed-by: Andi Shyti --- Changes in v2: - Link to v1: https://lore.kernel.org/r/20230330-hold_wakeref_for_active_vm-v1-1-baca712692f6@intel.com --- drivers/gpu/drm/i915/gt/intel_context.h | 15 +++++++++++---- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 9 +++++++++ 2 files changed, 20 insertions(+), 4 deletions(-) --- base-commit: 3385d6482cd60f2a0bbb0fa97b70ae7dbba4f95c change-id: 20230330-hold_wakeref_for_active_vm-7f013a449ef3 Best regards, diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h index 0a8d553da3f439..48f888c3da083b 100644 --- a/drivers/gpu/drm/i915/gt/intel_context.h +++ b/drivers/gpu/drm/i915/gt/intel_context.h @@ -14,6 +14,7 @@ #include "i915_drv.h" #include "intel_context_types.h" #include "intel_engine_types.h" +#include "intel_gt_pm.h" #include "intel_ring_types.h" #include "intel_timeline_types.h" #include "i915_trace.h" @@ -207,8 +208,11 @@ void intel_context_exit_engine(struct intel_context *ce); static inline void intel_context_enter(struct intel_context *ce) { lockdep_assert_held(&ce->timeline->mutex); - if (!ce->active_count++) - ce->ops->enter(ce); + if (ce->active_count++) + return; + + ce->ops->enter(ce); + intel_gt_pm_get(ce->vm->gt); } static inline void intel_context_mark_active(struct intel_context *ce) @@ -222,8 +226,11 @@ static inline void intel_context_exit(struct intel_context *ce) { lockdep_assert_held(&ce->timeline->mutex); GEM_BUG_ON(!ce->active_count); - if (!--ce->active_count) - ce->ops->exit(ce); + if (--ce->active_count) + return; + + intel_gt_pm_put_async(ce->vm->gt); + ce->ops->exit(ce); } static inline struct intel_context *intel_context_get(struct intel_context *ce) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c index e971b153fda976..ee531a5c142c77 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c @@ -114,6 +114,15 @@ __queue_and_release_pm(struct i915_request *rq, ENGINE_TRACE(engine, "parking\n"); + /* + * Open coded one half of intel_context_enter, which we have to omit + * here (see the large comment below) and because the other part must + * not be called due constructing directly with __i915_request_create + * which increments active count via intel_context_mark_active. + */ + GEM_BUG_ON(rq->context->active_count != 1); + __intel_gt_pm_get(engine->gt); + /* * We have to serialise all potential retirement paths with our * submission, as we don't want to underflow either the