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[2620:137:e000::1:20]) by mx.google.com with ESMTP id r9-20020aa7d149000000b004acbeceab83si34925057edo.448.2023.03.29.23.35.37; Wed, 29 Mar 2023 23:36:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=Fn5nnpbC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229837AbjC3GfI (ORCPT + 99 others); Thu, 30 Mar 2023 02:35:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55148 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229595AbjC3GfG (ORCPT ); Thu, 30 Mar 2023 02:35:06 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6033265A9 for ; Wed, 29 Mar 2023 23:35:05 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-5461fe3163eso47452037b3.17 for ; Wed, 29 Mar 2023 23:35:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; t=1680158104; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=H4XJD2H+uA3ZKVf/qBdJwtkZFmjUhMkPOEUkmWMqpBE=; b=Fn5nnpbCOqBGSCpvePohnp/LYXOjlaWyo7dClBiDjwYsGEcWQ/l24kYPZjE1EA8ngm RkYCCh4kL4ZEMCizgZQ/voC6sL0VmFhq2HhEl6N+gWOBN/Ok/DgHzco/sRSHyoNA+VcX 9C6aCIfP/r8LNxtZzhZuhu5dy8hME1X3ZAsGgThTduXqQlSnbtoswTCT5E7d55XMgndU l5MG8vSAYejEWCYqFcCiVHTc0LQgV0wQmj5Bn0WBmzciR9Og9Qowznh3hxidgUutMU+K LHC85PCMzqdTCz3ZYtvV9NYVT6GMkk542OpQqvQtz37DwEnSgoaF3uB/t5siQpw8/T+/ G68A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680158104; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=H4XJD2H+uA3ZKVf/qBdJwtkZFmjUhMkPOEUkmWMqpBE=; b=RYEPIk7b25mUAYE1sEIZJ+aZ4ommqDcSQjssrA6lCC86OSjzieTKwWCtCbPRlsfz37 ad3iYedhMc4Mg9gmgbEKANsSXrFA++HStT7UpO7dk8ISpJynuApkfepVq/mYu0stsS41 hTEjZSTOupqMZgTERGo5pRdTpNt4L6opVMH73vrxgDQJGJ5kzlFYVzofwmYJN3crkW/P lm9jgEtQhM1l8xG7/uc7zB1zzrDlGRiS5HNiOQSCHX19+nJiYBmH8+B8u+pDkBebbmj6 cHYN592eJgwIJlovU/7KYkF8aC5GCX7tXuxyPyTQZtJg/uHaUWYTgW99+p+mapx/d/fH q/LQ== X-Gm-Message-State: AAQBX9e/O2pYhCyzX4upL/mIHhAtckoa1NE/KfmdRwVJxnHgPyLM5H9z lTJ5XFzoHr+DJVddQAvGJ6FdYhyxViTyCw== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a81:4410:0:b0:545:a7d8:f278 with SMTP id r16-20020a814410000000b00545a7d8f278mr10413624ywa.5.1680158104432; Wed, 29 Mar 2023 23:35:04 -0700 (PDT) Date: Thu, 30 Mar 2023 06:34:49 +0000 In-Reply-To: <20230330063450.2289058-1-joychakr@google.com> Mime-Version: 1.0 References: <20230330063450.2289058-1-joychakr@google.com> X-Mailer: git-send-email 2.40.0.423.gd6c402a77b-goog Message-ID: <20230330063450.2289058-2-joychakr@google.com> Subject: [PATCH v5 1/2] spi: dw: Add 32 bpw support to DW DMA Controller From: Joy Chakraborty To: Serge Semin , Mark Brown Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty X-Spam-Status: No, score=-7.7 required=5.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,USER_IN_DEF_DKIM_WL autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761773524723327302?= X-GMAIL-MSGID: =?utf-8?q?1761773524723327302?= Add Support for AxSize = 4 bytes configuration from dw dma driver if n_bytes i.e. number of bytes per write to fifo is 3 or 4. Number of bytes written to fifo per write is depended on the bits/word configuration being used which the DW core driver translates to n_bytes. Signed-off-by: Joy Chakraborty --- drivers/spi/spi-dw-dma.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index ababb910b391..b3a88bb75907 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -208,12 +208,17 @@ static bool dw_spi_can_dma(struct spi_controller *master, static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) { - if (n_bytes == 1) + switch (n_bytes) { + case 1: return DMA_SLAVE_BUSWIDTH_1_BYTE; - else if (n_bytes == 2) + case 2: return DMA_SLAVE_BUSWIDTH_2_BYTES; - - return DMA_SLAVE_BUSWIDTH_UNDEFINED; + case 3: + case 4: + return DMA_SLAVE_BUSWIDTH_4_BYTES; + default: + return DMA_SLAVE_BUSWIDTH_UNDEFINED; + } } static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed) From patchwork Thu Mar 30 06:34:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joy Chakraborty X-Patchwork-Id: 76908 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp914801vqo; Wed, 29 Mar 2023 23:36:16 -0700 (PDT) X-Google-Smtp-Source: AKy350ZDhvrcaMxfzzgQ0hC9hIYj0HnuvrJrGg1CdIqL/FxkZONihL+J4er+CFMIvlsKZPnsN5mC X-Received: by 2002:a17:906:fc0b:b0:87b:e105:5d9a with SMTP id ov11-20020a170906fc0b00b0087be1055d9amr23393013ejb.67.1680158175952; Wed, 29 Mar 2023 23:36:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680158175; cv=none; d=google.com; s=arc-20160816; b=QOo11wPI0g5TG18iR0rs3M5iWL4TEePRU71sFMEQEqypxa24o0QEL+MsG5i8nOwzdL viSpy4yAmbxVo75ZqqAzX0QoReg94Rv/aEQI8t/84UcHl5bTwh/jyuyFUmJErjFzX5/G VW440vwSLErDuM9tlI3rql2IzAL71CBUNr/bJ5QR0cKqZjUJ2tq7PDbBNr+pI66Q/m0j Y079DUpCwuuYF722cNko4BFtZRlNArNpAs8YePynSGgm1ymO1+zbrLzNepsS9yhwIh3X IEz04PIrYOJP+ojnYZlYS7UGV/D2TDPl0Gdn8uyJTCHBG3oAF3s6PDk9oLL5j86uaJ9S GKDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=wzZwH9dx6YYRbHyGgT/KwAafiDr7gE6Ub/HAeGpi8so=; b=xtpgFgv7ibCKhs7iJHRvk1YXUZOghNam4TfAFfMDa3PWI4WjqGUFhzl1ueUvYa5p32 UBHovrtzOgJmWVOa/YiO2uUY9EyJcjBma9bEjyzbOmBrgN7KU2G+hEo2PdrgoBbq8V1E +mCoxVTkoz08ipec1ocfSmS7BU4vfVt/eC93pv2F3ItD+5fZhyI3Y2wiVKP0OtMC6xk8 FakCMlhrQEUFfDIzvpp1a7h71ASz+yCFf4THFdLuqznOPEFB6cYhaK+y58MeGjc3bmPo a7qH3qJPF4FwlWstxmpyAxZUSZiO9sSEQ85jPvXv7Co7BoJ72yaGACFEc/706mWv+1Ji RR/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=PtX3mfZr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Joy Chakraborty --- drivers/spi/spi-dw-dma.c | 57 +++++++++++++++++++++++++++++++++------- drivers/spi/spi-dw.h | 1 + 2 files changed, 48 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index b3a88bb75907..31e40b054c82 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -23,6 +23,8 @@ #define DW_SPI_TX_BUSY 1 #define DW_SPI_TX_BURST_LEVEL 16 +static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes); + static bool dw_spi_dma_chan_filter(struct dma_chan *chan, void *param) { struct dw_dma_slave *s = param; @@ -72,12 +74,22 @@ static void dw_spi_dma_maxburst_init(struct dw_spi *dws) dw_writel(dws, DW_SPI_DMATDLR, dws->txburst); } -static void dw_spi_dma_sg_burst_init(struct dw_spi *dws) +static int dw_spi_dma_caps_init(struct dw_spi *dws) { - struct dma_slave_caps tx = {0}, rx = {0}; + struct dma_slave_caps tx, rx; + int ret; + + ret = dma_get_slave_caps(dws->txchan, &tx); + if (ret) + return ret; + + ret = dma_get_slave_caps(dws->rxchan, &rx); + if (ret) + return ret; - dma_get_slave_caps(dws->txchan, &tx); - dma_get_slave_caps(dws->rxchan, &rx); + if (!(tx.directions & BIT(DMA_MEM_TO_DEV) && + rx.directions & BIT(DMA_DEV_TO_MEM))) + return -ENXIO; if (tx.max_sg_burst > 0 && rx.max_sg_burst > 0) dws->dma_sg_burst = min(tx.max_sg_burst, rx.max_sg_burst); @@ -87,6 +99,14 @@ static void dw_spi_dma_sg_burst_init(struct dw_spi *dws) dws->dma_sg_burst = rx.max_sg_burst; else dws->dma_sg_burst = 0; + + /* + * Assuming both channels belong to the same DMA controller hence the + * address width capabilities most likely would be the same. + */ + dws->dma_addr_widths = tx.dst_addr_widths & rx.src_addr_widths; + + return 0; } static int dw_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws) @@ -95,6 +115,7 @@ static int dw_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws) struct dw_dma_slave dma_rx = { .src_id = 0 }, *rx = &dma_rx; struct pci_dev *dma_dev; dma_cap_mask_t mask; + int ret = -EBUSY; /* * Get pci device for DMA controller, currently it could only @@ -124,20 +145,25 @@ static int dw_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws) init_completion(&dws->dma_completion); - dw_spi_dma_maxburst_init(dws); + ret = dw_spi_dma_caps_init(dws); + if (ret) + goto free_txchan; - dw_spi_dma_sg_burst_init(dws); + dw_spi_dma_maxburst_init(dws); pci_dev_put(dma_dev); return 0; +free_txchan: + dma_release_channel(dws->txchan); + dws->txchan = NULL; free_rxchan: dma_release_channel(dws->rxchan); dws->rxchan = NULL; err_exit: pci_dev_put(dma_dev); - return -EBUSY; + return ret; } static int dw_spi_dma_init_generic(struct device *dev, struct dw_spi *dws) @@ -163,12 +189,17 @@ static int dw_spi_dma_init_generic(struct device *dev, struct dw_spi *dws) init_completion(&dws->dma_completion); - dw_spi_dma_maxburst_init(dws); + ret = dw_spi_dma_caps_init(dws); + if (ret) + goto free_txchan; - dw_spi_dma_sg_burst_init(dws); + dw_spi_dma_maxburst_init(dws); return 0; +free_txchan: + dma_release_channel(dws->txchan); + dws->txchan = NULL; free_rxchan: dma_release_channel(dws->rxchan); dws->rxchan = NULL; @@ -202,8 +233,14 @@ static bool dw_spi_can_dma(struct spi_controller *master, struct spi_device *spi, struct spi_transfer *xfer) { struct dw_spi *dws = spi_controller_get_devdata(master); + enum dma_slave_buswidth dma_bus_width; + + if (xfer->len <= dws->fifo_len) + return false; + + dma_bus_width = dw_spi_dma_convert_width(dws->n_bytes); - return xfer->len > dws->fifo_len; + return dws->dma_addr_widths & BIT(dma_bus_width); } static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 9e8eb2b52d5c..3962e6dcf880 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -190,6 +190,7 @@ struct dw_spi { struct dma_chan *rxchan; u32 rxburst; u32 dma_sg_burst; + u32 dma_addr_widths; unsigned long dma_chan_busy; dma_addr_t dma_addr; /* phy address of the Data register */ const struct dw_spi_dma_ops *dma_ops;