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Thu, 30 Mar 2023 00:08:22 -0500 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB07.amd.com (10.181.41.45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Wed, 29 Mar 2023 22:08:17 -0700 Received: from xhdharinik40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 30 Mar 2023 00:08:14 -0500 From: Harini Katakam To: , , , , , , , CC: , , , , Subject: [PATCH net-next v4 1/3] net: macb: Update gem PTP support check Date: Thu, 30 Mar 2023 10:38:07 +0530 Message-ID: <20230330050809.19180-2-harini.katakam@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230330050809.19180-1-harini.katakam@amd.com> References: <20230330050809.19180-1-harini.katakam@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT116:EE_|BY5PR12MB4164:EE_ X-MS-Office365-Filtering-Correlation-Id: bb28aa0f-f635-468f-9066-08db30dccbb8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Mar 2023 05:08:27.1397 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bb28aa0f-f635-468f-9066-08db30dccbb8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT116.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4164 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761768134988068483?= X-GMAIL-MSGID: =?utf-8?q?1761768134988068483?= There are currently two checks for PTP functionality - one on GEM capability and another on the kernel config option. Combine them into a single function as there's no use case where gem_has_ptp is TRUE and MACB_USE_HWSTAMP is false. Signed-off-by: Harini Katakam --- v4: Fixed error introduced in 1/3 in v3: Reported-by: kernel test robot Link: https://lore.kernel.org/oe-kbuild-all/202303280600.LarprmhI-lkp@intel.com/ v3: New patch drivers/net/ethernet/cadence/macb.h | 2 +- drivers/net/ethernet/cadence/macb_main.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index c1fc91c97cee..b6c5ecbd572c 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -1363,7 +1363,7 @@ static inline bool macb_is_gem(struct macb *bp) static inline bool gem_has_ptp(struct macb *bp) { - return !!(bp->caps & MACB_CAPS_GEM_HAS_PTP); + return (IS_ENABLED(CONFIG_MACB_USE_HWSTAMP) && (!!(bp->caps & MACB_CAPS_GEM_HAS_PTP))); } /** diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index f77bd1223c8f..eab2d41fa571 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -3889,17 +3889,17 @@ static void macb_configure_caps(struct macb *bp, dcfg = gem_readl(bp, DCFG2); if ((dcfg & (GEM_BIT(RX_PKT_BUFF) | GEM_BIT(TX_PKT_BUFF))) == 0) bp->caps |= MACB_CAPS_FIFO_MODE; -#ifdef CONFIG_MACB_USE_HWSTAMP if (gem_has_ptp(bp)) { if (!GEM_BFEXT(TSU, gem_readl(bp, DCFG5))) dev_err(&bp->pdev->dev, "GEM doesn't support hardware ptp.\n"); else { +#ifdef CONFIG_MACB_USE_HWSTAMP bp->hw_dma_cap |= HW_DMA_CAP_PTP; bp->ptp_info = &gem_ptp_info; +#endif } } -#endif } dev_dbg(&bp->pdev->dev, "Cadence caps 0x%08x\n", bp->caps); From patchwork Thu Mar 30 05:08:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harini Katakam X-Patchwork-Id: 76898 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp883967vqo; Wed, 29 Mar 2023 22:17:56 -0700 (PDT) X-Google-Smtp-Source: AKy350ZP9bilVqW8YeuJGWUK2gVNpBYN5cUZAFdv2aRJG7/JS7EBKqsTpSi1AKlJcvfWIi0Q/eMC X-Received: by 2002:a17:902:e54a:b0:1a0:4531:af58 with SMTP id n10-20020a170902e54a00b001a04531af58mr26319124plf.63.1680153475774; Wed, 29 Mar 2023 22:17:55 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1680153475; cv=pass; d=google.com; s=arc-20160816; b=SaTJgyDdwL6eNWUgGOyrBzdo5DzisJQXb6EqO7ahUo+u2eOoGSoK68qDdh393Vqgbz S4kPSCUSdRAbt+Gt9mUlH7yITfPCvnS3R7kjZRXotwSVJX/pNJdOJc8NFuBOBk70YDql eqNRgISMHx3u20R0bUTtLd+M+jC00OlWH1pgh/oluirHwb1M7n6lxHvrx/K5kTPXc9iL bbx4lxFj4CshxsPM9KJcOU+AcCO+tnxdydHzODWBcAMwzxTNMvjFl3xztKzL3wTIa3/t hr45Pqquj+4BgSkp92WwK0pIiA05aUqO5En5mWR1P9NDBKRjlS5B5OfvgAiwBM2ys3jJ ox1g== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=QUwt/eGcfM8NlhSUCuGI8k970cE04K38r5SINOYbyDY=; b=I+w6MxiQc7ujqtNygjSDHtug/Z+m8e9jkgNiHLo/uZ5sZWORyXIvYCiS2feWzItbAo kC4aPg0u42cFv0zwEUViW4SRbcA25umUDa8pLyPSGSFBkgghpHA/eSPUS6hLsKTdTpVY Rsi48Egqwex8CpYFvhtFmcwq6to4yO+ogjjq7qZe2IMcDjGu0afBw0lkQ90ULxtkiAmG 4iJMQ6c4ow71ZFt/jpNFTzxkgNYVc1EgisJ442iHU0ZDrfnX+q3nC3uWAkNJRN1zqD0y wotXKFPah1cD0+uyx7P/zgTZnpNx/dZbIQ0y2eLOjjmIuHVTVIQ0xFzLngLz0Ac5S7EJ 6vuw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=arYQ38HL; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Harini Katakam Signed-off-by: Michal Simek Signed-off-by: Radhey Shyam Pandey --- v4: No change v3: Remove config check as it is handled in gem_has_ptp v2: Handle operation using a single write as suggested by Cladiu drivers/net/ethernet/cadence/macb.h | 4 ++++ drivers/net/ethernet/cadence/macb_main.c | 13 +++++++++++-- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index b6c5ecbd572c..709e3b560883 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -95,6 +95,8 @@ #define GEM_SA4B 0x00A0 /* Specific4 Bottom */ #define GEM_SA4T 0x00A4 /* Specific4 Top */ #define GEM_WOL 0x00b8 /* Wake on LAN */ +#define GEM_RXPTPUNI 0x00D4 /* PTP RX Unicast address */ +#define GEM_TXPTPUNI 0x00D8 /* PTP TX Unicast address */ #define GEM_EFTSH 0x00e8 /* PTP Event Frame Transmitted Seconds Register 47:32 */ #define GEM_EFRSH 0x00ec /* PTP Event Frame Received Seconds Register 47:32 */ #define GEM_PEFTSH 0x00f0 /* PTP Peer Event Frame Transmitted Seconds Register 47:32 */ @@ -245,6 +247,8 @@ #define MACB_TZQ_OFFSET 12 /* Transmit zero quantum pause frame */ #define MACB_TZQ_SIZE 1 #define MACB_SRTSM_OFFSET 15 /* Store Receive Timestamp to Memory */ +#define MACB_PTPUNI_OFFSET 20 /* PTP Unicast packet enable */ +#define MACB_PTPUNI_SIZE 1 #define MACB_OSSMODE_OFFSET 24 /* Enable One Step Synchro Mode */ #define MACB_OSSMODE_SIZE 1 #define MACB_MIIONRGMII_OFFSET 28 /* MII Usage on RGMII Interface */ diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index eab2d41fa571..e941ea365db1 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -287,6 +287,11 @@ static void macb_set_hwaddr(struct macb *bp) top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); macb_or_gem_writel(bp, SA1T, top); + if (gem_has_ptp(bp)) { + gem_writel(bp, RXPTPUNI, bottom); + gem_writel(bp, TXPTPUNI, bottom); + } + /* Clear unused address register sets */ macb_or_gem_writel(bp, SA2B, 0); macb_or_gem_writel(bp, SA2T, 0); @@ -773,8 +778,12 @@ static void macb_mac_link_up(struct phylink_config *config, spin_unlock_irqrestore(&bp->lock, flags); - /* Enable Rx and Tx */ - macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(RE) | MACB_BIT(TE)); + /* Enable Rx and Tx; Enable PTP unicast */ + ctrl = macb_readl(bp, NCR); + if (gem_has_ptp(bp)) + ctrl |= MACB_BIT(PTPUNI); + + macb_writel(bp, NCR, ctrl | MACB_BIT(RE) | MACB_BIT(TE)); netif_tx_wake_all_queues(ndev); } From patchwork Thu Mar 30 05:08:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harini Katakam X-Patchwork-Id: 76899 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp884349vqo; Wed, 29 Mar 2023 22:18:57 -0700 (PDT) X-Google-Smtp-Source: AKy350Yyn6Rc13Fx/7BdfAKlE6ZYlmBIFokTJ5BTcJNlc8qS5yxsCE3tamk2mmnYRSyumQsKx5Hv X-Received: by 2002:a17:903:245:b0:1a1:f0cb:1055 with SMTP id j5-20020a170903024500b001a1f0cb1055mr25095882plh.28.1680153537287; Wed, 29 Mar 2023 22:18:57 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1680153537; cv=pass; d=google.com; s=arc-20160816; b=KKzw1PoXoLuRKTgjyQbZggUMj/w1IHvO2Vga5+HkemRPBq3oRuoCa1fNT3UT6mIS86 D/UWyrkokbrIcmCo9mHqJOAnkniIvT4bUrVm8DkLKw2lB+cPfXxdkNBBYgQarsK7pT+D bIqtrh+mt8WTmONxnSa6/6PrqsGD/BvNBYMN84iDHiHyEQU5LM5QoLO880IRzbe33yqI 5lX0bCMrkqezCDo5uTN36VlfS8DENr9QCk/fAZfouUDxSQC52SEPEy8PZ40fLFO0aXyh luV95zP2F62OVhDNlaDG7dVZCF95sAGR7peaQ1EzQzUzp/EP4AHL9V8G1HGAqIO0Aw7g UPfg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=5kvfvhMmBCpP0T+woqtHZssw0rNJLMHpPhpjh5m9wig=; b=MzUS2Z3jQs5PiumwO2yY7wPEFAnSPI/oJD/Juv0YYQUIIEselNOJup+XCX1nIPqoY0 wcDJ3bk9PbSNU1aKjWjXLsJUF82WntjgE6a6QILVUMj+Y1Ngivizm8KtFeJfqO+81ZSV 9a7lTkVGGqTBjWwrmW12K9xNbUS6+VJnisQ0e6cZVj/Ym+6mHmnVYLUroWOK7/xs1uT+ gwu40X6DiOaPyrN4mFfUk33ze+1vKhrVcLyPdRdQPlDuQIdPzln5lNcD642M7deOcK6C VKcqppPGW6poCllMef+IFm20xdmcLuk/6BtRHxwig+FKoK9ffZim4MaCGWUZ9CrjWjHC zMjg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=434ZM870; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 30 Mar 2023 00:08:29 -0500 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB06.amd.com (10.181.40.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 30 Mar 2023 00:08:29 -0500 Received: from xhdharinik40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 30 Mar 2023 00:08:26 -0500 From: Harini Katakam To: , , , , , , , CC: , , , , Subject: [PATCH net-next v4 3/3] net: macb: Optimize reading HW timestamp Date: Thu, 30 Mar 2023 10:38:09 +0530 Message-ID: <20230330050809.19180-4-harini.katakam@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230330050809.19180-1-harini.katakam@amd.com> References: <20230330050809.19180-1-harini.katakam@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT091:EE_|IA1PR12MB8077:EE_ X-MS-Office365-Filtering-Correlation-Id: 4cb14454-f9ed-46f0-3c14-08db30dccda3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Mar 2023 05:08:30.3553 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4cb14454-f9ed-46f0-3c14-08db30dccda3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT091.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8077 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761768675344739897?= X-GMAIL-MSGID: =?utf-8?q?1761768675344739897?= From: Harini Katakam The seconds input from BD (6 bits) just needs to be ORed with the upper bits from timer in this function. Avoid addition operation every single time. Seconds rollover handling is left untouched. Signed-off-by: Harini Katakam Signed-off-by: Michal Simek Signed-off-by: Radhey Shyam Pandey --- v4: No change v3: No change v2: - Update HW timestamp logic to remove sec_rollover variable as per Cladiu's comment - Remove Richard Cochran's ACK on original patch as the patch changed drivers/net/ethernet/cadence/macb_ptp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_ptp.c b/drivers/net/ethernet/cadence/macb_ptp.c index f962a95068a0..51d26fa190d7 100644 --- a/drivers/net/ethernet/cadence/macb_ptp.c +++ b/drivers/net/ethernet/cadence/macb_ptp.c @@ -258,6 +258,8 @@ static int gem_hw_timestamp(struct macb *bp, u32 dma_desc_ts_1, */ gem_tsu_get_time(&bp->ptp_clock_info, &tsu, NULL); + ts->tv_sec |= ((~GEM_DMA_SEC_MASK) & tsu.tv_sec); + /* If the top bit is set in the timestamp, * but not in 1588 timer, it has rolled over, * so subtract max size @@ -266,8 +268,6 @@ static int gem_hw_timestamp(struct macb *bp, u32 dma_desc_ts_1, !(tsu.tv_sec & (GEM_DMA_SEC_TOP >> 1))) ts->tv_sec -= GEM_DMA_SEC_TOP; - ts->tv_sec += ((~GEM_DMA_SEC_MASK) & tsu.tv_sec); - return 0; }