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[8.43.85.97]) by mx.google.com with ESMTPS id cr16-20020a170906d55000b0093defbd6274si15478959ejc.1019.2023.03.29.15.58.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 15:58:18 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=Tq4QbO2O; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A10E13858C2B for ; Wed, 29 Mar 2023 22:58:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A10E13858C2B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1680130697; bh=IC6T+AWFtZ/x2xY6b2ARTIBcpvnZ71NejviVDZlQrYU=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=Tq4QbO2OKnnV1tC48vz4ygr7DjcVJps3g641AgdGrPRnNE1O4wOZP/iqM2P14bzmA /ugk9s5/fFw7WbB1lIa2KQaaXntapuSaHM+4XQGP/9w6R1sE6DAK2tlW6R3cPhR7Z7 M10OUFKTBJP6szPolopzcEQLj1YJ2ifrBUKnwBy4= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtp2.axis.com (smtp2.axis.com [195.60.68.18]) by sourceware.org (Postfix) with ESMTPS id 841C73858D3C for ; Wed, 29 Mar 2023 22:57:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 841C73858D3C To: Subject: [committed] CRIS: Make rtx-cost 0 for many CONST_INT "quick" operands MIME-Version: 1.0 Message-ID: <20230329225727.2D86420433@pchp3.se.axis.com> Date: Thu, 30 Mar 2023 00:57:27 +0200 X-Spam-Status: No, score=-11.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Hans-Peter Nilsson via Gcc-patches From: Hans-Peter Nilsson Reply-To: Hans-Peter Nilsson Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761744727873361216?= X-GMAIL-MSGID: =?utf-8?q?1761744727873361216?= Stepping through a gdb session inspecting costs that cause gcc.dg/tree-ssa/slsr-13.c to fail, exposed that before this patch, cris_rtx_costs told that a shift of 1 of a register costs 5, while adding two registers costs 4. Making the cost of a quick-immediate constant equal to using a register (default 0) reflects actual performance and size-cost better. It also happens to make gcc.dg/tree-ssa/slsr-13.c pass with what looks like better code being generated, and improves coremark performance by 0.4%. But, blindly doing this for *all* valid operands that fit the "quick-immediate" addressing mode, trips interaction with other factors*, with the end result mixed at best. So, do this only for MINUS and logical operations for the time being, and only for modes that fit in one register. *) Examples of "other factors": - A bad default implementation of insn_cost or actually, pattern_cost, that looks only at the set_src_cost and furthermore sees such a cost of 0 as invalid. (Compare to the more sane set_rtx_cost.) This naturally tripped up combine and ifcvt, causing all sorts of changes, good and bad. - Having the same cost, to compare a register with 0 as with -31..31, means a compare insn of an eliminable form no longer looks preferable. * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0 for many quick operands, for register-sized modes. --- gcc/config/cris/cris.cc | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/gcc/config/cris/cris.cc b/gcc/config/cris/cris.cc index 641e7ea25fb1..05dead9c0778 100644 --- a/gcc/config/cris/cris.cc +++ b/gcc/config/cris/cris.cc @@ -1884,7 +1884,28 @@ cris_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno, if (val == 0) *total = 0; else if (val < 32 && val >= -32) - *total = 1; + switch (outer_code) + { + /* For modes that fit in one register we tell they cost + the same as with register operands. DImode operations + needs careful consideration for more basic reasons: + shifting by a non-word-size amount needs more + operations than an addition by a register pair. + Deliberately excluding SET, PLUS and comparisons and + also not including the full -64..63 range for (PLUS + and) MINUS. */ + case MINUS: case ASHIFT: case LSHIFTRT: + case ASHIFTRT: case AND: case IOR: + if (GET_MODE_SIZE(mode) <= UNITS_PER_WORD) + { + *total = 0; + break; + } + /* FALL THROUGH. */ + default: + *total = 1; + break; + } /* Eight or 16 bits are a word and cycle more expensive. */ else if (val <= 32767 && val >= -32768) *total = 2;