From patchwork Wed Mar 29 15:39:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 76689 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp518529vqo; Wed, 29 Mar 2023 09:02:03 -0700 (PDT) X-Google-Smtp-Source: AKy350aWS82xBG4W6UiPO61hpS/f6SDn12d7yPU0zUo1j+64Ht0wbVNZNxIZPqoDfgFjWgC1WQVO X-Received: by 2002:aa7:cb98:0:b0:4fc:6475:d249 with SMTP id r24-20020aa7cb98000000b004fc6475d249mr17808438edt.3.1680105723327; Wed, 29 Mar 2023 09:02:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680105723; cv=none; d=google.com; s=arc-20160816; b=PNpig1QM8ljA5tRrVvBBQipb+Xi2QYmMX8HYfOemTEPFMdcGIePr2YujQPG6A15cZI Scn92Iifo2U5nOFWuKEH45Lv2qqg/iy+IBpSIDcDq9TT0k7hicrmnoLug+xStm4Ln+br xOpRaMAl3awifhntrmhIIDG4nd5b3ggJvfHUv70beuGFh/gaPKk4LBQMWUDChVyBFWlE A+BrfNqU1CPGuNo9gM0uZeboc6LjOsNczVHNfxj6tbbpgPXod6LfzrYTyt+4a8sMqLxG YzD0rZsi2J40ZFDHTzJ9mfOUasER6e4GyZ5v43lMYX4QkZSJgEEo4YPhyk7vsB3GoVji U1Fw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=wxkG1khkTVKc5s7LEFdPJTlzNoOYLC5pJ07Egk47egg=; b=AS1BGeAkIRGbpL4yssvxJr0blB1z4b71naCoMipZt1wVqhs89biQibAMtqeIaAPOTa ap6ecWiTug3lCE76jrKLQ5TmCVpOi7czMZetF8kVoSg73uNDLnLXwp1iFqpLrOH3829F pj8w2fiQYkBDXC8kgBYHlEDd83ZZgWzMTkDeY0CX4M4Ott2dQj8TchM3NQpB1KNkXDVB i9FUqqNmNVTiHHwuuBufRJ9RES7xohXY4mxaKWfc6gXkXwXahp3FwODESKFEashPELhf ldw+e8hBOnkiKwKM8T9Dag80NYnpCW0LuFn39RDmlEed83qYYzt68aErCqMEE2R6SjAb Xo4A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j5-20020aa7c405000000b00502259be703si13527695edq.434.2023.03.29.09.01.09; Wed, 29 Mar 2023 09:02:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230443AbjC2PkR (ORCPT + 99 others); Wed, 29 Mar 2023 11:40:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231159AbjC2Pj5 (ORCPT ); Wed, 29 Mar 2023 11:39:57 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B99C344A2; Wed, 29 Mar 2023 08:39:52 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C699C2F4; Wed, 29 Mar 2023 08:40:36 -0700 (PDT) Received: from e120937-lin.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BDE033F663; Wed, 29 Mar 2023 08:39:50 -0700 (PDT) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, cristian.marussi@arm.com, vincent.guittot@linaro.org, souvik.chakravarty@arm.com, nicola.mazzucato@arm.com, Tushar.Khandelwal@arm.com, viresh.kumar@linaro.org, jassisinghbrar@gmail.com, Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: mailbox : arm,mhuv2: Allow for more RX interrupts Date: Wed, 29 Mar 2023 16:39:35 +0100 Message-Id: <20230329153936.394911-2-cristian.marussi@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230329153936.394911-1-cristian.marussi@arm.com> References: <20230329153936.394911-1-cristian.marussi@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761718538964992614?= X-GMAIL-MSGID: =?utf-8?q?1761718538964992614?= The ARM MHUv2 Receiver block can indeed support more interrupts, up to the maximum number of available channels, but anyway no more than the maximum number of supported interrupt for an AMBA device. Signed-off-by: Cristian Marussi --- Cc: Rob Herring Cc: Krzysztof Kozlowski Cc: devicetree@vger.kernel.org .../devicetree/bindings/mailbox/arm,mhuv2.yaml | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml index a4f1fe63659a..5a57f4e2a623 100644 --- a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml +++ b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml @@ -69,10 +69,15 @@ properties: interrupts: description: | - The MHUv2 controller always implements an interrupt in the "receiver" - mode, while the interrupt in the "sender" mode was not available in the - version MHUv2.0, but the later versions do have it. - maxItems: 1 + The MHUv2 controller always implements at least an interrupt in the + "receiver" mode, while the interrupt in the "sender" mode was not + available in the version MHUv2.0, but the later versions do have it. + In "receiver" mode, beside a single combined interrupt, there could be + multiple interrupts, up to the number of implemented channels but anyway + no more than the maximum number of interrupts potentially supported by + AMBA. + minItems: 1 + maxItems: 9 clocks: maxItems: 1 From patchwork Wed Mar 29 15:39:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 76664 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp512164vqo; Wed, 29 Mar 2023 08:51:47 -0700 (PDT) X-Google-Smtp-Source: AKy350YYCNo0pFNWAHf7uaPBGvdBMXH3c+qRB2sII65LIpqnwjUTl8VzGVLYOi6KQpoIkEl+PVQ4 X-Received: by 2002:a17:906:1d55:b0:935:535:42a7 with SMTP id o21-20020a1709061d5500b00935053542a7mr19333477ejh.51.1680105107458; Wed, 29 Mar 2023 08:51:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680105107; cv=none; d=google.com; s=arc-20160816; b=zt48WF9FHRwvCRcv9d3H8xNwVNg6hhRvNdzmoLx4JUHuW/1lH2qylermK0O2rkewhi MYjIT4pxKNdKbtgPBCyMZ4imgNjpk35FkQyucJDkn8TsHx69olMmeMJW3ywUJV5wV4GE HAgNI6YRdmW0RAUeZOyPazbGQIb+GAnfSmDD7j3rK2NNPSutdQZZjAHd5y9TfhvjGGvQ UQ7LI4+h5UT9NBoNfv5npM8dCW5JN9nrctELP1RQWafACQCWZhVLkWJE6TfjBnwzxhqU 56RradLvB4OFQIr2hd1KiPBcjDX9P3fStNMSvmTHhetNshA/RNr6idti5wMWWmGMj/so g9pQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Tdf6hXgyYQSRtUH+Sjj+RPue93oIsTlevzs5tw8oQVI=; b=hclb42wcl7febTzKhl2psQt9T+6iB4acObnG+aOpNZx9HIIEnXyIevr83+yLz/y3YG vQXtBHIWYMzMHvNp1yKyAzYapwG/cbKAbcUfQFWwoZwilj6/Vr3RDDNwkVbEzUeyovm+ lEW8AesZtt6ezRuK4LGqgm0cLwNsRWUlXHCrRqchYcxX+Gh2cQHtEWYTSBgxHM1wClbt //KM5RlE5WAfdtGRlXd6Iht3C4J8iD9LKgHy++IUY+13HlTtRFp0SYU1vq6ytdXGqOMu We/CxHrDUJnWY3rwBfNMRffbMJXk+yNUq6/U64SCq0H3p7T6fkPN4J1u4ePWQTA9Hyjp Pe0A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hq35-20020a1709073f2300b0093a0e786128si23577986ejc.175.2023.03.29.08.51.23; Wed, 29 Mar 2023 08:51:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230502AbjC2PkN (ORCPT + 99 others); Wed, 29 Mar 2023 11:40:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231184AbjC2Pj7 (ORCPT ); Wed, 29 Mar 2023 11:39:59 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 62286135 for ; Wed, 29 Mar 2023 08:39:54 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7023E1570; Wed, 29 Mar 2023 08:40:38 -0700 (PDT) Received: from e120937-lin.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BC0D03F663; Wed, 29 Mar 2023 08:39:52 -0700 (PDT) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, cristian.marussi@arm.com, vincent.guittot@linaro.org, souvik.chakravarty@arm.com, nicola.mazzucato@arm.com, Tushar.Khandelwal@arm.com, viresh.kumar@linaro.org, jassisinghbrar@gmail.com Subject: [PATCH 2/2] mailbox: arm_mhuv2: Add support for multiple rx interrupt Date: Wed, 29 Mar 2023 16:39:36 +0100 Message-Id: <20230329153936.394911-3-cristian.marussi@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230329153936.394911-1-cristian.marussi@arm.com> References: <20230329153936.394911-1-cristian.marussi@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761717892958059333?= X-GMAIL-MSGID: =?utf-8?q?1761717892958059333?= ARM MHUv2 can be configured to receive multiple interrupt related to the receiver block, up to the maximum number of available channels, and not necessarily grouped into a single combined interrupt. Allow to register more interrupt for the RX block up to the maximum number of interrupts supported by an AMBA device. Signed-off-by: Cristian Marussi --- drivers/mailbox/arm_mhuv2.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/mailbox/arm_mhuv2.c b/drivers/mailbox/arm_mhuv2.c index c6d4957c4da8..89060bee1fb0 100644 --- a/drivers/mailbox/arm_mhuv2.c +++ b/drivers/mailbox/arm_mhuv2.c @@ -163,7 +163,6 @@ enum mhuv2_frame { * @send: Base address of the register mapping region. * @recv: Base address of the register mapping region. * @frame: Frame type: RECEIVER_FRAME or SENDER_FRAME. - * @irq: Interrupt. * @windows: Channel windows implemented by the platform. * @minor: Minor version of the controller. * @length: Length of the protocols array in bytes. @@ -178,7 +177,6 @@ struct mhuv2 { struct mhu2_recv_frame_reg __iomem *recv; }; enum mhuv2_frame frame; - unsigned int irq; unsigned int windows; unsigned int minor; unsigned int length; @@ -991,7 +989,6 @@ static int mhuv2_tx_init(struct amba_device *adev, struct mhuv2 *mhu, } else { mhu->mbox.txdone_irq = true; mhu->mbox.txdone_poll = false; - mhu->irq = adev->irq[0]; writel_relaxed_bitfield(1, &mhu->send->int_en, struct int_en_t, chcomb); @@ -1029,18 +1026,23 @@ static int mhuv2_rx_init(struct amba_device *adev, struct mhuv2 *mhu, mhu->windows = readl_relaxed_bitfield(&mhu->recv->mhu_cfg, struct mhu_cfg_t, num_ch); mhu->minor = readl_relaxed_bitfield(&mhu->recv->aidr, struct aidr_t, arch_minor_rev); - mhu->irq = adev->irq[0]; - if (!mhu->irq) { - dev_err(dev, "Missing receiver IRQ\n"); - return -EINVAL; - } + for (i = 0; i < min_t(unsigned int, mhu->windows, AMBA_NR_IRQS); i++) { + if (!adev->irq[i]) { + /* At least one receiver IRQ is needed */ + if (i == 0) { + dev_err(dev, "Missing receiver IRQ\n"); + return -EINVAL; + } + continue; + } - ret = devm_request_threaded_irq(dev, mhu->irq, NULL, - mhuv2_receiver_interrupt, IRQF_ONESHOT, - "mhuv2-rx", mhu); - if (ret) { - dev_err(dev, "Failed to request rx IRQ\n"); - return ret; + ret = devm_request_threaded_irq(dev, adev->irq[i], NULL, + mhuv2_receiver_interrupt, IRQF_ONESHOT, + "mhuv2-rx", mhu); + if (ret) { + dev_err(dev, "Failed to request rx IRQ\n"); + return ret; + } } /* Mask all the channel windows */