From patchwork Mon Mar 27 13:00:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sahin, Okan" X-Patchwork-Id: 75429 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1506323vqo; Mon, 27 Mar 2023 06:20:10 -0700 (PDT) X-Google-Smtp-Source: AK7set/1Dpxe9KTYz3SApx/XQtw6xtmDjbYnZFkRcUARJbLi/WpLdy4Cbza18M6YYpB5e8xJ4Yk0 X-Received: by 2002:a05:6a20:29a0:b0:d9:e45d:95cd with SMTP id f32-20020a056a2029a000b000d9e45d95cdmr9867053pzh.17.1679923210710; Mon, 27 Mar 2023 06:20:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679923210; cv=none; d=google.com; s=arc-20160816; b=FwDEZ0l4O1F3KDyUJaNkkD6RpHNaGo6tV/tkx7CorhbL/vr3N+jetukUegd9SS9ERR yKs1UQyK12bXLLMQdCMxRIxdKw0rmfpm7XsekCI02vKkq8W0QxFnYTRKsrP/dGUT+/nr VBaQZ6jIOx5r4mI+B90THx8n3yYDtcbgk19qqZe2wXM8xvXhhr5LBN5Wu7JaXzP/Kg4e QvWb3Bbdjd4DlVAavdbg+WCfcUwbuaWCB7+CBrplfcAYUdOpAC2dbdpadVbWwbvmlzBy 33yGMmYz0wwLNWARmiWJb6Dkm5if2AXb88+1Vk6eR5qD/FzQJvha6lHRFVniCoE5DTat C8kQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=lB9FzI3+g+ZdNumwOzMpCJrqVeKCi5IQuq8LSQ3YhgE=; b=oR5dW+k9Waca7cWRRRa3id9yCQlm3vF0wQxn1oNi+FzjOYYMr5rSnL3l1U32MEQsTL NHDNrRoysuv62lSYMT6Onod5ux+77ji4lTq3XI+M7lZjPwWBFA+qpYNdY5u55JBFvRgM QKWe2NGFNUOfZ3cw1Mth0rznl9gE4/t2/wa4/pbuSUhp+gV/F5bF8ZmZ1vu0Lrb9Gmha VOOh+e8PBFpM2oqCU9CQwz8+0cGUdfrusomNtdrCxJZ10x6bHeqEvS4pPkawsqEZC2Mb +34WoV2j0G5u6WHuv9nKz5IaC292/sE0bJgDBNu4G9/lTIk6xoLQ9uLcbaWYXa361go5 8XLA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=analog.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id w10-20020a056a0014ca00b005a8cf0d93cbsi28667136pfu.3.2023.03.27.06.19.57; Mon, 27 Mar 2023 06:20:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=analog.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232463AbjC0NCd (ORCPT + 99 others); Mon, 27 Mar 2023 09:02:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232356AbjC0NCc (ORCPT ); Mon, 27 Mar 2023 09:02:32 -0400 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 580E6CD; Mon, 27 Mar 2023 06:02:18 -0700 (PDT) Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32RBielj023437; Mon, 27 Mar 2023 09:02:15 -0400 Received: from nwd2mta3.analog.com ([137.71.173.56]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3phtt81vf6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Mar 2023 09:02:13 -0400 Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta3.analog.com (8.14.7/8.14.7) with ESMTP id 32RD1EMH039573 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 27 Mar 2023 09:01:14 -0400 Received: from ASHBCASHYB4.ad.analog.com (10.64.17.132) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Mon, 27 Mar 2023 09:01:13 -0400 Received: from ASHBMBX9.ad.analog.com (10.64.17.10) by ASHBCASHYB4.ad.analog.com (10.64.17.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Mon, 27 Mar 2023 09:01:12 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Mon, 27 Mar 2023 09:01:12 -0400 Received: from okan.localdomain ([10.158.19.61]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 32RD0LcN021092; Mon, 27 Mar 2023 09:01:04 -0400 From: Okan Sahin To: CC: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , , , Subject: [PATCH v1 1/2] dt-bindings: gpio: ds4520: Add ADI DS4520 Date: Mon, 27 Mar 2023 16:00:06 +0300 Message-ID: <20230327130010.8342-2-okan.sahin@analog.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230327130010.8342-1-okan.sahin@analog.com> References: <20230327130010.8342-1-okan.sahin@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: dkcJYQLqJW3ZY9G7V9i4SZLhJfQHsywW X-Proofpoint-ORIG-GUID: dkcJYQLqJW3ZY9G7V9i4SZLhJfQHsywW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-24_11,2023-03-27_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 malwarescore=0 adultscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 spamscore=0 mlxlogscore=967 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303270102 X-Spam-Status: No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761527160457264668?= X-GMAIL-MSGID: =?utf-8?q?1761527160457264668?= Add ADI DS4520 devicetree document. Signed-off-by: Okan Sahin --- .../bindings/gpio/adi,ds4520-gpio.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/adi,ds4520-gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/adi,ds4520-gpio.yaml b/Documentation/devicetree/bindings/gpio/adi,ds4520-gpio.yaml new file mode 100644 index 000000000000..69f90e59d415 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/adi,ds4520-gpio.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/adi,ds4520-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DS4520 I2C GPIO expander + +maintainers: + - Okan Sahin + +properties: + compatible: + enum: + - adi,ds4520 + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + ds4520: gpio@50 { + compatible = "adi,ds4520-gpio"; + reg = <0x50>; + gpio-controller; + #gpio-cells = <2>; + }; + }; From patchwork Mon Mar 27 13:00:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sahin, Okan" X-Patchwork-Id: 75431 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1507648vqo; Mon, 27 Mar 2023 06:21:59 -0700 (PDT) X-Google-Smtp-Source: AKy350bk775scGmgaImAonRtTOMCoxQfr3745hZniK0foERwY6Tp9wav7yVnWYnlSehxOWbiXzy3 X-Received: by 2002:a62:1a49:0:b0:625:ffed:b3d1 with SMTP id a70-20020a621a49000000b00625ffedb3d1mr10695366pfa.7.1679923318870; Mon, 27 Mar 2023 06:21:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679923318; cv=none; d=google.com; s=arc-20160816; b=POVQINaPtYO1uIzNl4kfbby8mA0qgvshoHV0j5e4gDJ97TxZzFGrmkye6M3EolleZ1 aGAAtsWM0DRX+h3rM2uwTF+uFmM7WAG8Tuy3SxN8+09/MqhcXvdj+sFDre3+mRXrpxER Q92h+YuWMo+0UglmFI6+0LhUvmWCky5sxO22Wb7M48Mx6Uf5Hhzu37bXMy4Cwpfx6WfN bCO8GPlcp7Je6dV6v1MA4gQzHyGvL8GxImc/+ubJXzInUygjLSq5p+zpqiFwEzeExnhg ziNQPjJd8E1klWL46XdCzllX4qfnTkjFlG4PEGMswJHpWW7HhwK9LAyufjwHjXXV633Z cmBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=nsL1B8XbYY9WB87KcryLrmgwSwRRkovjecqFdPPtGRk=; b=k+oAzsy3hhoUQsED1XH5IPllreATFJ6HweMiifeLPqOX0l+Ky8z1UKqYVegl2KwdO1 307E9hxA6pjdAs6zmc+ASLOCxK1TBa76bigxnwSsT1K6X8rdAoNpcrJhs1ulO/xTA2tt TRcSa0bsgtW2+eoqt+hnJh4/ZcSQ00W8oh5RSLK4KYmvyC9E7HE5rAKCNff/71i5FTvl Q+2fH9qZSR7KASmT7Zy3VJ+Eb/dUTOmCeLAofXFtlUoOxSliXULCj0kK95pazh5b6aMP HvIXKp0t9NLi9uCKlm6Z6FUtQ57ePzFxKZYHayz6HCWvFtrILg5fKOp+JfSqzzkrc1Z+ +jnQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=analog.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j185-20020a638bc2000000b0050fa8965a13si17118605pge.654.2023.03.27.06.21.45; Mon, 27 Mar 2023 06:21:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=analog.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232318AbjC0NCI (ORCPT + 99 others); Mon, 27 Mar 2023 09:02:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232244AbjC0NCG (ORCPT ); Mon, 27 Mar 2023 09:02:06 -0400 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D36230FF; Mon, 27 Mar 2023 06:01:59 -0700 (PDT) Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32RBGpi1023528; Mon, 27 Mar 2023 09:01:54 -0400 Received: from nwd2mta3.analog.com ([137.71.173.56]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3phtt81vkm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Mar 2023 09:01:51 -0400 Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta3.analog.com (8.14.7/8.14.7) with ESMTP id 32RD1bDn039639 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 27 Mar 2023 09:01:37 -0400 Received: from ASHBMBX9.ad.analog.com (10.64.17.10) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Mon, 27 Mar 2023 09:01:36 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Mon, 27 Mar 2023 09:01:36 -0400 Received: from okan.localdomain ([10.158.19.61]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 32RD0LcO021092; Mon, 27 Mar 2023 09:01:27 -0400 From: Okan Sahin To: CC: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , , , Subject: [PATCH v1 2/2] gpio: ds4520: Add ADI DS4520 Regulator Support Date: Mon, 27 Mar 2023 16:00:07 +0300 Message-ID: <20230327130010.8342-3-okan.sahin@analog.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230327130010.8342-1-okan.sahin@analog.com> References: <20230327130010.8342-1-okan.sahin@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: rCmOEJjPCtaHxGol4j0hAJkH509Ug9Yw X-Proofpoint-ORIG-GUID: rCmOEJjPCtaHxGol4j0hAJkH509Ug9Yw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-24_11,2023-03-27_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 malwarescore=0 adultscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 spamscore=0 mlxlogscore=999 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303270102 X-Spam-Status: No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761527274227535300?= X-GMAIL-MSGID: =?utf-8?q?1761527274227535300?= Gpio I/O expander. Signed-off-by: Okan Sahin --- drivers/gpio/Kconfig | 10 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-ds4520.c | 198 +++++++++++++++++++++++++++++++++++++ 3 files changed, 209 insertions(+) create mode 100644 drivers/gpio/gpio-ds4520.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 13be729710f2..20aa28e208d5 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1000,6 +1000,16 @@ config GPIO_ADNP enough to represent all pins, but the driver will assume a register layout for 64 pins (8 registers). +config GPIO_DS4520 + tristate "DS4520 I2C GPIO expander" + select REGMAP_I2C + help + GPIO driver for Maxim MAX7300 I2C-based GPIO expander. + Say yes here to enable the GPIO driver for the ADI DS4520 chip. + + To compile this driver as a module, choose M here: the module will + be called gpio-ds4520. + config GPIO_GW_PLD tristate "Gateworks PLD GPIO Expander" depends on OF_GPIO diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index c048ba003367..6f8656d5d617 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -52,6 +52,7 @@ obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o obj-$(CONFIG_GPIO_DLN2) += gpio-dln2.o +obj-$(CONFIG_GPIO_DS4520) += gpio-ds4520.o obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o obj-$(CONFIG_GPIO_EIC_SPRD) += gpio-eic-sprd.o obj-$(CONFIG_GPIO_EM) += gpio-em.o diff --git a/drivers/gpio/gpio-ds4520.c b/drivers/gpio/gpio-ds4520.c new file mode 100644 index 000000000000..8f878e7824b8 --- /dev/null +++ b/drivers/gpio/gpio-ds4520.c @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2023 Analog Devices, Inc. + * Driver for the DS4520 I/O Expander + */ + +#include +#include +#include +#include +#include + +#define NUMBER_OF_GPIO 9 + +#define PULLUP0 0xF0 +#define IO_CONTROL0 0xF2 +#define IO_STATUS0 0xF8 + +#define REG_SIZE 8 + +struct ds4520_gpio_priv { + struct regmap *regmap; + struct gpio_chip gpio_chip; +}; + +static int ds4520_gpio_get_direction(struct gpio_chip *chip, + unsigned int offset) +{ + struct ds4520_gpio_priv *priv = gpiochip_get_data(chip); + u32 val_io_control = 0, val_pullup = 0; + u8 reg_offset = (offset / REG_SIZE); + int ret; + + ret = regmap_set_bits(priv->regmap, 0xF4, 0x01); + if (ret) + return ret; + + ret = regmap_read(priv->regmap, IO_CONTROL0 + reg_offset, + &val_io_control); + if (ret) + return ret; + + ret = regmap_read(priv->regmap, PULLUP0 + reg_offset, &val_pullup); + if (ret) + return ret; + + if ((val_io_control & (1 << (offset % 8))) + == (val_pullup & (1 << (offset % 8)))) + return GPIO_LINE_DIRECTION_OUT; + else + return GPIO_LINE_DIRECTION_IN; +} + +static int ds4520_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + struct ds4520_gpio_priv *priv = gpiochip_get_data(chip); + u8 reg_offset = (offset / REG_SIZE); + u8 mask = BIT(offset % 8); + int ret; + + ret = regmap_clear_bits(priv->regmap, IO_CONTROL0 + reg_offset, mask); + if (ret) + return ret; + + ret = regmap_set_bits(priv->regmap, PULLUP0 + reg_offset, mask); + if (ret) + return ret; + + return 0; +} + +static int ds4520_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct ds4520_gpio_priv *priv = gpiochip_get_data(chip); + u8 reg_offset = (offset / REG_SIZE); + u8 mask = BIT(offset % 8); + u32 val = 0; + int ret; + + ret = regmap_read(priv->regmap, IO_STATUS0 + reg_offset, &val); + if (ret) + return ret; + + return !!(val & mask); +} + +static void ds4520_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + struct ds4520_gpio_priv *priv = gpiochip_get_data(chip); + u8 reg_offset = (offset / REG_SIZE); + u8 mask = BIT(offset % 8); + + regmap_update_bits(priv->regmap, PULLUP0 + reg_offset, mask, + value ? mask : 0); + regmap_update_bits(priv->regmap, IO_CONTROL0 + reg_offset, mask, + value ? mask : 0); +} + +static int ds4520_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct ds4520_gpio_priv *priv = gpiochip_get_data(chip); + u8 reg_offset = (offset / REG_SIZE); + u8 mask = BIT(offset % 8); + int ret; + + ret = regmap_clear_bits(priv->regmap, IO_CONTROL0 + reg_offset, mask); + if (ret) + return ret; + + ds4520_gpio_set(chip, offset, value); + + return 0; +} + +static const struct regmap_config ds4520_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static const struct gpio_chip ds4520_chip = { + .label = "ds4520-gpio", + .owner = THIS_MODULE, + .get_direction = ds4520_gpio_get_direction, + .direction_input = ds4520_gpio_direction_input, + .direction_output = ds4520_gpio_direction_output, + .get = ds4520_gpio_get, + .set = ds4520_gpio_set, + .base = -1, + .can_sleep = true, +}; + +static int ds4520_gpio_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct ds4520_gpio_priv *priv; + u32 ngpio; + int ret; + + ngpio = NUMBER_OF_GPIO; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->gpio_chip = ds4520_chip; + priv->gpio_chip.label = "ds4520-gpio"; + priv->gpio_chip.ngpio = ngpio; + priv->gpio_chip.parent = dev; + + priv->regmap = devm_regmap_init_i2c(client, &ds4520_regmap_config); + if (IS_ERR(priv->regmap)) { + ret = PTR_ERR(priv->regmap); + dev_err_probe(dev, ret, + "Failed to allocate register map\n"); + return ret; + } + + ret = devm_gpiochip_add_data(dev, &priv->gpio_chip, priv); + if (ret) { + dev_err_probe(dev, ret, "Unable to register gpiochip\n"); + return ret; + } + + i2c_set_clientdata(client, priv); + + return 0; +} + +static const struct of_device_id ds4520_gpio_of_match_table[] = { + { + .compatible = "adi,ds4520-gpio" + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, ds4520_gpio_of_match_table); + +static const struct i2c_device_id ds4520_gpio_id_table[] = { + { "ds4520-gpio" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(i2c, ds4520_gpio_id_table); + +static struct i2c_driver ds4520_gpio_driver = { + .driver = { + .name = "ds4520-gpio", + .of_match_table = ds4520_gpio_of_match_table, + }, + .probe_new = ds4520_gpio_probe, + .id_table = ds4520_gpio_id_table, +}; +module_i2c_driver(ds4520_gpio_driver); + +MODULE_DESCRIPTION("DS4520 I/O Expander"); +MODULE_AUTHOR("Okan Sahin "); +MODULE_LICENSE("GPL");