From patchwork Mon Mar 27 11:59:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 75377 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1465107vqo; Mon, 27 Mar 2023 05:17:45 -0700 (PDT) X-Google-Smtp-Source: AKy350ZiZGAKZFiTIsJveG92uBolYT3Uc3cH99Xw4zQIXNKFbLnI9FL3cBfE8991T3exYAywaMc0 X-Received: by 2002:a17:906:b24e:b0:930:21a:c80 with SMTP id ce14-20020a170906b24e00b00930021a0c80mr12432742ejb.47.1679919465492; Mon, 27 Mar 2023 05:17:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679919465; cv=none; d=google.com; s=arc-20160816; b=hc+LOOLAP7b8xScSm5dWhaG5T2e/oEHeRexD2LRh4rFK7EXQ3wk6Le3ygsW4JwJcZ7 aPAQvMxjCjkGlWnuVQuVXkvZ6RfmOElbFaeJUCMImDKi2L7u1Bm4tZ7JrXlraI1dAMT/ 41YP12U2BUY32GoQJw6eYa40vBLf+wAhqfBACEExDdJKu9z06cXo22PfI+ZcHSMtDbOl TunqHZdD/VUFaSFEbX6tuXvezb/1jhhyfLTmHTUcAhcLHy3TW7WYdOQh2E4MiUeQhUJp SLd2kHVk4EvYVgGZ2RZvQHNQyqs3LckxLOEPzlraUX5dlBISEX9ZeJLgEoNj6dQSaFd7 jDPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=XTwt2K1oLwDilPtKiF15UxBp1utAW4RKpr6b/XNacfs=; b=DtIAPMY4lTNeCRkoHfvxMRL6ae46qMkxRTzW51ZNQDBkmYETR67ImqiY1Z8pVDa8hm 1uNWmssr3/qSwpbeZjivOSdjtFWHmqTsISV29+tE3vUN9Nzm1w/XBDZsdHHUidFDgjgV 38on8aYXjJjOZsK1W7I0Ye/ebhSOW5mXktd3EeI69Xpm/WnbGbDuX51aSk9UrWxeS22L Q+vgDIGflGK51n1OP1kLDLrW9wKV5kygLqs+WS729K5PMPQ2GBgZhiFC7vPJnYGKhsJ+ EbE1vhogrppOQVYyT2aXr+66bGIKtQBGVVDfkGIl2lGyyq3MTpi+KyV7zwf/Ve5aUrN3 ypYQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ty20-20020a170907c71400b009334c541c5bsi20966698ejc.102.2023.03.27.05.17.21; Mon, 27 Mar 2023 05:17:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232590AbjC0MA1 (ORCPT + 99 others); Mon, 27 Mar 2023 08:00:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49408 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232582AbjC0MAZ (ORCPT ); Mon, 27 Mar 2023 08:00:25 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 472DE3C1F for ; Mon, 27 Mar 2023 05:00:24 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 40A00C14; Mon, 27 Mar 2023 05:01:08 -0700 (PDT) Received: from pierre123.arm.com (unknown [10.57.19.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6FFF83F663; Mon, 27 Mar 2023 05:00:21 -0700 (PDT) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Radu Rendec , Pierre Gondois , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , "Rafael J. Wysocki" , Sudeep Holla , Oliver Upton , Akihiko Odaki , Palmer Dabbelt , Gavin Shan , linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] cacheinfo: Check sib_leaf in cache_leaves_are_shared() Date: Mon, 27 Mar 2023 13:59:49 +0200 Message-Id: <20230327115953.788244-2-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230327115953.788244-1-pierre.gondois@arm.com> References: <20230327115953.788244-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761523233570698861?= X-GMAIL-MSGID: =?utf-8?q?1761523233570698861?= If 'this_leaf' is a L2 cache (or higher) and 'sib_leaf' is a L1 cache, the caches are detected as shared. Indeed, cache_leaves_are_shared() only checks the cache level of 'this_leaf' when 'sib_leaf''s cache level should also be checked. Also update the comment: the function is called when populating 'shared_cpu_map'. Signed-off-by: Pierre Gondois --- drivers/base/cacheinfo.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index f6573c335f4c..4ca117574af1 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -38,11 +38,10 @@ static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, { /* * For non DT/ACPI systems, assume unique level 1 caches, - * system-wide shared caches for all other levels. This will be used - * only if arch specific code has not populated shared_cpu_map + * system-wide shared caches for all other levels. */ if (!(IS_ENABLED(CONFIG_OF) || IS_ENABLED(CONFIG_ACPI))) - return !(this_leaf->level == 1); + return (this_leaf->level != 1) || (sib_leaf->level != 1); if ((sib_leaf->attributes & CACHE_ID) && (this_leaf->attributes & CACHE_ID)) From patchwork Mon Mar 27 11:59:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 75369 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1463864vqo; Mon, 27 Mar 2023 05:16:00 -0700 (PDT) X-Google-Smtp-Source: AKy350ZHAe1gp310jfQWXzjpLdObLhPltZTpj4lBH1fMwe2jfIFKnVI/qyfNIEG5jjen7yK3fQ3O X-Received: by 2002:a17:906:6dd7:b0:931:c99c:480 with SMTP id j23-20020a1709066dd700b00931c99c0480mr12430065ejt.69.1679919359906; Mon, 27 Mar 2023 05:15:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679919359; cv=none; d=google.com; s=arc-20160816; b=Zl/qIpZTQuCjbGcAPGJR9cawqjgrQQw6z1hs93GUShxNrMzLcgXlsU/Pz7K9YSxcHJ HlMU6b1b2rxb5qZLqSLwcUrD5G2dCHf/c5pI4yVoCdldStWiCQd5e5LL7OPlOJGhpnRp ja2w9oo0z5neHw2TtHqR7Q5m5DubOW9NYvVC2IIQik75tdBsxWmoKIfj8WURNgMW88Ka xL6ZTW9hdfVNNLnBOTsh0KWKbNNDInvYySvUsNiZU/wsb3n2+7X2+rU4/bJaaI0znxda O73MZslq4C30EBPJI1np9xGnWB2ObHbm4wfV0mnkLcCZds+qz6RG9fIdskxHqEAXWCed HT+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=1gOjYydFhv6TldVDIkUCs8YEsAJFlzQd972KH4PdqKs=; b=nVnjxTp30baQJ+/Qzo4ayM5liVEm08Kg1f5UiT7tSjidbBF6y0FQ9N69x8I1mNhdpI hXfgVHtJAu+wjEmarSIkNMBbHX1nyYf/ypd3Hk+wS5KlprOocmT6q38Ujn5C65rcAPTY XPNBAWb1idI/Ss4csmF9IfZvHxkx73YXYCwVoqRVrshS4i+9ujz7sQIKPLYE2CG1z51o L7Aok0bRwKgXs1jPobEojh5vmUalCoLrUfH66WA0HXbqa4yGWA76+aLInJgDVGgcrZ/V kSZTE1d6/LOc8A0TkZs9CN9wqaI7Ezfn1ZPk3GQsdtc9vC2EaX9QUYwQEl5YYdde9fiB 01PQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id me16-20020a170906aed000b0093100c0022bsi26709957ejb.674.2023.03.27.05.15.35; Mon, 27 Mar 2023 05:15:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232602AbjC0MAf (ORCPT + 99 others); Mon, 27 Mar 2023 08:00:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232593AbjC0MAa (ORCPT ); Mon, 27 Mar 2023 08:00:30 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 64E9B1BE2 for ; Mon, 27 Mar 2023 05:00:29 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 559A1FEC; Mon, 27 Mar 2023 05:01:13 -0700 (PDT) Received: from pierre123.arm.com (unknown [10.57.19.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 72C6C3F663; Mon, 27 Mar 2023 05:00:26 -0700 (PDT) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Radu Rendec , Pierre Gondois , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , "Rafael J. Wysocki" , Sudeep Holla , Akihiko Odaki , Palmer Dabbelt , Gavin Shan , Jeremy Linton , linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] cacheinfo: Check cache properties are present in DT Date: Mon, 27 Mar 2023 13:59:50 +0200 Message-Id: <20230327115953.788244-3-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230327115953.788244-1-pierre.gondois@arm.com> References: <20230327115953.788244-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761523122454310695?= X-GMAIL-MSGID: =?utf-8?q?1761523122454310695?= If a Device Tree (DT) is used, the presence of cache properties is assumed. Not finding any is not considered. For arm64 platforms, cache information can be fetched from the clidr_el1 register. Checking whether cache information is available in the DT allows to switch to using clidr_el1. init_of_cache_level() \-of_count_cache_leaves() will assume there a 2 cache leaves (L1 data/instruction caches), which can be different from clidr_el1 information. cache_setup_of_node() tries to read cache properties in the DT. If there are none, this is considered a success. Knowing no information was available would allow to switch to using clidr_el1. Signed-off-by: Pierre Gondois Reported-by: Alexandre Ghiti --- drivers/base/cacheinfo.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index 4ca117574af1..5b0edf2d5da8 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -78,6 +78,9 @@ bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y) } #ifdef CONFIG_OF + +static bool of_check_cache_nodes(struct device_node *np); + /* OF properties to query for a given cache type */ struct cache_type_info { const char *size_prop; @@ -205,6 +208,11 @@ static int cache_setup_of_node(unsigned int cpu) return -ENOENT; } + if (!of_check_cache_nodes(np)) { + of_node_put(np); + return -ENOENT; + } + prev = np; while (index < cache_leaves(cpu)) { @@ -229,6 +237,25 @@ static int cache_setup_of_node(unsigned int cpu) return 0; } +static bool of_check_cache_nodes(struct device_node *np) +{ + struct device_node *next; + + if (of_property_read_bool(np, "cache-size") || + of_property_read_bool(np, "i-cache-size") || + of_property_read_bool(np, "d-cache-size") || + of_property_read_bool(np, "cache-unified")) + return true; + + next = of_find_next_cache_node(np); + if (next) { + of_node_put(next); + return true; + } + + return false; +} + static int of_count_cache_leaves(struct device_node *np) { unsigned int leaves = 0; @@ -260,6 +287,9 @@ int init_of_cache_level(unsigned int cpu) struct device_node *prev = NULL; unsigned int levels = 0, leaves, level; + if (!of_check_cache_nodes(np)) + goto err_out; + leaves = of_count_cache_leaves(np); if (leaves > 0) levels = 1; From patchwork Mon Mar 27 11:59:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 75363 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1463053vqo; Mon, 27 Mar 2023 05:14:57 -0700 (PDT) X-Google-Smtp-Source: AKy350ZfPjW+Xpixnq+xr5K62HY2B7N4+XpG3XmlS29+cmAPYsWjV0cmZW+xX1/g6BC5V77/RnoL X-Received: by 2002:a17:906:7b83:b0:933:4c63:a522 with SMTP id s3-20020a1709067b8300b009334c63a522mr13264265ejo.31.1679919297138; Mon, 27 Mar 2023 05:14:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679919297; cv=none; d=google.com; s=arc-20160816; b=HQFcQx2PP2jUcNN7fWa4H53bAAMv9uJ4ZDw5ZXQFROlZ7L+fqzJ+IWqRWSxKXqZU8O 1kBg6Afapy27yzrH8ZHlo6IMjHu1HavvV5qZpkI40W92FD+6/aQNsunsU/dHSPGHTqVh +QyfUcbZXLWR+tm9SUAQ/gWni9eT21TUhWGY2D3q03fQDneChSMKdxcKH9tzYh2ENJhB HNZwNnRzZz5vbqtQxZWhVqDQ8fhLxz2zWowf1WNohHx4IbUV8Bj8cuYNEV+PB0ka/rpP lfJ9BvLtNbzGfiVEO8ScMtDdsBlC/bCdBp+P5yMqRf05sFyGgrZayCRrbO7DwP05MZ0b QGrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=PHttnjLYvaqD5iccIx0Sz4QrjnfH+UAfQPjufLeNECw=; b=Hvelr5ka9ZNy/Mung6Zc1ebWr3s8NsB691eKIFTaevy7WxvZYt1MU64B4daZijbcjj Vi7NEDa25NsmEBm3yda7G4zKdfo8m1F9pLOOdwvmGnQ2lQaxpxDLTMsIKvTFQKIo4YPc IqYH4TV5fi2peXe9ckgZgYS295K6lY6JpgQ5KXUcQ2z2dkewkp7LNlLNJ3RpUkmW7k9W NhzDmh4MVwkD8lMx6OQC0ZYoIDI9C6oIo3xFik/xzaDFFXEGxEWDTw1jk59q2PvsTQKV 9kT3LAm04k17vEd0g1TXzbQuONa85KHZemmjbnZpK+W8GSpttrF3yWDDZIFKqlwOt0/J Jeaw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id uz14-20020a170907118e00b0092b93aded0csi25571750ejb.149.2023.03.27.05.14.33; Mon, 27 Mar 2023 05:14:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232631AbjC0MAp (ORCPT + 99 others); Mon, 27 Mar 2023 08:00:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232627AbjC0MAg (ORCPT ); Mon, 27 Mar 2023 08:00:36 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 01E883A90 for ; Mon, 27 Mar 2023 05:00:34 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E520B1042; Mon, 27 Mar 2023 05:01:18 -0700 (PDT) Received: from pierre123.arm.com (unknown [10.57.19.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8BAAF3F663; Mon, 27 Mar 2023 05:00:31 -0700 (PDT) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Radu Rendec , Pierre Gondois , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , "Rafael J. Wysocki" , Sudeep Holla , Palmer Dabbelt , Oliver Upton , Akihiko Odaki , Gavin Shan , Conor Dooley , linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] cacheinfo: Add use_arch[|_cache]_info field/function Date: Mon, 27 Mar 2023 13:59:51 +0200 Message-Id: <20230327115953.788244-4-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230327115953.788244-1-pierre.gondois@arm.com> References: <20230327115953.788244-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761523056829955439?= X-GMAIL-MSGID: =?utf-8?q?1761523056829955439?= The cache information can be extracted from either a Device Tree (DT), the PPTT ACPI table, or arch registers (clidr_el1 for arm64). The clidr_el1 register is used only if DT/ACPI information is not available. It does not states how caches are shared among CPUs. Add a use_arch_cache_info field/function to identify when the DT/ACPI doesn't provide cache information. Use this information to assume L1 caches are privates and L2 and higher are shared among all CPUs. Signed-off-by: Pierre Gondois --- arch/arm64/kernel/cacheinfo.c | 5 +++++ drivers/base/cacheinfo.c | 20 ++++++++++++++++++-- include/linux/cacheinfo.h | 2 ++ 3 files changed, 25 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c index c307f69e9b55..b6306cda0fa7 100644 --- a/arch/arm64/kernel/cacheinfo.c +++ b/arch/arm64/kernel/cacheinfo.c @@ -96,3 +96,8 @@ int populate_cache_leaves(unsigned int cpu) } return 0; } + +bool use_arch_cache_info(unsigned int cpu) +{ + return true; +} diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index 5b0edf2d5da8..c6266ccc2df5 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -40,8 +40,9 @@ static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, * For non DT/ACPI systems, assume unique level 1 caches, * system-wide shared caches for all other levels. */ - if (!(IS_ENABLED(CONFIG_OF) || IS_ENABLED(CONFIG_ACPI))) - return (this_leaf->level != 1) || (sib_leaf->level != 1); + if (!(IS_ENABLED(CONFIG_OF) || IS_ENABLED(CONFIG_ACPI)) || + this_leaf->use_arch_info) + return (this_leaf->level != 1) && (sib_leaf->level != 1); if ((sib_leaf->attributes & CACHE_ID) && (this_leaf->attributes & CACHE_ID)) @@ -330,6 +331,11 @@ int __weak cache_setup_acpi(unsigned int cpu) return -ENOTSUPP; } +bool __weak use_arch_cache_info(unsigned int cpu) +{ + return false; +} + unsigned int coherency_max_size; static int cache_setup_properties(unsigned int cpu) @@ -349,6 +355,7 @@ static int cache_shared_cpu_map_setup(unsigned int cpu) struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); struct cacheinfo *this_leaf, *sib_leaf; unsigned int index, sib_index; + bool use_arch_info = false; int ret = 0; if (this_cpu_ci->cpu_map_populated) @@ -361,6 +368,12 @@ static int cache_shared_cpu_map_setup(unsigned int cpu) */ if (!last_level_cache_is_valid(cpu)) { ret = cache_setup_properties(cpu); + // Possibility to rely on arch specific information. + if (ret && use_arch_cache_info(cpu)) { + use_arch_info = true; + ret = 0; + } + if (ret) return ret; } @@ -370,6 +383,9 @@ static int cache_shared_cpu_map_setup(unsigned int cpu) this_leaf = per_cpu_cacheinfo_idx(cpu, index); + if (use_arch_info) + this_leaf->use_arch_info = true; + cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map); for_each_online_cpu(i) { struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i); diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index 908e19d17f49..bcbb8bd5759a 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -66,6 +66,7 @@ struct cacheinfo { #define CACHE_ALLOCATE_POLICY_MASK \ (CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE) #define CACHE_ID BIT(4) + bool use_arch_info; void *fw_token; bool disable_sysfs; void *priv; @@ -82,6 +83,7 @@ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu); int init_cache_level(unsigned int cpu); int init_of_cache_level(unsigned int cpu); int populate_cache_leaves(unsigned int cpu); +bool use_arch_cache_info(unsigned int cpu); int cache_setup_acpi(unsigned int cpu); bool last_level_cache_is_valid(unsigned int cpu); bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y);