From patchwork Thu Oct 20 09:25:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6080 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp153078wrs; Thu, 20 Oct 2022 02:27:03 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4z37bLt7rSV9EQN/4ZBLXWfx+ZEkcWlZPzNubpeS98p9nQMdytUWkJIQDlUgskXGPuYOBF X-Received: by 2002:a05:6402:4441:b0:454:8a74:5459 with SMTP id o1-20020a056402444100b004548a745459mr11115327edb.155.1666258023137; Thu, 20 Oct 2022 02:27:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258023; cv=none; d=google.com; s=arc-20160816; b=ypDUf77G92NlgorhlGm1sWWMlMD94I3FIb6U3+cU8J79641GYHik2VPqeLgaYitTjZ d+aYFYLGL/N5JeL/AKMIo1v7F/1cKoVsG2pOsyhliQcslOuuKzH4GcFpU+iGkTK1T4u/ MyMblXj/M1TJPXrFH4qVT9XpPCQr56jhojUlZbTFG/RAzqWPA/eyvMry6CjUJxqWDTNS OUbGAlTEYzNE6u36m+CSdarh48XOLOicY5DqIPUy62mHGJTEyoON39i7Eosgn6LY2S/z FnO8whl1rh7Run+1+fkuot+jeKQKVLR7WV4srrPbUsV/ghhxaF7zXKG6K7I/txyw5GUh gPkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=N64IVYqRs1KZ0jngodYFomJBw/rxpI0DP8JOnKm7jmI=; b=m80cjYJElZW5ppO3zq5qs+Eg+gumvo+VLD7S47GdXaTefsNVxopLaudi9fjuJPwrqy 0qJhFMgxwR154ywnrgJ8ke1Fy8cQGFkvy/7REIVG6feyfPm4WGct6eyZr2zO63LSx4WV 5FIe5h5slusZHXUrTZpOCwDovAHwKMCyQZ9nqbdPesvxbItbxkNHuRaSc3ZO8q+ftYf0 FAJs2zSwwt7YM6myFQNR5c+7qNLldrm+lsAaP3LWr77oBucfgEB/L4Kwp3o6nKwJ21pn 5TOkS1goylFJxKvo3mywpErkDzuKveZ/l5qV9BRgJWCov4GKhBdW3+qe9j0cjSNoxApM 5soA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=F5el3Ce0; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id l18-20020a1709067d5200b0078aefaf3910si15000938ejp.362.2022.10.20.02.27.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:27:03 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=F5el3Ce0; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 562C73860757 for ; Thu, 20 Oct 2022 09:26:57 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 562C73860757 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258017; bh=N64IVYqRs1KZ0jngodYFomJBw/rxpI0DP8JOnKm7jmI=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=F5el3Ce0TIvmPmKz1nOpnSiWKGt7UIC9UUTner4kO1+Kw/fF0UWJJRDYxhWAIMXMK WP0fnw0xBHynTzMQ7oXsZ+sOTYqLBzaIALBMF2zu2rsC9jmP/aGR2DSr+jPXEhzHG5 TQKOoZ+8IeEiLOOdoYz3JwLFEvJChQ9kHGuTDR5g= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 2852538515D3 for ; Thu, 20 Oct 2022 09:26:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2852538515D3 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 7CE00300089; Thu, 20 Oct 2022 09:26:47 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 01/40] gdb/unittests: PR28413, suppress warnings generated by Gnulib Date: Thu, 20 Oct 2022 09:25:47 +0000 Message-Id: <8b99d666e78ba5b9d32c7889a2161c70b3da88df.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198172768090751?= X-GMAIL-MSGID: =?utf-8?q?1747198172768090751?= Gnulib generates a warning if the system version of certain functions are used (to redirect the developer to use Gnulib version). It caused a compiler error when... - Compiled with Clang - -Werror is specified (by default) - C++ standard used by Clang is before C++17 (by default as of 15.0.0) when this unit test is activated. This issue is raised as PR28413. However, previous proposal to fix this issue (a "fix" to Gnulib): was rejected because it ruins the intent of Gnulib warnings. So, we need a Binutils/GDB-side solution. This commit tries to address this issue on the GDB side. We have "include/diagnostics.h" to disable certain warnings only when necessary. This commit suppresses the Gnulib warnings by surrounding entire #include block with DIAGNOSTIC_IGNORE_USER_DEFINED_WARNINGS to disable Gnulib- generated warnings on all standard C++ header files. --- gdb/unittests/string_view-selftests.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/gdb/unittests/string_view-selftests.c b/gdb/unittests/string_view-selftests.c index 2d7261d18d3..441d533b54e 100644 --- a/gdb/unittests/string_view-selftests.c +++ b/gdb/unittests/string_view-selftests.c @@ -23,6 +23,11 @@ #define GNULIB_NAMESPACE gnulib +#include "diagnostics.h" + +DIAGNOSTIC_PUSH +DIAGNOSTIC_IGNORE_USER_DEFINED_WARNINGS + #include "defs.h" #include "gdbsupport/selftest.h" #include "gdbsupport/gdb_string_view.h" @@ -34,6 +39,8 @@ #include #include +DIAGNOSTIC_POP + /* libstdc++'s testsuite uses VERIFY. */ #define VERIFY SELF_CHECK From patchwork Thu Oct 20 09:25:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6081 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp153185wrs; Thu, 20 Oct 2022 02:27:24 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4I77e4Q7Sb6IsWnt88tkf/0gnflHiPV8NIi/MXvX3/k+v+O7pbj9gjV1orHcQBjYJDG7o6 X-Received: by 2002:a17:907:805:b0:782:1a0d:337f with SMTP id wv5-20020a170907080500b007821a0d337fmr10285560ejb.475.1666258044369; Thu, 20 Oct 2022 02:27:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258044; cv=none; d=google.com; s=arc-20160816; b=QuhzjzVB9GFuSTh4CA52OE0L+yeRZ/nBJTeKCY7LKEkRZU+zseNczOA3kuAspK+Ks8 VhINp9uypvQpp2ruZCylyMQRIDGm7jtWNtT5oSNwSzBlXd7oOKbxMR1KMXd9legA9TTR 6VwDSxMzhYmGtvv8GGtGyx3LJOaM5bL+vBfpLNP/1cQDmrdJUhyXHms4gFn9WBdlJpj2 5ucVdhe4MW++Te/btVljzEj4GiTe4IKdEuUoFYdbKMdslBJgJMtjVcLA1ziuNRUBUsdz S5use195JAd4co98nSwKsEbiFZ/dmVpGdGda3OICZpeAqkLxJLro33Xzu9xf30tqGqP0 lsRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=a39D+JEBFWkt60Xlc0Ik9VXp/KP0HhLBkvIl/XwRUvo=; b=nD3XKNzONj/Ode2y5gfo/lzmoVInzrU5smMhj6leleBv6KaZ/WB4CQ16/ZQhNURrU6 6NAIJfAZkFlaSaSHOr1AkrHG36doCC3x6F7mHy1CuTbWvz6QhGmv5ITbLdhkMl2PZFH8 7OCxYcPN5OIOIUC40PHscgZ+cA9E/xh7G3S2jU8Y1+uziQJeMwAJ/7PPFMhoGSulsbwf HCova/WZLczF7/260UKLU4CTniuSihOfsxrEElsm6fKdKMvk/W38K6aSOWQLs2fLgbM4 5WjmZjjw2By/f2j/ubRApEjF04Dco2pzIu+MizYsESv0BAMnvMEE0F+xvgrSgeOgv5+f K9pw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=TLEAjQQ2; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id y6-20020a50e606000000b004573c1ae3fasi14361980edm.285.2022.10.20.02.27.24 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:27:24 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=TLEAjQQ2; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 92BB5385141D for ; Thu, 20 Oct 2022 09:27:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 92BB5385141D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258028; bh=a39D+JEBFWkt60Xlc0Ik9VXp/KP0HhLBkvIl/XwRUvo=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=TLEAjQQ2ApvqYwU5uyeQ0zmMgE/37RFomoXLlT0VhMyC9LX4I87yPuNAxRGE5eS1m jzV/TlvJ2DvpPcxtI0V449k159xom4f0m8tUIhtWQWHykhne960aT1mRGxL0BqbF5M 46XbfsPHcGAw/JKla4qB3MVgFu+XUsNYjWL3rslQ= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id A3EA63860759 for ; Thu, 20 Oct 2022 09:26:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A3EA63860759 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 04F47300089; Thu, 20 Oct 2022 09:26:58 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 02/40] sim: Check known getrusage declaration existence Date: Thu, 20 Oct 2022 09:25:48 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198194668252129?= X-GMAIL-MSGID: =?utf-8?q?1747198194668252129?= Clang generates a warning if there is a function declaration/definition with zero arguments. Such declarations/definitions without a prototype (an argument list) are deprecated forms of indefinite arguments ("-Wdeprecated-non-prototype"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). Such getrusage function declarations are placed in three files under sim/ppc and to avoid defining those on the modern environments, this commit will make the configuration script to find the known declaration of getrusage and defines HAVE_DECL_GETRUSAGE if it finds one. If we find one (and we *will* in most modern environments), we don't need to rely on the deprecated declarations. --- sim/config.h.in | 4 ++++ sim/configure | 32 ++++++++++++++++++++++++++++++++ sim/configure.ac | 10 ++++++++++ 3 files changed, 46 insertions(+) diff --git a/sim/config.h.in b/sim/config.h.in index 9a94b289e46..bc7ec588ec6 100644 --- a/sim/config.h.in +++ b/sim/config.h.in @@ -44,6 +44,10 @@ /* Is the prototype for getopt in in the expected format? */ #undef HAVE_DECL_GETOPT +/* Is the prototype for getrusage in in the expected format? + */ +#undef HAVE_DECL_GETRUSAGE + /* Define to 1 if you have the declaration of `tzname', and to 0 if you don't. */ #undef HAVE_DECL_TZNAME diff --git a/sim/configure b/sim/configure index dac7f085be1..fbdd256d374 100755 --- a/sim/configure +++ b/sim/configure @@ -16460,6 +16460,38 @@ $as_echo "#define HAVE_DECL_GETOPT 1" >>confdefs.h fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a known getrusage prototype in sys/resource.h" >&5 +$as_echo_n "checking for a known getrusage prototype in sys/resource.h... " >&6; } +if ${sim_cv_decl_getrusage_sys_resource_h+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include +int +main () +{ +extern int getrusage (int, struct rusage *); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + sim_cv_decl_getrusage_sys_resource_h=yes +else + sim_cv_decl_getrusage_sys_resource_h=no +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $sim_cv_decl_getrusage_sys_resource_h" >&5 +$as_echo "$sim_cv_decl_getrusage_sys_resource_h" >&6; } +if test $sim_cv_decl_getrusage_sys_resource_h = yes; then + +$as_echo "#define HAVE_DECL_GETRUSAGE 1" >>confdefs.h + +fi + diff --git a/sim/configure.ac b/sim/configure.ac index be0cfdbea32..9411fc10f9d 100644 --- a/sim/configure.ac +++ b/sim/configure.ac @@ -187,6 +187,16 @@ if test $sim_cv_decl_getopt_unistd_h = yes; then [Is the prototype for getopt in in the expected format?]) fi +AC_MSG_CHECKING(for a known getrusage prototype in sys/resource.h) +AC_CACHE_VAL(sim_cv_decl_getrusage_sys_resource_h, +[AC_COMPILE_IFELSE([AC_LANG_PROGRAM([#include ], [extern int getrusage (int, struct rusage *);])], +sim_cv_decl_getrusage_sys_resource_h=yes, sim_cv_decl_getrusage_sys_resource_h=no)]) +AC_MSG_RESULT($sim_cv_decl_getrusage_sys_resource_h) +if test $sim_cv_decl_getrusage_sys_resource_h = yes; then + AC_DEFINE([HAVE_DECL_GETRUSAGE], 1, + [Is the prototype for getrusage in in the expected format?]) +fi + dnl These are unfortunate. They are conditionally called by other sim macros dnl but always used by common/Make-common.in. So we have to subst here even dnl when the rest of the code is in the respective macros. Once we merge the From patchwork Thu Oct 20 09:25:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6083 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp153752wrs; Thu, 20 Oct 2022 02:29:11 -0700 (PDT) X-Google-Smtp-Source: AMsMyM54gXR/QaxMzRRAA3W4ZSpph7qqhGQKHlrpvtTzNhJwwMTsTAqMWY4Oo6JIQ9h9mImfxpfW X-Received: by 2002:a17:907:948f:b0:78d:e99f:63e3 with SMTP id dm15-20020a170907948f00b0078de99f63e3mr10172230ejc.361.1666258151020; Thu, 20 Oct 2022 02:29:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258151; cv=none; d=google.com; s=arc-20160816; b=kbZ0YFLgl3/cloJamymmZyYZMWA3XSBMgQmhlA/b4Tf7ts1yOcRmv4SMDGeH3aketp atSA7H3pU5j6eIrTb4WS2/NnjL7fecVC9ZoPILqncW6Flzrf/BcuWFVCy2Veio26rwhN wG7j/aUYGcfycK/Dz/DTWMrjwicJ9DYLL7VqS+OpUHs2dbLolVQlRTNI0inEiosF9EsI G7663EZPYCzhKYEt47YD9tE6nSR8KBkAGnEXoCwgsEbFR3JuS4begGgL2Km/I6I0Iwyk uVMH1uksHmLM1yYj1TVCNCdtLlY5KwUtr8Wdut9Mtpvgim2NZ/oEYybxPrN7skGMB+uu mgLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=B5G44DajOyB10PokRhettBJ6jvso4sYKEZzAjZcSbBg=; b=RtKtUiUmgW3XJt02gH1c5nYM427Fz/cqSXcdMhthRN0/IDoLUIDmmmB6CBEQCacUsX IjlJf7DHC7isWvCex4eRuGq92kjlZ2Hd8Z3pduAsCux+Tj0vE7lrxQXweFuFlq66aWR9 x+ggP1cMAGsAh8faQtCL/b3s/VnsiL7zUkPbmjLLXglbWZuwMvwPVIjSP5CCQreS8tey /T0cX+b+lUnpngZvB4J/yoMhMcHuntr/nuJL28p0wkZwzfQz1HI5tsdAOiHwvxuCGo6B 7p8gGzsX1E9bU0TqbjgwMLICXQdOI8jknAa/niX4alvJ5FdqSDFJb7YHxUxLXwLGzbD8 r/Zg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=Q1K2PHuu; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id dn16-20020a17090794d000b00730870cb4b6si13119363ejc.621.2022.10.20.02.29.10 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:29:11 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=Q1K2PHuu; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6FE6D386076A for ; Thu, 20 Oct 2022 09:27:58 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6FE6D386076A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258078; bh=B5G44DajOyB10PokRhettBJ6jvso4sYKEZzAjZcSbBg=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=Q1K2PHuu0uP9VM9+0ZJjR6SBvfOs9fZ3MRmQvqmW4iZSc5b7EmkSMWeBUbhGKq3TK 3xtQ0/SBK+//K6wsFWb/opcZB/l3JXb5N7d3gyPR/eBwbMSLmUUVliNDKAd1fevTDQ 58EbhbGLojY2KPVBUhDZhKDe0WexVEr9swTR3+xM= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 26B913851148 for ; Thu, 20 Oct 2022 09:27:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 26B913851148 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 80244300089; Thu, 20 Oct 2022 09:27:08 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 03/40] sim/aarch64: Remove unused functions Date: Thu, 20 Oct 2022 09:25:49 +0000 Message-Id: <796962a87e569feeafb5ef636de3c79000ae152c.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198307263485415?= X-GMAIL-MSGID: =?utf-8?q?1747198307263485415?= Clang generates a warning if there is a unused static function ("-Wunused-function"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit removes unused functions from the AArch64 simulator. --- sim/aarch64/simulator.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c index 516a7830522..5881725cefd 100644 --- a/sim/aarch64/simulator.c +++ b/sim/aarch64/simulator.c @@ -83,22 +83,6 @@ } \ while (0) -/* Helper functions used by expandLogicalImmediate. */ - -/* for i = 1, ... N result = 1 other bits are zero */ -static inline uint64_t -ones (int N) -{ - return (N == 64 ? (uint64_t)-1UL : ((1UL << N) - 1)); -} - -/* result<0> to val */ -static inline uint64_t -pickbit (uint64_t val, int N) -{ - return pickbits64 (val, N, N); -} - static uint64_t expand_logical_immediate (uint32_t S, uint32_t R, uint32_t N) { From patchwork Thu Oct 20 09:25:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6084 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp153900wrs; Thu, 20 Oct 2022 02:29:34 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7UTGCzflAW1RLTojt71bIffDhTQTz4rSSA2qItEI5PwUvTO9HbIM8MEEPuFLyiAAoUWvsj X-Received: by 2002:a17:907:5c2:b0:77e:def7:65d8 with SMTP id wg2-20020a17090705c200b0077edef765d8mr10402612ejb.487.1666258174569; Thu, 20 Oct 2022 02:29:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258174; cv=none; d=google.com; s=arc-20160816; b=v7EK47mwdIxANsuDoUy4rYcjzUtW+Bz0sHzG+FEU3d+5xFRt/If7fhSrWzrM6krnL3 iEeZoD0U3ydTQS/iQU71vONvfvNwU2PXKqbO0vQM7ZsYaa3aWVBVhfvIfywBxIszvttY Q+o4Cdlc/F9UwDesgaJK6Wc5P6Pfaygjl515G4vMOJhVcOg/+953S1Q7+MotmGBAh39d t+5TqdSCUCZbKFlzeNuVuJH7DaIrPQPWu62QJMvqBEpoFogIgGN8HPfeErEqX2vpOeru eQWbmLou0U9mgLffN+AZcHbZT5J2NB6TlU2OSN3iFp/ZVswXRx+aryecZM9+43A9FClP IMxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=JxV3ciybJkNqNC9aG2pC+dxADzmKpySrBJqCnJyoR7Q=; b=uCbsah92ivdiRBJ5+p2OD09obCZZkOXabDPq1MtSgEaC/4JRXUwIwSfDllUWD91pGE Dw6YSxbFKzHwqd115cLcB1OPUOSV3z1fWmfzfEuSuwvy3BoHJeolgSYM22A4eeoFan8m iFAjPT8fMyU6PfgTc7zc8bRYRN69OxS3A9OL9ulP8Yo3NE/0Nsnw7bDq8oM7624TjNy+ x/pctkzk70s5/sc9qJVht/JCUXzvos9UHNPJy+E5zm6IfrAeWiGUXbwrQQh+MKpzYDil YL14glUnYksH3f7dvIs1dRh9O/GIBHvRcg3flYUc4z91SsjNBMxT0gv2y82tMdv0vOVe EAfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=mXwjwPjk; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id dr2-20020a170907720200b0078dbec2e632si18798392ejc.620.2022.10.20.02.29.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:29:34 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=mXwjwPjk; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E4B7D3887F53 for ; Thu, 20 Oct 2022 09:28:09 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E4B7D3887F53 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258089; bh=JxV3ciybJkNqNC9aG2pC+dxADzmKpySrBJqCnJyoR7Q=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=mXwjwPjki4YAkhap3k/J+ZEsaZV5SV9/qlvF4cjvtoRJc0pf39t7OnzMu/16c0NWI P+YBMqRpJgzA3zEJkFNJCG08Oju6mAEGgAZ5HmJJ8MTKINqStuPHXel0QgmLHoY4Zd YLLmTBYxVQr80dLrwSCBODIm324KrBg6l+SwO53U= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 55FB73850203 for ; Thu, 20 Oct 2022 09:27:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 55FB73850203 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 05E3E300089; Thu, 20 Oct 2022 09:27:19 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 04/40] cpu/cris: Initialize some variables on CRIS CPU Date: Thu, 20 Oct 2022 09:25:50 +0000 Message-Id: <65223c79fdfd7faf132275415cd9da9852c5bec3.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198331954604392?= X-GMAIL-MSGID: =?utf-8?q?1747198331954604392?= GCC / Clang generate a warning if a variable may be used uninitialized on some cases (Clang: "-Wsometimes-uninitialized"). When the program is being built by Clang with the default configuration, it causes a build failure (unless "--disable-werror" is specified). Those error occur on sim/cris/semcrisv{10,32}f-switch.c but they are CGEN-generated files. The real cause of this problem is in cpu/cris.cpu which does not initialize certain variables. This commit ensures such variables are initialized to zero by default. Note that this commit itself does not regenerate CRIS CPU related files with CGEN because it still has several issues preventing regeneration. They are to be fixed in the later commits. cpu/ChangeLog: * cris.cpu: Initialize condres, newval and tmpres variables. --- cpu/cris.cpu | 3 +++ 1 file changed, 3 insertions(+) diff --git a/cpu/cris.cpu b/cpu/cris.cpu index 97b44581e78..cd85f4e94e2 100644 --- a/cpu/cris.cpu +++ b/cpu/cris.cpu @@ -541,6 +541,7 @@ (sequence BI ((SI tmpcond) (BI condres)) + (set condres 0) (set tmpcond condno) (.splice cond @@ -2655,6 +2656,7 @@ (sequence ((SI rno) (SI newval)) (set rno (regno Pd)) + (set newval 0) (.splice cond ; No sanity check for constant special register here, since the @@ -3698,6 +3700,7 @@ (sequence SI ((SI tmpcode) (SI tmpval) (SI tmpres)) + (set tmpres 0) (set tmpcode swapcode) (set tmpval val) (.splice From patchwork Thu Oct 20 09:25:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6082 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp153494wrs; Thu, 20 Oct 2022 02:28:22 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5UZm99TFYoyNh1EqUcoIsy16iJ+srOBfgeoFxEkiieINU681d4OtC6eWQf7yy2uOZXLMtU X-Received: by 2002:a17:907:7da5:b0:78e:2c3b:55a2 with SMTP id oz37-20020a1709077da500b0078e2c3b55a2mr10039516ejc.96.1666258102090; Thu, 20 Oct 2022 02:28:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258102; cv=none; d=google.com; s=arc-20160816; b=Cyc9Pcb+yDpqZw+kQzOOgwa2NNBh2cCrmVG+5oY3193mb5QoAy/PhuQG8zfff52DAK swSqb9ybYbLr2A0svWQaCDVk5rEZvCgOaqj8Gk5zO0Z6d2UPI3xIVBbitXyuPSgDIAfB dRS+wliCt5HyfV1uHBvM4faxQXWMMbRDsbbMclSTnJI3FufCPGBgsaXkxfFa20keL1fT jrtHuGaGInHFbGY7j7drLhtFk89eyMOyiyHpEcnZMlrTFktIyGW5Cb0lUGknGm3Yvpnn Lb5cchYeN0x+f0ZrysVBnsU3KH6Kykr+fCjPIRaH7MxMtNTpVHitUmsyH1hm3D01G0s8 S5cA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=0V/tdGhkIsaaiO8Fr+ntbQ2+n7+CJ8QCkEclPJyfQjw=; b=iNSGFjvp+iR84/YQc9KALIEN+RoLHUkUzVnOJNo7XdoG89oQB/HWdEXEoQ8P+lKf63 ZzccJ1WdvadbWAmUILxtc4EbYtm469hqVoHfpju/kxbmA2+GoOTWoPC32XyjHHFgTnD3 PRKPHA6RSrN8d38bx8e6Ol5A4TgnDMafLLy0wPYM2SEqwx/wGNz95SFl63G8PNFpnu/J Rvt78PWQwjvRsNz0lrsK0w3z/LBNO6zsyA8sexZfeRF8UPPQ2/K3ZdNAbl1eapodgezr 1HQ8hTKJAbAoy9DyJNDen4N7i4C2udTRQQvJ0oogK/wduqa9bOuM1gQR/MVGEH28FtQ3 MBOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=kpQzaO02; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id b25-20020aa7c6d9000000b00446b33b356asi14308863eds.502.2022.10.20.02.28.21 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:28:22 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=kpQzaO02; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8F547386545B for ; Thu, 20 Oct 2022 09:27:38 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8F547386545B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258058; bh=0V/tdGhkIsaaiO8Fr+ntbQ2+n7+CJ8QCkEclPJyfQjw=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=kpQzaO02C9Gd8WXoY3fRXfpSSwD7IiF+UGd6GIMzXNJUBwuXcEblbUS+DCg3oadNA OaD/Mn1JfGgwPBXZ15RKHS/TebPoct5Jh78Z+Lv3xIppJ6nu5cvBFIIffhWY1AiK40 QEHF3PaUPuFJOp3Bb7jxFH9xhGlA59ZzBI5RJS5s= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 4636C385085B for ; Thu, 20 Oct 2022 09:27:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4636C385085B Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 8DAC9300089; Thu, 20 Oct 2022 09:27:29 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 05/40] cpu/cris: Add u-stall virtual unit to CRIS v32 Date: Thu, 20 Oct 2022 09:25:51 +0000 Message-Id: <24baefe92148f4b7968115ba13de9b0c863a65f6.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198255811714975?= X-GMAIL-MSGID: =?utf-8?q?1747198255811714975?= Because CRIS v32 model does not define u-stall virtual unit, CGEN-generated sim/cris/decodev32.h does not define the function declaration of crisv32f_model_crisv32_u_stall. It led to a hack in commit 4e6e8ba7c565 ("sim: cris: clean up missing func prototype warnings"), manually adding the declaration of crisv32f_model_crisv32_u_stall. To **not** touch CGEN-generated files manually, this commit adds u-stall virtual unit for CRIS v32 to let CGEN generate the function declaration of crisv32f_model_crisv32_u_stall automatically. This is still hackish but less than the previous one. cpu/ChangeLog: * cris.cpu: Add u-stall virtual unit to CRIS v32. --- cpu/cris.cpu | 1 + 1 file changed, 1 insertion(+) diff --git a/cpu/cris.cpu b/cpu/cris.cpu index cd85f4e94e2..a2d054f954c 100644 --- a/cpu/cris.cpu +++ b/cpu/cris.cpu @@ -284,6 +284,7 @@ (unit u-const16 "Fetch 16-bit operand" () 1 1 () () () ()) (unit u-const32 "Fetch 32-bit operand" () 1 1 () () () ()) (unit u-skip4 "Skip 4 bytes" () 1 1 () () () ()) + (unit u-stall "Stall unit" () 1 1 () () () ()) ; For v32, we need to keep track of inputs (for movem destination ; cycle penalties) and output (for e.g. memory source and jump From patchwork Thu Oct 20 09:25:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6087 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp154663wrs; Thu, 20 Oct 2022 02:31:54 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5zgm9/+cIdZBIOVeRDdQWbwzd4DFSe9A75GUQfXMZ6kxH9RM5MxHapNTxtmh/UeSOlAzrJ X-Received: by 2002:a05:6402:27d4:b0:45d:a69e:336d with SMTP id c20-20020a05640227d400b0045da69e336dmr11301635ede.298.1666258314174; Thu, 20 Oct 2022 02:31:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258314; cv=none; d=google.com; s=arc-20160816; b=FT5QBkwGgYc/ZaxOHpU8Y3a9Rna8hBge3rgB79E6CLL6fflslElkocfjpse+nY6ybc +fMT1jrhBdcUp3M0pmv7tLdjwJjDlBPoRQFs361iw3RpuEwaftYzqBCJliTG4O6Sqm9c 5Py1aUShQuWU8tsF5aafaOQqy+F2VzmacWo+U/yVLACDBGUJ0e4ub/8JJe2ZscY57exD 4TuY5LoiqQau3z6V16kxkA5FL6ocHTcOrtEfcg/d8u2dpisSvlB+03Qc0/EvyGXZl4Jw zvpmfHFt+HgcNm6TH2sdVTgA52WqEHgEiwlYHLERhopd+0eQRAeNEHV+7wrcbgnX35MP ZuwA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=wSc7GsQVfWfQxciF0C3o8qc3GaZdVuMxvyAiY+Il5HY=; b=lMaTfayBiwp6gqCG7y8SBOqug3VrOWSg9BlvXJxvjhO0cyouAAOk61vH3ygUD27ExN vDP6wfokm0olaGIrYGZ9u5Bjr9sbiggoS9lYxBwEY9XNwrmWGUvXt7+0eQgXcAuYcTPM 4OixwFKorQufm0Gvn6YWd71Vs0e90HuyGUgC/pTIgJjAcWU7os9A0waSG7j+iXytPd83 ouQN/uofYQTfb2YpIFR0FVeZq/MNHYpJeBAOPXQgh/sHXkve9DDsNQGou10sr7l4U71F a3XmrkydTlii2J6EV6a/8WlyGC3HGEd7xuxJvI/hD71GirbwpVCdDFPjPM8xX4+UUowh By9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=F5eBtOBJ; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id l15-20020a170906794f00b0078dc7f7d0ebsi17005565ejo.822.2022.10.20.02.31.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:31:54 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=F5eBtOBJ; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C5E6738A90BB for ; Thu, 20 Oct 2022 09:29:10 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C5E6738A90BB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258150; bh=wSc7GsQVfWfQxciF0C3o8qc3GaZdVuMxvyAiY+Il5HY=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=F5eBtOBJGHfpQMmAKzQYfz4UKzvrn0xkBCL7V1j8ug6bH3J4OPWdbfA6ckJ37veBA UUDgv8qnrxJoaEuUR7oHgbYxUXX5ncTA9fETS8mbPqHcXvstebe9xtdekIdEnf6umP rGF7wxctiN547UNO73+px2HWVWS9CowGJvI4VkNU= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id ADB803865C2D for ; Thu, 20 Oct 2022 09:27:41 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org ADB803865C2D Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 152D3300089; Thu, 20 Oct 2022 09:27:40 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 06/40] sim/cris: Move declarations of f_specific_init Date: Thu, 20 Oct 2022 09:25:52 +0000 Message-Id: <3904a5c3e80f8548150d8088a92059dd728c7ff8.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198478022596964?= X-GMAIL-MSGID: =?utf-8?q?1747198478022596964?= Declarations for MY (f_specific_init) functions are defined in CGEN- generated header files: sim/cris/decodev10.h (crisv10f_specific_init) and sim/cris/decodev32.h (crisv32f_specific_init). However, those declarations are manually added by the commit 4e6e8ba7c565 ("sim: cris: clean up missing func prototype warnings") as a hack and not a CGEN-generated part. Those definitions are required by $(builddir)/sim/cris/mloopv{10,32}f.c, generated from $(srcdir)/sim/cris/mloop.in. If we define a declaration in mloop.in, we no longer need manually added one. This commit adds a template for function declaration so that we no longer have to touch CGEN-generated code. With this and the previous commit "cpu/cris: Add stall unit to CRIS v32", we can now safely regenerate CRIS CPU declarations with CGEN. --- sim/cris/cris-tmpl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sim/cris/cris-tmpl.c b/sim/cris/cris-tmpl.c index 9f0c06e755e..8694d38b2af 100644 --- a/sim/cris/cris-tmpl.c +++ b/sim/cris/cris-tmpl.c @@ -264,6 +264,8 @@ MY (make_thread_cpu_data) (SIM_CPU *current_cpu, void *context) /* Hook function for per-cpu simulator initialization. */ +extern void MY (f_specific_init) (SIM_CPU *); + void MY (f_specific_init) (SIM_CPU *current_cpu) { From patchwork Thu Oct 20 09:25:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6091 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp155532wrs; Thu, 20 Oct 2022 02:34:16 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7fczR/HfYHLnqWEwxhLKHxMYljKuhCEtlVKnfb+sQa2T+mTwNLDCjsgyGXK3hMyrUfofs4 X-Received: by 2002:a05:6402:518d:b0:45d:d319:2a88 with SMTP id q13-20020a056402518d00b0045dd3192a88mr11054063edd.35.1666258456745; Thu, 20 Oct 2022 02:34:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258456; cv=none; d=google.com; s=arc-20160816; b=IYFXPzeUoKqN8KEqhOHVlG5zB0V4ea2mMA4O3R1SpdAnyKsX+4TJBMV1Eo9TqN4x84 nfBjd+u3pCcEcNOLnJVnbsn1QyD+DI6YA9ONIM3lQWHf8vl/czS/+xHQTnuVSwiIFLjO OJHjuVf4vNRhijAqHYCxvj/EfgZFgh1kM1RUiWtJUbhUUuNF9W7H6w52Lgz+9uald+iG 33GjmNb287hwIbG+dVHwoHiBS16pcZcdvdIjDF/t9e8aEGfg0qfzR/I7PrSOrMmMPOY2 PzW5yYxFDuepfVIGrm/Y4WGOHnQIH9MiiRWdV7rXV1DUB3C8yHC3KF2xPtfFo2J8dGIx jAEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=m/rtH/VKkbVKFMtdSHn0eho7NdrXEF175jcMkuXR46w=; b=B+GHolFhPapHXZlYokVcPUODEuuuV6Yg780cv6l3b6gKXuE5K0SOHNtC8qHEsGoG5k h0QKloKCvtfupUt498RdDzL2QdmkzK4o6nsfxnhEiGY/ZzyHipGTPJkdAbkvYyh/1eOn F7Ivf+K+O2A0zWZqQCnkWb3A5zVohzeXeqzEXFCJN3CbPPdnHsvkhf37rnRCtMrdmEni G9GR+ojD2OMCfKSv0M5SzjMl0z4P6jupXXFVXhUFG3+9vnqIs5guqNGO4qgsv2lRPEL+ OZPWZL/h05tpk2q7U3kUhh1DQVmRa63FUxcTkiZkOLzpS9GN2O55xC/f/iNwTnPf1358 UFzQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=vCw6y1AM; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id k4-20020a50cb84000000b00453688643fasi14905089edi.260.2022.10.20.02.34.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:34:16 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=vCw6y1AM; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D5A7E38207D3 for ; Thu, 20 Oct 2022 09:30:12 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D5A7E38207D3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258212; bh=m/rtH/VKkbVKFMtdSHn0eho7NdrXEF175jcMkuXR46w=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=vCw6y1AMxFvewj05UJnhxsE6oqsLKaFcpQPa1Nq48JROGkmujTe8Rxa2tw3isyiOa 8ZsgtiZxxuHySoO4K6+dFMp1vBpNiu7GMee5IiObb2yUXYXj3JkY5frPzJmABwN/nr Xl28i39f149t+F22ld37JwpQxM0E+AH5/Bp3IKOo= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 4B195385021A for ; Thu, 20 Oct 2022 09:27:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4B195385021A Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 9741E300089; Thu, 20 Oct 2022 09:27:50 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 07/40] sim/cris: Regenerate with CGEN Date: Thu, 20 Oct 2022 09:25:53 +0000 Message-Id: <69ef2d7dd519ed572511890a215a0f6d74e53384.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198627771109446?= X-GMAIL-MSGID: =?utf-8?q?1747198627771109446?= All CRIS-related files are regenerated by custom CGEN that is modified by the author (CGEN change will be separately upstreamed). --- sim/cris/arch.c | 5 +++-- sim/cris/arch.h | 21 +++++++++++++++------ sim/cris/cpuall.h | 5 +++-- sim/cris/cpuv10.c | 6 ++++-- sim/cris/cpuv10.h | 5 +++-- sim/cris/cpuv32.c | 6 ++++-- sim/cris/cpuv32.h | 5 +++-- sim/cris/decodev10.c | 21 +++++++++++---------- sim/cris/decodev10.h | 6 +++--- sim/cris/decodev32.c | 21 +++++++++++---------- sim/cris/decodev32.h | 8 ++++---- sim/cris/modelv10.c | 5 +++-- sim/cris/modelv32.c | 5 +++-- sim/cris/semcrisv10f-switch.c | 20 +++++++++++++------- sim/cris/semcrisv32f-switch.c | 20 +++++++++++++------- 15 files changed, 96 insertions(+), 63 deletions(-) diff --git a/sim/cris/arch.c b/sim/cris/arch.c index 1d50838f0a1..b502c239fca 100644 --- a/sim/cris/arch.c +++ b/sim/cris/arch.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/arch.h b/sim/cris/arch.h index 037b463438d..57d51236c03 100644 --- a/sim/cris/arch.h +++ b/sim/cris/arch.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,13 +17,22 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef CRIS_ARCH_H #define CRIS_ARCH_H +#define TARGET_BIG_ENDIAN 1 + +#define WI SI +#define UWI USI +#define AI USI + +#define IAI USI + /* Enum declaration for model types. */ typedef enum model_type { MODEL_CRISV10, MODEL_CRISV32, MODEL_MAX @@ -36,10 +45,10 @@ typedef enum unit_type { UNIT_NONE, UNIT_CRISV10_U_MOVEM, UNIT_CRISV10_U_MULTIPLY, UNIT_CRISV10_U_SKIP4 , UNIT_CRISV10_U_STALL, UNIT_CRISV10_U_CONST32, UNIT_CRISV10_U_CONST16, UNIT_CRISV10_U_MEM , UNIT_CRISV10_U_EXEC, UNIT_CRISV32_U_EXEC_TO_SR, UNIT_CRISV32_U_EXEC_MOVEM, UNIT_CRISV32_U_EXEC - , UNIT_CRISV32_U_SKIP4, UNIT_CRISV32_U_CONST32, UNIT_CRISV32_U_CONST16, UNIT_CRISV32_U_JUMP - , UNIT_CRISV32_U_JUMP_SR, UNIT_CRISV32_U_JUMP_R, UNIT_CRISV32_U_BRANCH, UNIT_CRISV32_U_MULTIPLY - , UNIT_CRISV32_U_MOVEM_MTOR, UNIT_CRISV32_U_MOVEM_RTOM, UNIT_CRISV32_U_MEM_W, UNIT_CRISV32_U_MEM_R - , UNIT_CRISV32_U_MEM, UNIT_MAX + , UNIT_CRISV32_U_STALL, UNIT_CRISV32_U_SKIP4, UNIT_CRISV32_U_CONST32, UNIT_CRISV32_U_CONST16 + , UNIT_CRISV32_U_JUMP, UNIT_CRISV32_U_JUMP_SR, UNIT_CRISV32_U_JUMP_R, UNIT_CRISV32_U_BRANCH + , UNIT_CRISV32_U_MULTIPLY, UNIT_CRISV32_U_MOVEM_MTOR, UNIT_CRISV32_U_MOVEM_RTOM, UNIT_CRISV32_U_MEM_W + , UNIT_CRISV32_U_MEM_R, UNIT_CRISV32_U_MEM, UNIT_MAX } UNIT_TYPE; #define MAX_UNITS (4) diff --git a/sim/cris/cpuall.h b/sim/cris/cpuall.h index 145646f4ed0..c600f5d3a31 100644 --- a/sim/cris/cpuall.h +++ b/sim/cris/cpuall.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/cpuv10.c b/sim/cris/cpuv10.c index d53aa556e73..d188590e486 100644 --- a/sim/cris/cpuv10.c +++ b/sim/cris/cpuv10.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -490,3 +491,4 @@ crisv10f_h_prefixreg_pre_v32_set (SIM_CPU *current_cpu, SI newval) { CPU (h_prefixreg_pre_v32) = newval; } + diff --git a/sim/cris/cpuv10.h b/sim/cris/cpuv10.h index 30555c8244e..296279ff918 100644 --- a/sim/cris/cpuv10.h +++ b/sim/cris/cpuv10.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/cpuv32.c b/sim/cris/cpuv32.c index ad9af980aa1..997ef2c7533 100644 --- a/sim/cris/cpuv32.c +++ b/sim/cris/cpuv32.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -586,3 +587,4 @@ crisv32f_h_prefixreg_v32_set (SIM_CPU *current_cpu, SI newval) { SET_H_PREFIXREG_V32 (newval); } + diff --git a/sim/cris/cpuv32.h b/sim/cris/cpuv32.h index b23eff4f52a..affb72f99b8 100644 --- a/sim/cris/cpuv32.h +++ b/sim/cris/cpuv32.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/decodev10.c b/sim/cris/decodev10.c index 257961ae160..ebf511c1a2d 100644 --- a/sim/cris/decodev10.c +++ b/sim/cris/decodev10.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -41,12 +42,12 @@ static IDESC crisv10f_insn_data[CRISV10F_INSN__MAX]; static const struct insn_sem crisv10f_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, CRISV10F_INSN_X_AFTER, CRISV10F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, CRISV10F_INSN_X_BEFORE, CRISV10F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, CRISV10F_INSN_X_CTI_CHAIN, CRISV10F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, CRISV10F_INSN_X_CHAIN, CRISV10F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, CRISV10F_INSN_X_BEGIN, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, CRISV10F_INSN_X_AFTER, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, CRISV10F_INSN_X_BEFORE, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, CRISV10F_INSN_X_CTI_CHAIN, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, CRISV10F_INSN_X_CHAIN, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, CRISV10F_INSN_X_BEGIN, CRISV10F_SFMT_EMPTY }, { CRIS_INSN_NOP, CRISV10F_INSN_NOP, CRISV10F_SFMT_NOP }, { CRIS_INSN_MOVE_B_R, CRISV10F_INSN_MOVE_B_R, CRISV10F_SFMT_MOVE_B_R }, { CRIS_INSN_MOVE_W_R, CRISV10F_INSN_MOVE_W_R, CRISV10F_SFMT_MOVE_B_R }, @@ -254,7 +255,7 @@ static const struct insn_sem crisv10f_insn_sem[] = static const struct insn_sem crisv10f_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ @@ -303,7 +304,7 @@ crisv10f_init_idesc_table (SIM_CPU *cpu) init_idesc (cpu, id, t); /* Now fill in the values for the chosen cpu. */ - for (t = crisv10f_insn_sem, tend = t + ARRAY_SIZE (crisv10f_insn_sem); + for (t = crisv10f_insn_sem, tend = t + sizeof (crisv10f_insn_sem) / sizeof (*t); t != tend; ++t) { init_idesc (cpu, & table[t->index], t); diff --git a/sim/cris/decodev10.h b/sim/cris/decodev10.h index c742c2fe9c6..a3307ad8d21 100644 --- a/sim/cris/decodev10.h +++ b/sim/cris/decodev10.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -30,7 +31,6 @@ extern const IDESC *crisv10f_decode (SIM_CPU *, IADDR, extern void crisv10f_init_idesc_table (SIM_CPU *); extern void crisv10f_sem_init_idesc_table (SIM_CPU *); extern void crisv10f_semf_init_idesc_table (SIM_CPU *); -extern void crisv10f_specific_init (SIM_CPU *); /* Enum declaration for instructions in cpu family crisv10f. */ typedef enum crisv10f_insn_type { diff --git a/sim/cris/decodev32.c b/sim/cris/decodev32.c index d6afafa377f..c382f9f6b2f 100644 --- a/sim/cris/decodev32.c +++ b/sim/cris/decodev32.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -41,12 +42,12 @@ static IDESC crisv32f_insn_data[CRISV32F_INSN__MAX]; static const struct insn_sem crisv32f_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, CRISV32F_INSN_X_AFTER, CRISV32F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, CRISV32F_INSN_X_BEFORE, CRISV32F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, CRISV32F_INSN_X_CTI_CHAIN, CRISV32F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, CRISV32F_INSN_X_CHAIN, CRISV32F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, CRISV32F_INSN_X_BEGIN, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, CRISV32F_INSN_X_AFTER, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, CRISV32F_INSN_X_BEFORE, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, CRISV32F_INSN_X_CTI_CHAIN, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, CRISV32F_INSN_X_CHAIN, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, CRISV32F_INSN_X_BEGIN, CRISV32F_SFMT_EMPTY }, { CRIS_INSN_MOVE_B_R, CRISV32F_INSN_MOVE_B_R, CRISV32F_SFMT_MOVE_B_R }, { CRIS_INSN_MOVE_W_R, CRISV32F_INSN_MOVE_W_R, CRISV32F_SFMT_MOVE_B_R }, { CRIS_INSN_MOVE_D_R, CRISV32F_INSN_MOVE_D_R, CRISV32F_SFMT_MOVE_D_R }, @@ -258,7 +259,7 @@ static const struct insn_sem crisv32f_insn_sem[] = static const struct insn_sem crisv32f_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ @@ -307,7 +308,7 @@ crisv32f_init_idesc_table (SIM_CPU *cpu) init_idesc (cpu, id, t); /* Now fill in the values for the chosen cpu. */ - for (t = crisv32f_insn_sem, tend = t + ARRAY_SIZE (crisv32f_insn_sem); + for (t = crisv32f_insn_sem, tend = t + sizeof (crisv32f_insn_sem) / sizeof (*t); t != tend; ++t) { init_idesc (cpu, & table[t->index], t); diff --git a/sim/cris/decodev32.h b/sim/cris/decodev32.h index aae993b7881..94c483b03a1 100644 --- a/sim/cris/decodev32.h +++ b/sim/cris/decodev32.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -30,7 +31,6 @@ extern const IDESC *crisv32f_decode (SIM_CPU *, IADDR, extern void crisv32f_init_idesc_table (SIM_CPU *); extern void crisv32f_sem_init_idesc_table (SIM_CPU *); extern void crisv32f_semf_init_idesc_table (SIM_CPU *); -extern void crisv32f_specific_init (SIM_CPU *); /* Enum declaration for instructions in cpu family crisv32f. */ typedef enum crisv32f_insn_type { @@ -126,8 +126,8 @@ typedef enum crisv32f_sfmt_type { extern int crisv32f_model_crisv32_u_exec_to_sr (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rs*/, INT /*Pd*/); extern int crisv32f_model_crisv32_u_exec_movem (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rs*/, INT /*Rd*/); extern int crisv32f_model_crisv32_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rd*/, INT /*Rs*/, INT /*Rd*/); -extern int crisv32f_model_crisv32_u_skip4 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_stall (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); +extern int crisv32f_model_crisv32_u_skip4 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_const32 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_const16 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_jump (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Pd*/); diff --git a/sim/cris/modelv10.c b/sim/cris/modelv10.c index 2ff4f5262b2..1f0d5fa367d 100644 --- a/sim/cris/modelv10.c +++ b/sim/cris/modelv10.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/modelv32.c b/sim/cris/modelv32.c index 86087f99ff4..f056fd41c26 100644 --- a/sim/cris/modelv32.c +++ b/sim/cris/modelv32.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/semcrisv10f-switch.c b/sim/cris/semcrisv10f-switch.c index f31b29442fd..a2f1505405e 100644 --- a/sim/cris/semcrisv10f-switch.c +++ b/sim/cris/semcrisv10f-switch.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -260,7 +261,7 @@ This file is part of the GNU simulators. /* If hyper-fast [well not unnecessarily slow] execution is selected, turn off frills like tracing and profiling. */ -/* FIXME: A better way would be to have CGEN_TRACE_RESULT check for something +/* FIXME: A better way would be to have TRACE_RESULT check for something that can cause it to be optimized out. Another way would be to emit special handlers into the instruction "stream". */ @@ -3379,6 +3380,7 @@ cgen_rtx_error (current_cpu, "move-spr-r from unimplemented register"); SI tmp_rno; SI tmp_newval; tmp_rno = FLD (f_operand2); + tmp_newval = 0; if (EQSI (tmp_rno, 5)) { tmp_newval = EXTHISI (({ SI tmp_addr; HI tmp_tmp_mem; @@ -10993,7 +10995,8 @@ SET_H_VBIT_MOVE (0); tmp_tmpd = ({ SI tmp_tmpcode; SI tmp_tmpval; SI tmp_tmpres; - tmp_tmpcode = FLD (f_operand2); + tmp_tmpres = 0; +; tmp_tmpcode = FLD (f_operand2); ; tmp_tmpval = tmp_tmps; ; if (EQSI (tmp_tmpcode, 0)) { tmp_tmpres = (cgen_rtx_error (current_cpu, "SWAP without swap modifier isn't implemented"), 0); @@ -12060,7 +12063,8 @@ if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) { BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } @@ -12192,7 +12196,8 @@ if (tmp_truthval) { BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } @@ -13065,7 +13070,8 @@ SET_H_VBIT_MOVE (0); BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } diff --git a/sim/cris/semcrisv32f-switch.c b/sim/cris/semcrisv32f-switch.c index ab15d6ee36c..bf06e8aa6ca 100644 --- a/sim/cris/semcrisv32f-switch.c +++ b/sim/cris/semcrisv32f-switch.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -264,7 +265,7 @@ This file is part of the GNU simulators. /* If hyper-fast [well not unnecessarily slow] execution is selected, turn off frills like tracing and profiling. */ -/* FIXME: A better way would be to have CGEN_TRACE_RESULT check for something +/* FIXME: A better way would be to have TRACE_RESULT check for something that can cause it to be optimized out. Another way would be to emit special handlers into the instruction "stream". */ @@ -3291,6 +3292,7 @@ cgen_rtx_error (current_cpu, "move-spr-r from unimplemented register"); SI tmp_rno; SI tmp_newval; tmp_rno = FLD (f_operand2); + tmp_newval = 0; if (EQSI (tmp_rno, 2)) { tmp_newval = ({ SI tmp_addr; SI tmp_tmp_mem; @@ -11263,7 +11265,8 @@ SET_H_VBIT_MOVE (0); tmp_tmpd = ({ SI tmp_tmpcode; SI tmp_tmpval; SI tmp_tmpres; - tmp_tmpcode = FLD (f_operand2); + tmp_tmpres = 0; +; tmp_tmpcode = FLD (f_operand2); ; tmp_tmpval = tmp_tmps; ; if (EQSI (tmp_tmpcode, 0)) { tmp_tmpres = (cgen_rtx_error (current_cpu, "SWAP without swap modifier isn't implemented"), 0); @@ -12460,7 +12463,8 @@ crisv32f_rfg_handler (current_cpu, pc); BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } @@ -12592,7 +12596,8 @@ if (tmp_truthval) { BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } @@ -13380,7 +13385,8 @@ SET_H_VBIT_MOVE (0); BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } From patchwork Thu Oct 20 09:25:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6085 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp154268wrs; Thu, 20 Oct 2022 02:30:42 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4oO5KJ7LKljmeWOAiiTq1SdqjklWn9aOEcy2yRztxNgqDFFxWTrsLREDoWknbGJauhEbej X-Received: by 2002:a05:6402:5cd:b0:446:5965:f4af with SMTP id n13-20020a05640205cd00b004465965f4afmr11259964edx.12.1666258242486; Thu, 20 Oct 2022 02:30:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258242; cv=none; d=google.com; s=arc-20160816; b=rMrq9u7X/O/X6Eosen/AlO7PColIzUbYJWul90B0tit3/AgofdqGWvUTu3MaGpeA9n obkA4+ctInWYCo+itW5tXD4sEEhS2fAdihyTQpHYGela6TuGFs0bZoytEyCKBs898xxY W3fXQswHruEbV0mCrEGAf3pNQhpn3cG4a3v8AkvlqwSZOp0HsLejSmCeEIlXEy3b/Zny onn1NFAjrmR1JZrsUZ+nOtvNdTfh72AbpmjbUk5iUJcjf33iNG7z7KQ1OZgvPgBP8ERC 3TaFqK7b7B1kTy1Pa30vsUyI0fhZzcW+Jgus84HB6B9gcxUWr1Phz+q3zfozPdocxDb9 GR/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=mh5pcwfk7F0V3+jIBs86h22ivIAPp2tE8vB0Aj6IkAk=; b=f2Sis59ZvTaAXAfOJU4TRcKriONi46tlWauGzL5s7MS+N3bBCiUtgK3jVgMmKDmdyQ gWYWxHepvDnYc2wReBC49v5x4F5M1is7HHsabFFA/a8VysovIzdh3z4wiqNnAw7Sq5r4 PZnCjhXMrRuuUI1HUM98HJu00LJht0FEeUR4wXMFMTv1l/tX+Z2oVslyKWTVnOnZ/avO E681dGZhh3fmSAy3Afd44Xm/oTSHrG2pmQN6NqRg9wEE0td6MrDc4PkfoS8UGMT44EUS MfM0B5KSKGoGq3rzthsBwYwytrdsp1sj15Iop/TknQU08I3jmwL+BQ9qPi29GrhONOAf UlDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=sGzFa37T; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id r26-20020a170906a21a00b0078d39e310e0si13651154ejy.701.2022.10.20.02.30.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:30:42 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=sGzFa37T; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5C0873851178 for ; Thu, 20 Oct 2022 09:28:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5C0873851178 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258119; bh=mh5pcwfk7F0V3+jIBs86h22ivIAPp2tE8vB0Aj6IkAk=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=sGzFa37TifIoLmfNidzTtLInxApQerYFWwIwRQQTip6peEwcJ3d/NJemAC2TOVNu4 213TvByw/0SAtMXqNt3ZUsMz1gJ07FY4YbR5ekCs4MQnt56I5/BWwBHhJIUZdBxfoh RSOWeucWtR5BZKp7ibNMhlmqApDGnl9fhqO7MDcU= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id D070F383FBB3 for ; Thu, 20 Oct 2022 09:28:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D070F383FBB3 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 252DF300089; Thu, 20 Oct 2022 09:28:01 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 08/40] sim/erc32: Insert void parameter Date: Thu, 20 Oct 2022 09:25:54 +0000 Message-Id: <26a3eaf4f5d2e0db6977738ddfd65d82b36e38b2.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198402920972534?= X-GMAIL-MSGID: =?utf-8?q?1747198402920972534?= Clang generates a warning if there is a function declaration/definition with zero arguments. Such declarations/definitions without a prototype (an argument list) are deprecated forms of indefinite arguments ("-Wdeprecated-non-prototype"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit replaces () with (void) to avoid this warning. --- sim/erc32/func.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sim/erc32/func.c b/sim/erc32/func.c index 4d1942065b8..af92c9f7d48 100644 --- a/sim/erc32/func.c +++ b/sim/erc32/func.c @@ -298,7 +298,7 @@ disp_reg(struct pstate *sregs, char *reg) #ifdef ERRINJ void -errinj() +errinj (void) { int err; @@ -322,7 +322,7 @@ errinj() } void -errinjstart() +errinjstart (void) { if (errper) event(errinj, 0, (random()%errper)); } @@ -855,7 +855,7 @@ event(void (*cfunc) (), int32_t arg, uint64_t delta) #if 0 /* apparently not used */ void -stop_event() +stop_event(void) { } #endif From patchwork Thu Oct 20 09:25:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6086 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp154626wrs; Thu, 20 Oct 2022 02:31:47 -0700 (PDT) X-Google-Smtp-Source: AMsMyM40R6YyNM8gh/BcHbtDHcTYL0banqfNYVvfkV7MDYL3uq/jGOUESVV86hULcWh31eZ/RCxO X-Received: by 2002:a50:a44c:0:b0:45c:6451:363d with SMTP id v12-20020a50a44c000000b0045c6451363dmr11306616edb.115.1666258307410; Thu, 20 Oct 2022 02:31:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258307; cv=none; d=google.com; s=arc-20160816; b=ziR1dmPqcgSxmk0kYB3H/WtBjVhNURRYZ5pa+Yj0NkUgmtS55JUE91JyPyKxZo3lNd q4IYO/RqUHygQim0igMFwosafCl4Pa9kq1XmViqWPzm4NBDlO5hTUpcbmD9L9H2mEb89 QPQ0ij2VrdO5MwGt2SpaMsOg6bv3iVuQFrpi26JVADuBR4GmKglXKCVa5wVgWAsur0Gi m0nBbMRTZHMhdNFV2h7sEoyapUjZnTHsGEvYgRKlHjfkofJ924R8r38Dw02P5+Bq6jfR 19YPS49yCDgvTTMKD0juRDqNX/DBoSXKIEc9jpgvuOUEphMD0LOfdIjYJi8S3MPkTjdu eWRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=5elJjbQhbcPSYjFChLwoZplVAFvOG1mbeTzZbnT9G98=; b=yNbDPIa/SsHph5FmdPPj0tu+j81ZKBjJ4xtWnmVZtSnBZa7XH/yXUYMjsgetTDd/UE B9CYfgeow5c1S+rRyRy8UEoMdEBmpqlYOsR9lNMlcaFxWuxBtlx61oEL7vUQF+GNYMNF ed11LCxoiqbNeUPlQ6UI52gQ3f5gW1lQStIrLNqwomZO/GRu44u4PAwas0B24QvHafX2 ECLXqbrssfni3+Y3BdhqyY97v72VnYOZZF7WMRr7FsnUN5l6K1rBtGj/HZySJKc2IUKS rU1OW7H0tHujzXWlhC7QIV31pcL7isNWHA4ZgeXF+g7DwIOO8WTMPfLMA0G6RXCd54TH qjpg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=khlNTtG5; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id sb32-20020a1709076da000b0078772382b35si18305783ejc.91.2022.10.20.02.31.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:31:47 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=khlNTtG5; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 73DB938A90B8 for ; Thu, 20 Oct 2022 09:29:07 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 73DB938A90B8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258147; bh=5elJjbQhbcPSYjFChLwoZplVAFvOG1mbeTzZbnT9G98=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=khlNTtG5UkYhcHLQLQAtyx3kr2NBSpWOJsSmW3ujPr5O8uZaW4NPbPfCK7mx2upX6 TXZHt3pqzstjKRAcRFtE2hamhhoWVH4xA8HTjLlp7bf+lX27nRXWqGLh9qhAXuBSYz r8FhhUKe1UKp+gBM0tvsmvV9YIyTqqn1BGkxrDuA= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 5CC60384D141 for ; Thu, 20 Oct 2022 09:28:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5CC60384D141 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id B00CD300089; Thu, 20 Oct 2022 09:28:11 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 09/40] sim/erc32: Use int32_t as event callback argument Date: Thu, 20 Oct 2022 09:25:55 +0000 Message-Id: <057c2f8392410494c3bc5dc98052246508e6a73e.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198470709104693?= X-GMAIL-MSGID: =?utf-8?q?1747198470709104693?= Clang generates a warning if an argument is passed to a function without prototype (zero arguments, even without (void)). Such calls are deprecated forms of indefinite arguments passing ("-Wdeprecated-non-prototype"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). To fix that, this commit makes struct evcell to use int32_t as a callback (cfunc) argument of an event. --- sim/erc32/erc32.c | 28 ++++++++++++++-------------- sim/erc32/func.c | 8 ++++---- sim/erc32/sis.h | 4 ++-- 3 files changed, 20 insertions(+), 20 deletions(-) diff --git a/sim/erc32/erc32.c b/sim/erc32/erc32.c index 0206c02e6f0..d7cc1f1cf3b 100644 --- a/sim/erc32/erc32.c +++ b/sim/erc32/erc32.c @@ -274,19 +274,19 @@ static void port_init (void); static uint32_t read_uart (uint32_t addr); static void write_uart (uint32_t addr, uint32_t data); static void flush_uart (void); -static void uarta_tx (void); -static void uartb_tx (void); -static void uart_rx (void *arg); -static void uart_intr (void *arg); +static void uarta_tx (int32_t); +static void uartb_tx (int32_t); +static void uart_rx (int32_t); +static void uart_intr (int32_t); static void uart_irq_start (void); -static void wdog_intr (void *arg); +static void wdog_intr (int32_t); static void wdog_start (void); -static void rtc_intr (void *arg); +static void rtc_intr (int32_t); static void rtc_start (void); static uint32_t rtc_counter_read (void); static void rtc_scaler_set (uint32_t val); static void rtc_reload_set (uint32_t val); -static void gpt_intr (void *arg); +static void gpt_intr (int32_t); static void gpt_start (void); static uint32_t gpt_counter_read (void); static void gpt_scaler_set (uint32_t val); @@ -1245,7 +1245,7 @@ flush_uart(void) ATTRIBUTE_UNUSED static void -uarta_tx(void) +uarta_tx(int32_t arg ATTRIBUTE_UNUSED) { while (f1open && fwrite(&uarta_sreg, 1, 1, f1out) != 1); @@ -1261,7 +1261,7 @@ uarta_tx(void) ATTRIBUTE_UNUSED static void -uartb_tx(void) +uartb_tx(int32_t arg ATTRIBUTE_UNUSED) { while (f2open && fwrite(&uartb_sreg, 1, 1, f2out) != 1); if (uart_stat_reg & UARTB_HRE) { @@ -1276,7 +1276,7 @@ uartb_tx(void) ATTRIBUTE_UNUSED static void -uart_rx(void *arg) +uart_rx(int32_t arg ATTRIBUTE_UNUSED) { int32_t rsize; char rxd; @@ -1318,7 +1318,7 @@ uart_rx(void *arg) } static void -uart_intr(void *arg) +uart_intr(int32_t arg ATTRIBUTE_UNUSED) { read_uart(0xE8); /* Check for UART interrupts every 1000 clk */ flush_uart(); /* Flush UART ports */ @@ -1341,7 +1341,7 @@ uart_irq_start(void) /* Watch-dog */ static void -wdog_intr(void *arg) +wdog_intr(int32_t arg ATTRIBUTE_UNUSED) { if (wdog_status == disabled) { wdog_status = stopped; @@ -1379,7 +1379,7 @@ wdog_start(void) static void -rtc_intr(void *arg) +rtc_intr(int32_t arg ATTRIBUTE_UNUSED) { if (rtc_counter == 0) { @@ -1430,7 +1430,7 @@ rtc_reload_set(uint32_t val) } static void -gpt_intr(void *arg) +gpt_intr(int32_t arg ATTRIBUTE_UNUSED) { if (gpt_counter == 0) { mec_irq(12); diff --git a/sim/erc32/func.c b/sim/erc32/func.c index af92c9f7d48..6971ae0129d 100644 --- a/sim/erc32/func.c +++ b/sim/erc32/func.c @@ -298,7 +298,7 @@ disp_reg(struct pstate *sregs, char *reg) #ifdef ERRINJ void -errinj (void) +errinj (int32_t arg ATTRIBUTE_UNUSED) { int err; @@ -887,8 +887,8 @@ advance_time(struct pstate *sregs) { struct evcell *evrem; - void (*cfunc) (); - uint32_t arg; + void (*cfunc) (int32_t); + int32_t arg; uint64_t endtime; #ifdef STAT @@ -926,7 +926,7 @@ int wait_for_irq(void) { struct evcell *evrem; - void (*cfunc) (); + void (*cfunc) (int32_t); int32_t arg; uint64_t endtime; diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h index 71033137f2c..36346cae641 100644 --- a/sim/erc32/sis.h +++ b/sim/erc32/sis.h @@ -124,7 +124,7 @@ struct pstate { }; struct evcell { - void (*cfunc) (); + void (*cfunc) (int32_t); int32_t arg; uint64_t time; struct evcell *nxt; @@ -183,7 +183,7 @@ extern void init_signals (void); struct disassemble_info; extern void dis_mem (uint32_t addr, uint32_t len, struct disassemble_info *info); -extern void event (void (*cfunc) (), int32_t arg, uint64_t delta); +extern void event (void (*cfunc) (int32_t), int32_t arg, uint64_t delta); extern void set_int (int32_t level, void (*callback) (), int32_t arg); extern void advance_time (struct pstate *sregs); extern uint32_t now (void); From patchwork Thu Oct 20 09:25:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6090 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp155501wrs; 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[8.43.85.97]) by mx.google.com with ESMTPS id hr1-20020a1709073f8100b0078d71a6bd56si19287249ejc.757.2022.10.20.02.34.11 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:34:11 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=ke0Fyy0y; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9BFEB3954C72 for ; Thu, 20 Oct 2022 09:30:10 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9BFEB3954C72 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258210; bh=QsbrL9A+SUyE9Rcp5aYjsuYXuZZTldovXVUOVZRfb/k=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=ke0Fyy0yP7k8JIXzSjl4VcFApE+6EOvwJH7S9mVCQLeEvQNa5922tOK9CaLeQxglT SxE1+ej2AnwEVSVeLXq7mROcOWxDqV61s1lzay2FDglVRO8ki/ogRai13GTJf2i2nF PUqIUbmO0CV4Q4/WxahjaSlcnvuW2U6Y3Kjr2gEg= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id DFEB638207D4 for ; Thu, 20 Oct 2022 09:28:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org DFEB638207D4 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 3ADD4300089; Thu, 20 Oct 2022 09:28:22 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 10/40] sim/erc32: Use int32_t as IRQ callback argument Date: Thu, 20 Oct 2022 09:25:56 +0000 Message-Id: <8c05aec20557191434485be347d37177a2ec5ff2.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198622450018032?= X-GMAIL-MSGID: =?utf-8?q?1747198622450018032?= Clang generates a warning if an argument is passed to a function without prototype (zero arguments, even without (void)). Such calls are deprecated forms of indefinite arguments passing ("-Wdeprecated-non-prototype"). On the default configuration, it (somehow) doesn't cause a build failure but a warning is generated. But because the cause is the same as the issue the author fixed in "sim/erc32: Use int32_t as event callback argument", it would be better to fix it now to prevent problems in the future. To fix the issue, this commit makes struct irqcall to use int32_t as a callback (callback) argument of an IRQ. --- sim/erc32/func.c | 2 +- sim/erc32/sis.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/sim/erc32/func.c b/sim/erc32/func.c index 6971ae0129d..527df172660 100644 --- a/sim/erc32/func.c +++ b/sim/erc32/func.c @@ -874,7 +874,7 @@ init_event(void) } void -set_int(int32_t level, void (*callback) (), int32_t arg) +set_int(int32_t level, void (*callback) (int32_t), int32_t arg) { irqarr[level & 0x0f].callback = callback; irqarr[level & 0x0f].arg = arg; diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h index 36346cae641..df6b22c47b0 100644 --- a/sim/erc32/sis.h +++ b/sim/erc32/sis.h @@ -137,7 +137,7 @@ struct estate { }; struct irqcell { - void (*callback) (); + void (*callback) (int32_t); int32_t arg; }; @@ -184,7 +184,7 @@ struct disassemble_info; extern void dis_mem (uint32_t addr, uint32_t len, struct disassemble_info *info); extern void event (void (*cfunc) (int32_t), int32_t arg, uint64_t delta); -extern void set_int (int32_t level, void (*callback) (), int32_t arg); +extern void set_int (int32_t level, void (*callback) (int32_t), int32_t arg); extern void advance_time (struct pstate *sregs); extern uint32_t now (void); extern int wait_for_irq (void); From patchwork Thu Oct 20 09:25:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6089 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp155052wrs; Thu, 20 Oct 2022 02:33:03 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5teXqDP6NFraAN2npoL79SlCBMAMMOdXYRyvzTj2iCubR0g4/ci327+us+pcOTOjBHUc0J X-Received: by 2002:a05:6402:d62:b0:460:42c8:fc6d with SMTP id ec34-20020a0564020d6200b0046042c8fc6dmr2200022edb.182.1666258382958; Thu, 20 Oct 2022 02:33:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258382; cv=none; d=google.com; s=arc-20160816; b=Mh/1yCTvXeR0Sk5W4PPRdoDHcxtIzxTRUbIKCwsZ80V67I59HLxBWE9V+qibjkSzlr xs9kVCypeWkd8hjRfF3gkFV6BmYBmns2DVp/+mh35qRpQzMChklA6SKHiah158DfoaOY 2N9uUsS3v384k1sktk/SVCRA/G7IN9i/5/1Vv8l+oUMmZuUzKrw0mrNau7gYKr9nQ49w O8eJVGqSXwD/Q+KXDs/W03zliXvK7Lb0iSr7tAW77mZM8R1MRlfNxC35MMUEwALvTfrZ +bsT/VJE9X5EuIhmGCFfV8BzmaNffOSHKuoAPrLW1xwE4DyKkduWv/yRJfq/67La+GY0 mzVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=r0aaAv7OLLsxbWQ3RLGxINi4GmezOuh09aFpYxc1dNk=; b=jefFqsU8W5XW21SoUgk1ScH17Kf6vkYHYPaOjBzjnoFlR+rOHNMFZlpTXDciuVzVnp F+KGtALSgEb2GYG1r8Ll9l/d/ZBX/ndaSH8u5uSBCnHb/MW7ghdXnGIra5FkBet4poPI BCutFH7AWE9oHlLRhxJn0NpdqMJ+GjAhPXnqKq20fYRZVCYYb7FzuIDIICVCNbEgVfBP aNezFwg6N3FiACQNOYHUjbkI0DNNT6i5dJbe0azrYvAcv5UCxCX56JMhiTbNrEx1tbs1 g2rsDF+azOKLOlC3TAI4rR3YPpKheMo27C3K/Ag2A3i6xiKKxpSe4U3M3ctJE7U5cEBN nb+Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=KGmmnvLB; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id k16-20020a170906971000b0078307781936si14333408ejx.359.2022.10.20.02.33.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:33:02 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=KGmmnvLB; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B19BB39490AD for ; Thu, 20 Oct 2022 09:29:41 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B19BB39490AD DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258181; bh=r0aaAv7OLLsxbWQ3RLGxINi4GmezOuh09aFpYxc1dNk=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=KGmmnvLBb5oEZNkVn5vnOcpzWjL0DV4WUSepAUQwmR2QEkYwpxw4lVEcTmxAPHHWV rFDpFPJKW5yITYuGLRYScY+uYP9QvXdHMQ1uTneNQynwczqDG5RAHmr+iE8qimVM3z hgxpdqrE1eo0MelQxBbCnNfWrx9z8lkY8lk+mPks= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 610DD381DC60 for ; Thu, 20 Oct 2022 09:28:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 610DD381DC60 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id BAE09300089; Thu, 20 Oct 2022 09:28:32 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 11/40] cpu/frv: Initialize some variables Date: Thu, 20 Oct 2022 09:25:57 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198550557286074?= X-GMAIL-MSGID: =?utf-8?q?1747198550557286074?= GCC generates a warning if a variable may be used uninitialized on some cases ("-Wmaybe-uninitialized"). Despite that this will not cause a build failure even on the default configuration (with "--enable-werror"), it is better to be fixed. The cause of this warning, sim/frv/sem.c is generated by CGEN from cpu/frv.cpu. This commit adds initialization of some variables that caused GCC warnings. cpu/ChangeLog: * frv.cpu (cmpb): Initialize cc variable. (load-double-gr-u-semantics, clddu) Initialize address variable. --- cpu/frv.cpu | 3 +++ 1 file changed, 3 insertions(+) diff --git a/cpu/frv.cpu b/cpu/frv.cpu index cdb169eddc1..6af8c3ab347 100644 --- a/cpu/frv.cpu +++ b/cpu/frv.cpu @@ -4266,6 +4266,7 @@ "cmpb$pack $GRi,$GRj,$ICCi_1" (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj) (sequence ((QI cc)) + (set cc 0) (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000))) (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000))) (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00))) @@ -4655,6 +4656,7 @@ (define-pmacro (load-double-gr-u-semantics) (sequence ((WI address)) + (set address 0) (load-double-semantics 0 DI GR address GRj) (if (ne (index-of GRi) (index-of GRdoublek)) (sequence () @@ -5309,6 +5311,7 @@ (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj) (if (eq CCi (or cond 2)) (sequence ((WI address)) + (set address 0) (load-double-semantics 0 DI GR address GRj) (if (ne (index-of GRi) (index-of GRdoublek)) (set GRi address)))) From patchwork Thu Oct 20 09:25:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6088 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp154865wrs; Thu, 20 Oct 2022 02:32:32 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4MsaR3Be7W/Y2jqIP+AnR1gWPzhHcLvGGPW4Su5+bvV20pE2Op53JPWsOhWv35mPSobvG7 X-Received: by 2002:a17:907:e93:b0:78d:46b3:3a76 with SMTP id ho19-20020a1709070e9300b0078d46b33a76mr10008689ejc.133.1666258352816; Thu, 20 Oct 2022 02:32:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258352; cv=none; d=google.com; s=arc-20160816; b=Y1mIfc1Jxtin4O05fVlRhkkK6Z2BF/8c/cxCuNmcIM9n32qz9m0+S77NAWC7iUZl58 lHg0BauCwr/ZvMEGwhFyfgxrYLnRrjGIgsuVbR32f7cLLDsakJa0v+PSJv/D1wdeyQx4 yrArhPkEY8BIR7cc3aVLUiEU9GlCD+aPujZffMchUKp6GSlizoft2/Wiqmuczym+cKv6 zwXk0Qy1StamiwsPWU6NTWN5/5nA4kKKdvHEvXoLvrBWzpvN8Vpd3ElaIWY/+FO39CMt NMSXjNZkez0+Z+sboBrlGvp/75w5I/TbQGBVGuUCDI8IUV1o1s2mXlscWIxZRUxc/gdz zi5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=6MbyPSDWyccNdQGOpn8PqXl6YuGySOgOqdD4aX9G714=; b=Cfr6N+o0cHh2faN+Qo4+V9GFwRw8Fbv3OIPw/P7UilQL2KyOARxTYA/QGWxvje2ekE 8vOiuhQ2s7sCkoscSu0UvygRHOR8RzFC2+5Bk7k6wj9rwTFbt/G7jk3MwY9Ja7cX0tRn BxrZtZTW/lpuPC5fAoIdM06svdcu0IqF4zlruglTYKHk8E6uIznFEw/rJduMDXcDe0dh KkNlDxYMZcl4Sl3eDL8wXJrQJ54nJjnSFEyFGtDQ7mdJGERh1G0J+8VuC5T7t8Gbm4oq Zzv2bz7ickNLspOpB7yvul9SjQ584BYADqa/VOdeWOiHl72M2eJzUxdSWh7tDp1T7Sg1 NP5Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=pCy3wlZV; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id v4-20020a056402348400b0045cfb639ff2si17404220edc.506.2022.10.20.02.32.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:32:32 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=pCy3wlZV; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5D1A73821FD3 for ; Thu, 20 Oct 2022 09:29:27 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5D1A73821FD3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258167; bh=6MbyPSDWyccNdQGOpn8PqXl6YuGySOgOqdD4aX9G714=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=pCy3wlZVWmD0+lXSTPG0e5N8Q4GV4v7IYuhHYKR4MgG8nDH52JIL6bTgvWknRRrll +9Des5NVyQ2G1WpGb30MTbR69KjdSiJFVd/zcaI/dm8IvLMoRcogT86dq4hObREAr5 7nTrXV53l0rkUB48eV1waV2lfxTleIDwQuCvgnjo= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id E2DE538983A5 for ; Thu, 20 Oct 2022 09:28:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E2DE538983A5 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 43C0F300089; Thu, 20 Oct 2022 09:28:43 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 12/40] sim/frv: Initialize nesr variable Date: Thu, 20 Oct 2022 09:25:58 +0000 Message-Id: <021dbd238af5dfe74523ed229d2156a155a6bb9e.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198518431820144?= X-GMAIL-MSGID: =?utf-8?q?1747198518431820144?= GCC generates a warning if a variable may be used uninitialized on some cases ("-Wmaybe-uninitialized"). Despite that GCC will not cause a build failure even when "--enable-werror" is specified, it would be nice to get rid of it. This commit initializes the variable nesr when declared. --- sim/frv/traps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sim/frv/traps.c b/sim/frv/traps.c index 0c9eacd0bfd..b142c7890ad 100644 --- a/sim/frv/traps.c +++ b/sim/frv/traps.c @@ -432,7 +432,7 @@ frvbf_check_non_excepting_load ( int do_elos; SI NE_flags[2]; SI NE_base; - SI nesr; + SI nesr = 0; SI ne_index; FRV_REGISTER_CONTROL *control; From patchwork Thu Oct 20 09:25:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6093 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp156135wrs; Thu, 20 Oct 2022 02:35:29 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7ktj1lLSden4yEgIFlbkmeZeeSyoNJjBi6DG/nFWR6TCADNrLcW1lyqoUSDcN0tMNJncfs X-Received: by 2002:a17:907:9618:b0:78d:fa75:e2b8 with SMTP id gb24-20020a170907961800b0078dfa75e2b8mr10204434ejc.65.1666258529426; Thu, 20 Oct 2022 02:35:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258529; cv=none; d=google.com; s=arc-20160816; b=iEeEr0oktg5DKxjw7ogaoM0AEyJZPCN+zGx/8d3O3Q82XYx8ZUHwlg0LSyUtX7tjnB jvVIENgjZF5K0rMpryozNsL21nQwniNaaTkUK2EYMjRxak7n+auslAtdLmOTwusV2gHb sbWg4TN8K1uypCTMHsyAGFkeqv8nCK1Rj3gIdERI/YoFSzJwn5jfDmXM0wAx/mn8BidR PMPqk6L808f4r+yJMyuFOglyWxbq0x2MI8GaSTfbqGs/HBYFAJHu2xeDr4HA1410gqJd jZaCI+Ml+gEdX1VSSpUrexmUjLgjD0RY8U6jIvrXQUKECFFnsvUm6Llpq2c3Jbfb5Pzn 5t0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=MGjjAtofhE6Ai2oDjLokUBs2cW0GuvduJsSG0JqLG4I=; b=xYkwoqh5ajIXVASl78gMcc2PxGeytg+fGZvkMUiFeaR4jt+BRzSmMdB9PEmdxTtGeQ QFZWBPXdYnz1EFHIfsUZfDYHbuT8f8WZ57+gg8fX+/QGS4sJ2vs0tTMgBud4KGn1xyOh UkVVPZGtND9bPN6286fHo2g4nVjx/QXydAA59CjsVK6eqmJAL+pPoaEbiXlSd6i06oEl FHeQvLFvlMjJRC+pYwPIOUzJU5j/5Z9yxl0qlxINJkvUfTrKrsh+cHTe4MRrObSagBH8 CtaeNPzc22THYSGX6+J5+cWd+o+TxIASjXskvhsiXkp6AAbJqWstHbQUEuKTBL7hf/xA gsXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b="nsdyV/kJ"; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id b13-20020a056402350d00b0045d4015cdaesi15569257edd.372.2022.10.20.02.35.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:35:29 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b="nsdyV/kJ"; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 406DB395A433 for ; Thu, 20 Oct 2022 09:30:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 406DB395A433 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258242; bh=MGjjAtofhE6Ai2oDjLokUBs2cW0GuvduJsSG0JqLG4I=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=nsdyV/kJ/TEPFq2IVyXHiCrXkUR4OxAssdMIxo182zXRT9LpUCKwyVASLc12dsS5d BcWCY5BQiXKpHq+LETDqNl45dYVGWgl8BOK51RtCtTWM1sd1fp5fz8DTfuZl/Ad8Qw vquKclTfAta9jzuk9GDqd1lT+xxcriUv6UJ7qdg0= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 6625538A8145 for ; Thu, 20 Oct 2022 09:28:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6625538A8145 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id BDC4E300089; Thu, 20 Oct 2022 09:28:53 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 13/40] sim/frv: Initialize some variables Date: Thu, 20 Oct 2022 09:25:59 +0000 Message-Id: <51a03f7097921cc48954210cf99e370ae8982ec8.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198703883819144?= X-GMAIL-MSGID: =?utf-8?q?1747198703883819144?= This commit is strongly related to "cpu/frv: Initialize some variables" and applies corresponding changes to sim/frv/sem.c. Note: This commit touches CGEN-generated files directly. Modifying cpu/frv.cpu (which is done) and regenerating with CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN to resolve. --- sim/frv/sem.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sim/frv/sem.c b/sim/frv/sem.c index cc7cbeee318..28610f4eac7 100644 --- a/sim/frv/sem.c +++ b/sim/frv/sem.c @@ -3054,6 +3054,7 @@ SEM_FN_NAME (frvbf,cmpb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { QI tmp_cc; + tmp_cc = 0; if (EQBI (EQSI (ANDSI (GET_H_GR (FLD (f_GRi)), 0xff000000), ANDSI (GET_H_GR (FLD (f_GRj)), 0xff000000)), 0)) { tmp_cc = ANDQI (tmp_cc, 7); } else { @@ -4545,6 +4546,7 @@ SEM_FN_NAME (frvbf,lddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { SI tmp_address; + tmp_address = 0; if (NESI (FLD (f_GRk), 0)) { { tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); @@ -4591,6 +4593,7 @@ SEM_FN_NAME (frvbf,nlddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (tmp_do_op) { { SI tmp_address; + tmp_address = 0; if (NESI (FLD (f_GRk), 0)) { { tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); @@ -6706,6 +6709,7 @@ SEM_FN_NAME (frvbf,clddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { SI tmp_address; + tmp_address = 0; if (NESI (FLD (f_GRk), 0)) { { tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); From patchwork Thu Oct 20 09:26:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6092 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp155894wrs; Thu, 20 Oct 2022 02:34:54 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4h1FHcTXLbB+xPD1oJ5Cre7ZQabBYshugkeLFSy294xlmXUrs/uVl39IukjC+yXud9Zru5 X-Received: by 2002:a05:6402:2489:b0:454:11de:7698 with SMTP id q9-20020a056402248900b0045411de7698mr11610361eda.214.1666258494572; Thu, 20 Oct 2022 02:34:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258494; cv=none; d=google.com; s=arc-20160816; b=jZwJrDaOAnARbCAjjQaiFb3MPep9I6aJqR15+Ah6CHlX96bsWHqxp6493hro9AzRMx mXFDrPF57pyne7JTh9PCoyBru7/KKLvdDGKEawM15Wz8MSIm2Gy0ZvUAuYEH+ARDcxLo bPM+ufxPWwCOceHz2xYkzKpxIE+KTY+W3OdCDGUlQ9s8e8qB4AIxEFzvJNmgqwM0RlOm MvSeDGE45E6VRtCvMOi1KHlgu1lJ5aY5pLZQg8Au1ixwuFkrjocEr6A9+Inm6fe8Ba1U ynI3NKHKbkumsBt0pCZzNQKUtaq00lML3gELr+I9fsEsvTNy/mtUL5vTYr2thFngJE23 822A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=+O/2Nf3yFN+IfPKXi+OoTC8HAxlnanxuy/DRnN1lGKA=; b=iIyzSITYAPE8Ix80XsxnvT1Zuld9lXd7OkssYpYd7IEgbt4MmLsHo4QuNPQpIScPRR CTCnTqxXYQ7hZhWqQyaJOBPJk4X6Z2dS1rRmWzJXCwe09wbYED2L3UxysaDBS8UmHrIp pfzEJjXjHlwL3UN+zLnJS+e8bATv02b2f1aSEXm5aMH3cevWnPk9vh+vxPyu98CTfuK4 2xl0mTxW+ebE3c4x9aYkEwreznOXNzJmU2BCAIKWrABOW0hn59XrgGGscrDD0Hxgu7Ca RGEzoht/fTqwT97doYVoxNXlEbWIKK4imygcgvKaAieGlAv/r7UqipHjHB4HDbrTqy9D sM1A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=ZvkJRAQ7; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id t4-20020a056402020400b00458b42ff246si14369255edv.236.2022.10.20.02.34.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:34:54 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=ZvkJRAQ7; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9DEFA384BC3C for ; Thu, 20 Oct 2022 09:30:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9DEFA384BC3C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258228; bh=+O/2Nf3yFN+IfPKXi+OoTC8HAxlnanxuy/DRnN1lGKA=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=ZvkJRAQ7F0B2ZxNFw0tyfQONXAR2e7pVB+RWRQ9qDRSzjR2lO9Qhfdj94JWAg3vyq wrtetWPvpQXTxbseJ1eHqRNxn3Gx5P+c2RHZdKDZ1MC5yMqCF/54FUV9Kg6MjFDsdk K7BpFdazmdgLZKlhdm6E/wq5dxjh+7imBAZgcmiU= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id E0FB33839DD8 for ; Thu, 20 Oct 2022 09:29:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E0FB33839DD8 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 41F4F300089; Thu, 20 Oct 2022 09:29:04 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 14/40] sim/frv: Add explicit casts Date: Thu, 20 Oct 2022 09:26:00 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198667501341219?= X-GMAIL-MSGID: =?utf-8?q?1747198667501341219?= Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds explicit casts on the FR-V instruction decoder. Note: This commit touches CGEN-generated files directly. Modifying CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN to resolve. --- sim/frv/decode.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/sim/frv/decode.c b/sim/frv/decode.c index 307b593e148..9c4a97833ad 100644 --- a/sim/frv/decode.c +++ b/sim/frv/decode.c @@ -39,12 +39,12 @@ static IDESC frvbf_insn_data[FRVBF_INSN__MAX]; static const struct insn_sem frvbf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY }, { FRV_INSN_ADD, FRVBF_INSN_ADD, FRVBF_SFMT_ADD }, { FRV_INSN_SUB, FRVBF_INSN_SUB, FRVBF_SFMT_ADD }, { FRV_INSN_AND, FRVBF_INSN_AND, FRVBF_SFMT_ADD }, @@ -792,7 +792,7 @@ static const struct insn_sem frvbf_insn_sem[] = static const struct insn_sem frvbf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ From patchwork Thu Oct 20 09:26:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6095 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4f06:0:0:0:0:0 with SMTP id c6csp175112wru; Thu, 20 Oct 2022 02:36:50 -0700 (PDT) X-Google-Smtp-Source: AMsMyM42d85L5XoncZD4uPotB1wFJuvHXpt0kHWjqHqZGQep9KZZr/GEYT3UdfNxOH9t56f+HcMP X-Received: by 2002:a05:6402:3487:b0:45d:2674:d187 with SMTP id v7-20020a056402348700b0045d2674d187mr11380748edc.386.1666258610495; Thu, 20 Oct 2022 02:36:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258610; cv=none; d=google.com; s=arc-20160816; b=txdlolwrHaSNc0DPjtkb1CDQp2/QwZkJBryuZPY8R5GRrYtBYs7EvAYtyK2DNvTTb0 QD4/0oDc3wI3kQgVoqubgv/wohmR30AYe+seCO1AcStl+pem3BKKNv5ecRt+9ctVDpnx qkaskbAsB1wKuuXRobP65Tftrds6fICszvfbp+P1ZQYM8KAQLLIWqvqgflJqLzjnrs+v SxQv3mA2Q2mtL+rYt5lbLHAwRm2PVzNi/r6hZsbLMNQ4uVZAgdGgEeijJtKBiMOUJz6Y PvITJTY3rDtyjqebO1HddM3CKgXTstcIxyjh+c74bNqv4ZabAWZx1bkJ1WigiVMOi53n rYkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=cqjVfRw22ZK50iTwDmJFzzfAC5M71DRek8GtIBTQibQ=; b=0m7lbu/TZsGt+WlDTjS/6tXoTBbEA6N/NHs9P3UWkfRB3VQIHn4Ql+vb2dv/pS6tWf VKmGf6rVS++fQrVwrkF0ObPN4vA2R+Bw6rioKkA7H4QF7MfGk3/eNVtXoPzKMARMLg+h eFqoNB4wNjl3ohf/l+uRqGZRw/PjtBWpGWv7d18Nl6M9IoAxcVdDr0/9El8NAS7iJpyk w60qJ74vUcTWCkqD+SSKGSrSugD3xX48DvMTgV+OlZYNW8dewMwesiPBrHD+Xa0/iM7t VKYDH3KhaQeMXVSVB4I7QmzuA0ghpNod7QLPJ3DbwacdRN4heykUG81FQVTf4tZZJjkV 8/0A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=tb0yX1pV; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id u2-20020a50eac2000000b004513a465ec6si15201992edp.94.2022.10.20.02.36.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:36:50 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=tb0yX1pV; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C3822395C078 for ; Thu, 20 Oct 2022 09:31:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C3822395C078 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258275; bh=cqjVfRw22ZK50iTwDmJFzzfAC5M71DRek8GtIBTQibQ=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=tb0yX1pV6UkXGyOeVOG3fFy1xj6z1Op60P2hOtU309GC8a53wG2zGYFgpB19QS284 +Egqo7dfeUZr0NHEwrj6Jf6amMYlouhd6qt2AZeHHWvhtb4MBtuMGX4ul4kK+e33mf l+llmKZaId/bU2m9hLXfSnzKxp+609j7t6w/9XQM= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 6F065384F021 for ; Thu, 20 Oct 2022 09:29:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6F065384F021 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id C1382300089; Thu, 20 Oct 2022 09:29:14 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments Date: Thu, 20 Oct 2022 09:26:01 +0000 Message-Id: <5ab303a5bdfc1da7832f8fa22f57678c9ef1a5fa.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198788818442644?= X-GMAIL-MSGID: =?utf-8?q?1747198788818442644?= Clang generates a warning if there is a redundant self-assignment ("-Wself-assign"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). However, removing self-assignments in step_once function makes the code less readable. Instead, this commit inserts dummy addition to match the comments "Value added == 0". This is redundant but will suppress warnings and matches with other branches better. It will be also optimized away so we can ignore performance impact on this. --- sim/h8300/compile.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index 9be7dd565a9..f7d8d590b69 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -4141,7 +4141,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu) res = GET_B_REG (code->src.reg); /* FIXME fetch? */ if (!c && (0 <= (res >> 4) && (res >> 4) <= 9) && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9)) - res = res; /* Value added == 0. */ + res = res + 0x0; /* Value added == 0. */ else if (!c && (0 <= (res >> 4) && (res >> 4) <= 8) && !h && (10 <= (res & 0xf) && (res & 0xf) <= 15)) res = res + 0x6; /* Value added == 6. */ @@ -4174,7 +4174,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu) res = GET_B_REG (code->src.reg); /* FIXME fetch, fetch2... */ if (!c && (0 <= (res >> 4) && (res >> 4) <= 9) && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9)) - res = res; /* Value added == 0. */ + res = res + 0x0; /* Value added == 0. */ else if (!c && (0 <= (res >> 4) && (res >> 4) <= 8) && h && (6 <= (res & 0xf) && (res & 0xf) <= 15)) res = res + 0xfa; /* Value added == 0xfa. */ From patchwork Thu Oct 20 09:26:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6101 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4242:0:0:0:0:0 with SMTP id s2csp120wrr; Thu, 20 Oct 2022 02:39:33 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4yYpEshOO3VDR/VS2rb3E7UPknElorLe3A1GeP15xjgVJ5fv9TkytVs0hR2mcalHENrFwS X-Received: by 2002:aa7:de10:0:b0:458:e101:fe54 with SMTP id h16-20020aa7de10000000b00458e101fe54mr11173795edv.80.1666258772809; Thu, 20 Oct 2022 02:39:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258772; cv=none; d=google.com; s=arc-20160816; b=IGwB+XQ78nhOjrk2rdm9IgeWuDsDde3FhjonvvYRYsq1w++o8eQ6uXOW966YyZkl2D pB6wc+eqSzpRxiR9osFt/HhGIHeUUGLqsxKAX9sjWEvltXTsOhNlL2hECOURpVhtqVF2 aMCVZT05zVgQaZOASJQKn7T4jiBH0P1qu2pg/lTa5cxK0tsGTN+pTCQb/ql6pyvnGSUt aQ7scSzuGjFQSMMcAoWwfRtQy8Wln5g+HajqhTsSnSXRsZtAf5wXyZ6DGvn5w142F4mL 8uIqFbMSqVhN0rQhtw/Ztb9VM4wacwpGcFQK8ACz/jOdlsXabX1ZW5fdc17mMtJDLJXa UXhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=49IUbsfcxVS5X7UmOx7WcoTHJppV20TW+OE+Os7D8Fk=; b=L0oHtQRB8bIKO/KPCpU3CaqXC8d21ViAOEl/zni5Tkms05L5NbCv7uDDU8bVya/Qmt YvXKuGCl7Yd6ChOVUebRJlp7kQCRZnVks/Z5gUs7ra/VVH1bQDb6m7nKWdXHskp9QauX 14kzJHU8c1ZuL6DN/MH5QtGZKR0sza7y9jUrUO3oK5wN+1N+jHrVwd96VIK4EO9wWVDK UPphQq+OmLfcaPebtVl9yk5gBCmHmwBpvtGXmV58mb3daYAOAfUVALBT7mZq7f5obY6F c/6YGw1MuD6Z9NNAtIKgVAN2tWvjoMucL6CqjM/gTIJcO9iJG5rXN/nW1UoMS1ts+Zqe UKoQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=iu5AtDYC; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id wv2-20020a170907080200b0078dc3cb8b48si18504124ejb.625.2022.10.20.02.39.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:39:32 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=iu5AtDYC; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 75B5D385086F for ; Thu, 20 Oct 2022 09:32:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 75B5D385086F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258364; bh=49IUbsfcxVS5X7UmOx7WcoTHJppV20TW+OE+Os7D8Fk=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=iu5AtDYCUBTCNMWzkr4cH3PaSGfzh10z5k1WM6ttExD7ENOD+lAFiazwzOGj3135f gJ6BuotzGNg2JUcyNd6ZrpdMEWF8zk6YRSTgIUf0uRDwqbG83R65NJBUQjOhXuXkxu EZE/X530spKUMGH5LhOeDfNyt3PZPU5bQWEF6Cu0= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id E69AA3885C19 for ; Thu, 20 Oct 2022 09:29:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E69AA3885C19 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 4865E300089; Thu, 20 Oct 2022 09:29:25 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 16/40] sim/lm32: fix some missing function declaration warnings Date: Thu, 20 Oct 2022 09:26:02 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198958746701766?= X-GMAIL-MSGID: =?utf-8?q?1747198958746701766?= From: Andrew Burgess In the lm32 simulator, I was seeing some warnings about missing function declarations. The lm32 simulator has a weird header structure, in order to pull in the full cpu.h header we need to define WANT_CPU_LM32BF. This is done in some files, but not in others. Critically, it's not done in some files that then use functions declared in cpu.h In this commit I added the missing #define so that the full cpu.h can be included. After doing this there are still a few functions that are used undeclared, these functions appear to be missing any declarations at all, so I've added some to cpu.h. With this done all the warnings when compiling lm32 are resolved for both gcc and clang, so I've removed the SIM_WERROR_CFLAGS line from Makefile.in, this allows lm32 to build with -Werror. --- sim/lm32/Makefile.in | 3 --- sim/lm32/cpu.h | 11 +++++++++++ sim/lm32/dv-lm32cpu.c | 3 +++ sim/lm32/user.c | 3 +++ 4 files changed, 17 insertions(+), 3 deletions(-) diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in index d827b711d45..db15bef47a7 100644 --- a/sim/lm32/Makefile.in +++ b/sim/lm32/Makefile.in @@ -24,9 +24,6 @@ SIM_EXTRA_DEPS = $(CGEN_INCLUDE_DEPS) $(srcdir)/../../opcodes/lm32-desc.h \ SIM_EXTRA_CLEAN = lm32-clean -# Some modules don't build cleanly yet. -dv-lm32cpu.o mloop.o sem.o traps.o user.o: SIM_WERROR_CFLAGS = - ## COMMON_POST_CONFIG_FRAG arch = lm32 diff --git a/sim/lm32/cpu.h b/sim/lm32/cpu.h index 05b98be8cf1..d025065f2ba 100644 --- a/sim/lm32/cpu.h +++ b/sim/lm32/cpu.h @@ -163,6 +163,17 @@ struct scache { struct argbuf argbuf; }; +/* From traps.c. */ +extern USI lm32bf_b_insn (SIM_CPU * current_cpu, USI r0, USI f_r0); +extern USI lm32bf_divu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2); +extern USI lm32bf_modu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2); +extern void lm32bf_wcsr_insn (SIM_CPU * current_cpu, USI f_csr, USI r1); +extern USI lm32bf_break_insn (SIM_CPU * current_cpu, IADDR pc); +extern USI lm32bf_scall_insn (SIM_CPU * current_cpu, IADDR pc); + +/* From user.c. */ +extern UINT lm32bf_user_insn (SIM_CPU * current_cpu, INT r0, INT r1, UINT imm); + /* Macros to simplify extraction, reading and semantic code. These define and assign the local vars that contain the insn's fields. */ diff --git a/sim/lm32/dv-lm32cpu.c b/sim/lm32/dv-lm32cpu.c index b97580e80a3..15a08eee815 100644 --- a/sim/lm32/dv-lm32cpu.c +++ b/sim/lm32/dv-lm32cpu.c @@ -18,6 +18,9 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ +#define WANT_CPU lm32bf +#define WANT_CPU_LM32BF + /* This must come before any other includes. */ #include "defs.h" diff --git a/sim/lm32/user.c b/sim/lm32/user.c index 3cc21a208ee..d301d482c1b 100644 --- a/sim/lm32/user.c +++ b/sim/lm32/user.c @@ -21,6 +21,9 @@ /* This must come before any other includes. */ #include "defs.h" +#define WANT_CPU lm32bf +#define WANT_CPU_LM32BF + #include "sim-main.h" /* Handle user defined instructions. */ From patchwork Thu Oct 20 09:26:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 6094 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4f06:0:0:0:0:0 with SMTP id c6csp175050wru; Thu, 20 Oct 2022 02:36:39 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7jvqS4z39+je26lbxqv1uJ1oJSWFaxf2ru0X9ELdLgJSRdqV6TOh5LlQ0NRUGBjdxBiCh8 X-Received: by 2002:a50:cc07:0:b0:453:4427:a918 with SMTP id m7-20020a50cc07000000b004534427a918mr11349218edi.121.1666258599074; Thu, 20 Oct 2022 02:36:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666258599; cv=none; d=google.com; s=arc-20160816; b=Qgg/RVsZY1zJGkpta9yO3/a6RWUBPkitwjXzggpl+GQfSLKh46H7Enec3ZHscHfI/P 9FFZFqf/AmiiUVGg9QvSdMTvqThdrhlM1lfM6O3CC3xtB1Qv+IxYQGE1HVN6UCIClnGB GQXpHaXeDW298u0C5xXSKqPE/NJV2esVc2gtBwjJtnVzHnXQM83Ai+fiI0ZKIrqUp6e0 EJV2smCGEzjPmjOL6oSRJZgQsCpMRlNWl0dXhEmuMmcrw8s/PJw/1AmP25cDSui3IX+4 E2PXQlIUtGBohtXciR50PZVw8xmhYrbTBc+3iEpBiZR6X0GZgg8EdTbRM/LkQoNnNdMy o+7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:reply-to:from:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:dmarc-filter:delivered-to:dkim-signature :dkim-filter; bh=QWdii4iUfSav0OGT3OIIl+amP8T5LgLr7ez/z5okIAE=; b=FRgHDS/bAHLYqWS+sEpIcjcgaRwZbhJWnKqFLXIi5DcWB1Vm5X2RtGm9fA7GTALAde PViMq0xK2tRUWRAgzJJyzJT3A4eqWHLOq5zfafRwjHDKoRoImrG0J5xxnB4hQDlT2s6m LSD7cz8ORW61R1qzZIHExrwxe0H5Jf1vqNGyNlm3f+SFEGvYjK0F875atwR4bBblFi9X NVLBEhZpc1bYIxNn0XB5cCA+UBAT5sGINMoy2mnCispIPwmXQwK0hvdK508iiUGCkA4k 9ida+halPrgavj3CtM5bbpz9RP/S1OQHVqUV0xJlMpXKX7+ed9UdGTrt7YmjuVD2wqwy Q+5Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=AvZicX+P; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id ae8-20020a17090725c800b0078dce38525asi17414743ejc.896.2022.10.20.02.36.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 02:36:39 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=AvZicX+P; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8A413389901D for ; Thu, 20 Oct 2022 09:31:10 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8A413389901D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258270; bh=QWdii4iUfSav0OGT3OIIl+amP8T5LgLr7ez/z5okIAE=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=AvZicX+PGgQlnqk5e06zT1T9Ok71v+uygxSsu2K/HAzhasHWSh//4g6c9ADO9JaNA b2HxmToh1BHe6nxSeY9oorA97ya+5MW2MDYg0fzqMX743FKLMAYL68nbb8/xKLh8Cv 9+zcJTySk44sUE4XL8biPGu5qwZBIIdY4Z+Adthg= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 6BC40384D183 for ; Thu, 20 Oct 2022 09:29:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6BC40384D183 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id C21DB300089; Thu, 20 Oct 2022 09:29:35 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 17/40] sim/lm32: Add explicit casts Date: Thu, 20 Oct 2022 09:26:03 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747198777140728284?= X-GMAIL-MSGID: =?utf-8?q?1747198777140728284?= Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds explicit casts on the LatticeMico32 instruction decoder. Note: This commit touches CGEN-generated files directly. Modifying CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN or sim/lm32 to resolve. --- sim/lm32/decode.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/sim/lm32/decode.c b/sim/lm32/decode.c index 9faef289132..889a0de9026 100644 --- a/sim/lm32/decode.c +++ b/sim/lm32/decode.c @@ -39,12 +39,12 @@ static IDESC lm32bf_insn_data[LM32BF_INSN__MAX]; static const struct insn_sem lm32bf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, LM32BF_INSN_X_AFTER, LM32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, LM32BF_INSN_X_BEFORE, LM32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, LM32BF_INSN_X_CTI_CHAIN, LM32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, LM32BF_INSN_X_CHAIN, LM32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, LM32BF_INSN_X_BEGIN, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, LM32BF_INSN_X_AFTER, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, LM32BF_INSN_X_BEFORE, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, LM32BF_INSN_X_CTI_CHAIN, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, LM32BF_INSN_X_CHAIN, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, LM32BF_INSN_X_BEGIN, LM32BF_SFMT_EMPTY }, { LM32_INSN_ADD, LM32BF_INSN_ADD, LM32BF_SFMT_ADD }, { LM32_INSN_ADDI, LM32BF_INSN_ADDI, LM32BF_SFMT_ADDI }, { LM32_INSN_AND, LM32BF_INSN_AND, LM32BF_SFMT_ADD }, @@ -111,7 +111,7 @@ static const struct insn_sem lm32bf_insn_sem[] = static const struct insn_sem lm32bf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */