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Thu, 20 Oct 2022 05:13:23 -0400 (EDT) From: maxime@cerno.tech Date: Thu, 20 Oct 2022 11:12:09 +0200 Subject: [PATCH v4 1/7] firmware: raspberrypi: Introduce rpi_firmware_find_node() MIME-Version: 1.0 Message-Id: <20220815-rpi-fix-4k-60-v4-1-a1b40526df3e@cerno.tech> References: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> In-Reply-To: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> To: Daniel Vetter , Emma Anholt , Michael Turquette , Stephen Boyd , Maxime Ripard , Ray Jui , Florian Fainelli , David Airlie , Broadcom internal kernel review list , Scott Branden Cc: Stefan Wahren , Maxime Ripard , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Dom Cobley , linux-rpi-kernel@lists.infradead.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2789; i=maxime@cerno.tech; h=from:subject:message-id; bh=ZSj0VJea8u0i5Q2vnxlThNbrs4wjN9dVZ0f3te/Rd5I=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmBAq+MFpf7CN4Re2fZKMV1zP6CXfbXmi+TzN69f/fj5y8J 9aO/O0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjARozqGn4wM6e9rtf213r9Z5iGVIf p/sq7Fhge+Cxap88xLmtn1wpzhf6T/7i3ehmcf+TGt1OkU2VyWFLXaIF6Q54y0W/KXRXNaGAE= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747197657614534441?= X-GMAIL-MSGID: =?utf-8?q?1747197657614534441?= A significant number of RaspberryPi drivers using the firmware don't have a phandle to it, so end up scanning the device tree to find a node with the firmware compatible. That code is duplicated everywhere, so let's introduce a helper instead. Signed-off-by: Maxime Ripard Acked-by: Florian Fainelli --- drivers/firmware/raspberrypi.c | 18 ++++++++++++------ include/soc/bcm2835/raspberrypi-firmware.h | 7 +++++++ 2 files changed, 19 insertions(+), 6 deletions(-) diff --git a/drivers/firmware/raspberrypi.c b/drivers/firmware/raspberrypi.c index 4b8978b254f9..932a8bef22fb 100644 --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c @@ -311,6 +311,18 @@ static int rpi_firmware_remove(struct platform_device *pdev) return 0; } +static const struct of_device_id rpi_firmware_of_match[] = { + { .compatible = "raspberrypi,bcm2835-firmware", }, + {}, +}; +MODULE_DEVICE_TABLE(of, rpi_firmware_of_match); + +struct device_node *rpi_firmware_find_node(void) +{ + return of_find_matching_node(NULL, rpi_firmware_of_match); +} +EXPORT_SYMBOL_GPL(rpi_firmware_find_node); + /** * rpi_firmware_get - Get pointer to rpi_firmware structure. * @firmware_node: Pointer to the firmware Device Tree node. @@ -366,12 +378,6 @@ struct rpi_firmware *devm_rpi_firmware_get(struct device *dev, } EXPORT_SYMBOL_GPL(devm_rpi_firmware_get); -static const struct of_device_id rpi_firmware_of_match[] = { - { .compatible = "raspberrypi,bcm2835-firmware", }, - {}, -}; -MODULE_DEVICE_TABLE(of, rpi_firmware_of_match); - static struct platform_driver rpi_firmware_driver = { .driver = { .name = "raspberrypi-firmware", diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h index 811ea668c4a1..63426082bcb9 100644 --- a/include/soc/bcm2835/raspberrypi-firmware.h +++ b/include/soc/bcm2835/raspberrypi-firmware.h @@ -142,6 +142,7 @@ int rpi_firmware_property(struct rpi_firmware *fw, int rpi_firmware_property_list(struct rpi_firmware *fw, void *data, size_t tag_size); void rpi_firmware_put(struct rpi_firmware *fw); +struct device_node *rpi_firmware_find_node(void); struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node); struct rpi_firmware *devm_rpi_firmware_get(struct device *dev, struct device_node *firmware_node); @@ -159,6 +160,12 @@ static inline int rpi_firmware_property_list(struct rpi_firmware *fw, } static inline void rpi_firmware_put(struct rpi_firmware *fw) { } + +static inline struct device_node *rpi_firmware_find_node(void) +{ + return NULL; +} + static inline struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node) { return NULL; From patchwork Thu Oct 20 09:12:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 6071 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp150438wrs; Thu, 20 Oct 2022 02:19:08 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6M8mbLMkqYSMm77lHcbVRg/CNM5JVbQuZEUfh+zEdvR876HRrsU6+PfoOpwdIv9snFTk+b X-Received: by 2002:a17:902:6a86:b0:176:a6bc:54c0 with SMTP id n6-20020a1709026a8600b00176a6bc54c0mr13146034plk.87.1666257548565; Thu, 20 Oct 2022 02:19:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666257548; cv=none; d=google.com; s=arc-20160816; b=ueOdhFdnNx7m+U0D/EnPf6FITWVecHLntsAdd1OPM/6BmZV8gCtUKh/RwXsco2DF4j 1ukYGcb7Lr2HrB7Os2TLdrvGMD1Aii4RPo9Kt149kJhuNk4SGchhPqr6BburAhIW4tPD CLHdWhB53RCl+SxfJby//RngiPmTyuciKY2XEQqvqIlotG1NPbeGhp/hqItbMkrwxpVd x763g4eP+R+qhFCsXKkWv9Ri5zCnf/pEhXjG/97bof1vdCHN3vm/2j1RUXtfDCSQmW6G gnhjrZpeLuflhuDO6PZizEdXCRac1WDm1bFrt9P1FKr+EyUIjGNDGFLkdybBe+eUUhOy DUAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=Sk4BFebag+VOrDKszwVl8BLZy6XUc1sTCb5w0z0P9Kk=; b=Vy5ksIO32oL3E/uisdLPOCAou42h8o2O/2NhmIGboFL9r1CYP+lJukihVNiM9Z2l+v U/2S0YdVz+JtohZWMJCK2w1Iit+kHGQ/58Que1Qt8Osx2K3FzPaRqCOyhYZ9RJ0T9Kj7 Rd63ceACd0FypEt69wso+c/ZbxwqAovJBWNT8M5bpAR/YsHTf1kFTKhkIUfsUa/Ro0MW n6QXWlJNekFFfSGxBr9TRvv36I6E1U7ywREkONgBaY8FIKv+aDyy2kCvIgGUwkefWC4D pait1eVes57b1JNkifR9deGWG4xGQTFo6H4cKaFtoO6oL9T0G5YHWcnDfIFmqdZ8PuRB ViIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@cerno.tech header.s=fm3 header.b=hHn1Iw9V; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=CwGp57QQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=cerno.tech Received: from out1.vger.email (out1.vger.email. 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Thu, 20 Oct 2022 05:13:28 -0400 (EDT) From: maxime@cerno.tech Date: Thu, 20 Oct 2022 11:12:10 +0200 Subject: [PATCH v4 2/7] firmware: raspberrypi: Move the clock IDs to the firmware header MIME-Version: 1.0 Message-Id: <20220815-rpi-fix-4k-60-v4-2-a1b40526df3e@cerno.tech> References: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> In-Reply-To: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> To: Daniel Vetter , Emma Anholt , Michael Turquette , Stephen Boyd , Maxime Ripard , Ray Jui , Florian Fainelli , David Airlie , Broadcom internal kernel review list , Scott Branden Cc: Stefan Wahren , Maxime Ripard , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Dom Cobley , linux-rpi-kernel@lists.infradead.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2427; i=maxime@cerno.tech; h=from:subject:message-id; bh=vQwC10pcDMgH3Z7jjy/OWWSa/J/Ej9oSOOOeog/wkXk=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmBAq+0dydstwg5tbeuM0JC5LqA3bZTzlP2HigTkFv9kO98 t+PWjlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAEzEfT8jw67NRSdfM88q27fhy5tzax hMHs75FG6nvZn9wto4W7+9x20YGe79LXr/cPtk/Ws8r74ctT1lqHnn1tzWuONme7yczq37wcAIAA== X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747197675112404068?= X-GMAIL-MSGID: =?utf-8?q?1747197675112404068?= We'll need the clock IDs in more drivers than just the clock driver from now on, so let's move them in the firmware header. Reviewed-by: Florian Fainelli Acked-by: Stephen Boyd Signed-off-by: Maxime Ripard --- drivers/clk/bcm/clk-raspberrypi.c | 19 ------------------- include/soc/bcm2835/raspberrypi-firmware.h | 19 +++++++++++++++++++ 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c index 679f4649a7ef..ce2f93479736 100644 --- a/drivers/clk/bcm/clk-raspberrypi.c +++ b/drivers/clk/bcm/clk-raspberrypi.c @@ -18,25 +18,6 @@ #include -enum rpi_firmware_clk_id { - RPI_FIRMWARE_EMMC_CLK_ID = 1, - RPI_FIRMWARE_UART_CLK_ID, - RPI_FIRMWARE_ARM_CLK_ID, - RPI_FIRMWARE_CORE_CLK_ID, - RPI_FIRMWARE_V3D_CLK_ID, - RPI_FIRMWARE_H264_CLK_ID, - RPI_FIRMWARE_ISP_CLK_ID, - RPI_FIRMWARE_SDRAM_CLK_ID, - RPI_FIRMWARE_PIXEL_CLK_ID, - RPI_FIRMWARE_PWM_CLK_ID, - RPI_FIRMWARE_HEVC_CLK_ID, - RPI_FIRMWARE_EMMC2_CLK_ID, - RPI_FIRMWARE_M2MC_CLK_ID, - RPI_FIRMWARE_PIXEL_BVB_CLK_ID, - RPI_FIRMWARE_VEC_CLK_ID, - RPI_FIRMWARE_NUM_CLK_ID, -}; - static char *rpi_firmware_clk_names[] = { [RPI_FIRMWARE_EMMC_CLK_ID] = "emmc", [RPI_FIRMWARE_UART_CLK_ID] = "uart", diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h index 63426082bcb9..9b1db12d013f 100644 --- a/include/soc/bcm2835/raspberrypi-firmware.h +++ b/include/soc/bcm2835/raspberrypi-firmware.h @@ -136,6 +136,25 @@ enum rpi_firmware_property_tag { RPI_FIRMWARE_GET_DMA_CHANNELS = 0x00060001, }; +enum rpi_firmware_clk_id { + RPI_FIRMWARE_EMMC_CLK_ID = 1, + RPI_FIRMWARE_UART_CLK_ID, + RPI_FIRMWARE_ARM_CLK_ID, + RPI_FIRMWARE_CORE_CLK_ID, + RPI_FIRMWARE_V3D_CLK_ID, + RPI_FIRMWARE_H264_CLK_ID, + RPI_FIRMWARE_ISP_CLK_ID, + RPI_FIRMWARE_SDRAM_CLK_ID, + RPI_FIRMWARE_PIXEL_CLK_ID, + RPI_FIRMWARE_PWM_CLK_ID, + RPI_FIRMWARE_HEVC_CLK_ID, + RPI_FIRMWARE_EMMC2_CLK_ID, + RPI_FIRMWARE_M2MC_CLK_ID, + RPI_FIRMWARE_PIXEL_BVB_CLK_ID, + RPI_FIRMWARE_VEC_CLK_ID, + RPI_FIRMWARE_NUM_CLK_ID, +}; + #if IS_ENABLED(CONFIG_RASPBERRYPI_FIRMWARE) int rpi_firmware_property(struct rpi_firmware *fw, u32 tag, void *data, size_t len); From patchwork Thu Oct 20 09:12:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 6070 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp150393wrs; Thu, 20 Oct 2022 02:18:59 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5AB/DC1b1fOkcEzYkOl5mPtxZUB372MaQXDZ+Y16w+/xLuPSgVH3FHZ/NrUCjwYjgiiA3F X-Received: by 2002:a05:6a00:4214:b0:562:67d0:77e7 with SMTP id cd20-20020a056a00421400b0056267d077e7mr13474247pfb.62.1666257539541; Thu, 20 Oct 2022 02:18:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666257539; cv=none; d=google.com; s=arc-20160816; b=Jzh0okTqjG/NQqo6jTBpDIVB8wmKvTh7av6QlrM1O1a98CfTCOwISK9AODEG024OI6 0zNV8+vKQxSyP+I0lFugNS5C8PeocZGGwN0T+uwEGoPObiLG3o5WZpNauphFfvslhgyO nBoarcgcDFJPu/jXY3gycLByZ7mBqvxUBdLiV/yn96w94pWQMjZX468hhv0NO6YymJsY DbBZYJymD8sAPj2Pc3KeH2Phr3A8BASXdEzIPzdVbKqSwjeLnha/qH/cbYY2mBxvrGt1 kjNN3n6Jmq8MFKiPBJh/KZv1RY482kplPPkfJ+gjXme9cHhZX9fs3/irq6Gwh3KZ+Fs0 aiGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=CXd9oRopfbOxK5QPR9Spj+UXGsDItKKcc5F0wWKHw/k=; b=J9BF+qa4Vsc7t1kmjgL3Afi2/gSwGbCSneNfqTAAaZEgLy2If3girHrQyCmj8aZGN1 tkupZuTlSxnNvHYygmelW+Iw5bF3l4Xs9oyFbRR/L4Lk3jltQjhsuvnjsY9hORepiq+V wW1s3EHRpF9eFpQR1JKSRQvGtXrrXwc5kvZxnScZxFgbKvh1bdxigCPQblfvifIRQPXT NbK4hqcDq0CcUJpVeP1tso4HHHeuVkLr9slwAEh+feQxN8Rq89zqRaoj4294vhaW6po3 ai78z5qFVDP+PirO8GGRaZoYU1N9f1wXVnCHe0vuayc/XVBvlR2QPHmmSvea8jqNy23B FlIQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@cerno.tech header.s=fm3 header.b=i6UJC1IG; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=Y0NizKBv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=cerno.tech Received: from out1.vger.email (out1.vger.email. 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Thu, 20 Oct 2022 05:13:33 -0400 (EDT) From: maxime@cerno.tech Date: Thu, 20 Oct 2022 11:12:11 +0200 Subject: [PATCH v4 3/7] firmware: raspberrypi: Provide a helper to query a clock max rate MIME-Version: 1.0 Message-Id: <20220815-rpi-fix-4k-60-v4-3-a1b40526df3e@cerno.tech> References: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> In-Reply-To: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> To: Daniel Vetter , Emma Anholt , Michael Turquette , Stephen Boyd , Maxime Ripard , Ray Jui , Florian Fainelli , David Airlie , Broadcom internal kernel review list , Scott Branden Cc: Stefan Wahren , Maxime Ripard , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Dom Cobley , linux-rpi-kernel@lists.infradead.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3411; i=maxime@cerno.tech; h=from:subject:message-id; bh=c1P+fLFDaTroanhyem4W+5lau6usqj5h7iESMD9wvPc=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmBAq/2iy4PNzHUl5oysXL242N/5zbPjHNcZszZ4+pU/sM1 r/BjRykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACay4zEjw2etxqTMY95Tw4zbDz7UOb JA64rryVXxSUJSEecipm1b6c7IcHQ2Y1XpM7uHR+KZJjXtfvth1/513Cw1jZLb7M9/fmXzmBcA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747197665563298378?= X-GMAIL-MSGID: =?utf-8?q?1747197665563298378?= The firmware allows to query for its clocks the operating range of a given clock. We'll need this for some drivers (KMS, in particular) to infer the state of some configuration options, so let's create a function to do so. Acked-by: Stephen Boyd Reviewed-by: Florian Fainelli Signed-off-by: Maxime Ripard --- drivers/firmware/raspberrypi.c | 20 ++++++++++++++++++++ include/soc/bcm2835/raspberrypi-firmware.h | 26 ++++++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/drivers/firmware/raspberrypi.c b/drivers/firmware/raspberrypi.c index 932a8bef22fb..b15aa6fce0e9 100644 --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c @@ -228,6 +228,26 @@ static void rpi_register_clk_driver(struct device *dev) -1, NULL, 0); } +unsigned int rpi_firmware_clk_get_max_rate(struct rpi_firmware *fw, unsigned int id) +{ + struct rpi_firmware_clk_rate_request msg = + RPI_FIRMWARE_CLK_RATE_REQUEST(id); + int ret; + + ret = rpi_firmware_property(fw, RPI_FIRMWARE_GET_MAX_CLOCK_RATE, + &msg, sizeof(msg)); + if (ret) + /* + * If our firmware doesn't support that operation, or fails, we + * assume the maximum clock rate is absolute maximum we can + * store over our type. + */ + return UINT_MAX; + + return le32_to_cpu(msg.rate); +} +EXPORT_SYMBOL_GPL(rpi_firmware_clk_get_max_rate); + static void rpi_firmware_delete(struct kref *kref) { struct rpi_firmware *fw = container_of(kref, struct rpi_firmware, diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h index 9b1db12d013f..ab955591cb72 100644 --- a/include/soc/bcm2835/raspberrypi-firmware.h +++ b/include/soc/bcm2835/raspberrypi-firmware.h @@ -155,12 +155,32 @@ enum rpi_firmware_clk_id { RPI_FIRMWARE_NUM_CLK_ID, }; +/** + * struct rpi_firmware_clk_rate_request - Firmware Request for a rate + * @id: ID of the clock being queried + * @rate: Rate in Hertz. Set by the firmware. + * + * Used by @RPI_FIRMWARE_GET_CLOCK_RATE, @RPI_FIRMWARE_GET_CLOCK_MEASURED, + * @RPI_FIRMWARE_GET_MAX_CLOCK_RATE and @RPI_FIRMWARE_GET_MIN_CLOCK_RATE. + */ +struct rpi_firmware_clk_rate_request { + __le32 id; + __le32 rate; +} __packed; + +#define RPI_FIRMWARE_CLK_RATE_REQUEST(_id) \ + { \ + .id = _id, \ + } + #if IS_ENABLED(CONFIG_RASPBERRYPI_FIRMWARE) int rpi_firmware_property(struct rpi_firmware *fw, u32 tag, void *data, size_t len); int rpi_firmware_property_list(struct rpi_firmware *fw, void *data, size_t tag_size); void rpi_firmware_put(struct rpi_firmware *fw); +unsigned int rpi_firmware_clk_get_max_rate(struct rpi_firmware *fw, + unsigned int id); struct device_node *rpi_firmware_find_node(void); struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node); struct rpi_firmware *devm_rpi_firmware_get(struct device *dev, @@ -180,6 +200,12 @@ static inline int rpi_firmware_property_list(struct rpi_firmware *fw, static inline void rpi_firmware_put(struct rpi_firmware *fw) { } +static inline unsigned int rpi_firmware_clk_get_max_rate(struct rpi_firmware *fw, + unsigned int id) +{ + return UINT_MAX; +} + static inline struct device_node *rpi_firmware_find_node(void) { return NULL; From patchwork Thu Oct 20 09:12:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 6075 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp151129wrs; Thu, 20 Oct 2022 02:21:15 -0700 (PDT) X-Google-Smtp-Source: AMsMyM50C2P1CaWRA6wQa2W9Mp6pEwe06D/0Be841YLm0Bqk8b+GO/jtiaUyncbn4URUHLK5nAxk X-Received: by 2002:a17:907:1c98:b0:78d:3b06:dc8f with SMTP id nb24-20020a1709071c9800b0078d3b06dc8fmr9863445ejc.58.1666257674842; Thu, 20 Oct 2022 02:21:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666257674; cv=none; d=google.com; s=arc-20160816; b=HaA7KZ0aXQxAsP4SYC3eT+RtTWskYhlYSAjCmMCTQEOsmYWwnhabjgHitUha6WEhwy LG2aCsTAusgf02ep9Db9k153EoWTWklRWN+YY5bnOOKDd8EqXXzIIMksRN/RLUlMeegu fHH4/9SvjTpX4fAGSj88D3AtupoI2v/wBWSd3evQKxKWu8JjtbryrZtY8499jMPYyH1l +KQSUJSMk9YLK5fW1syqy3A/sxFe5cayTbbN2nVVEkTyYthU+ZciPdCRl+lt8EmGRPPD VC/MIQB54pSkhom/mQxKdP0cUGpIccTTyvZMaFwYzO0lx8WbItzS2Z23N1rm6/BFS8Sm tzKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=R9HharCQOI9TrJb7L8LG1ocNL0PwXIwue7dcYvnXGEI=; b=qoXtxWnhaYfcpLhG8ngAuD/QZIY5mYnIlW4oYSZfApBeavYRS06biWGjrzdIp50Si9 ds/Z8SCWhNUFqoym1jYNU45GXx4BIInUavjXYnu6ZbUwQAWTc5b04cOJ/arFIce7IwAP Q19LdjwvDt80Tfl1QKHlJWMPZSe/EvWgybScvjPr/zibby+oLlf8jkSFCVTHcEXBe51z py/5wckUPwRS2iz0rDa+/kTArEimErD4kCKJwcjBMJrKIdKlCzx8XHhi0CgrqUFbAbPT 9AkdgrwgLcWzjvJntWf3ik+MgOiB8zFl8laQ6Ahdk/k8sRuuIzExilpB+mH0DZqpfTku OVyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@cerno.tech header.s=fm3 header.b=P6E14Vtc; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=EUhuMgTL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=cerno.tech Received: from out1.vger.email (out1.vger.email. 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Thu, 20 Oct 2022 05:13:38 -0400 (EDT) From: maxime@cerno.tech Date: Thu, 20 Oct 2022 11:12:12 +0200 Subject: [PATCH v4 4/7] drm/vc4: hdmi: Fix hdmi_enable_4kp60 detection MIME-Version: 1.0 Message-Id: <20220815-rpi-fix-4k-60-v4-4-a1b40526df3e@cerno.tech> References: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> In-Reply-To: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> To: Daniel Vetter , Emma Anholt , Michael Turquette , Stephen Boyd , Maxime Ripard , Ray Jui , Florian Fainelli , David Airlie , Broadcom internal kernel review list , Scott Branden Cc: Stefan Wahren , Maxime Ripard , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Dom Cobley , linux-rpi-kernel@lists.infradead.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1903; i=maxime@cerno.tech; h=from:subject:message-id; bh=Po/0zWeG0J9jRRowzpJU7mdz3tNlPWD94CHiLGqKoOU=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmBAq8WZaV4Ltdy2HTqus7G+QFxGto/lu9ZKXNPPSPFkvGr jI59RykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACbitJ+RofNDwr0NE4oXiKxamPc8Lc hb6uKmR9lpC/qknU2zVnYEH2T4K3X1QjJfxtPIi91ziiQWyZ04N9XUw0E5ImCSH/P+mutr+AA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747197807578924122?= X-GMAIL-MSGID: =?utf-8?q?1747197807578924122?= In order to support higher HDMI frequencies, users have to set the hdmi_enable_4kp60 parameter in their config.txt file. We were detecting this so far by calling clk_round_rate() on the core clock with the frequency we're supposed to run at when one of those modes is enabled. Whether or not the parameter was enabled could then be inferred by the returned rate since the maximum clock rate reported by the firmware was one of the side effect of setting that parameter. However, the recent clock rework we did changed what clk_round_rate() was returning to always return the minimum allowed, and thus this test wasn't reliable anymore. Let's use the new clk_get_max_rate() function to reliably determine the maximum rate allowed on that clock and fix the 4k@60Hz output. Fixes: e9d6cea2af1c ("clk: bcm: rpi: Run some clocks at the minimum rate allowed") Signed-off-by: Maxime Ripard Reviewed-by: Dave Stevenson --- drivers/gpu/drm/vc4/vc4_hdmi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 64f9feabf43e..87961d4de5aa 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -46,6 +46,7 @@ #include #include #include +#include #include #include #include @@ -3429,7 +3430,7 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) if (variant->max_pixel_clock == 600000000) { struct vc4_dev *vc4 = to_vc4_dev(drm); - long max_rate = clk_round_rate(vc4->hvs->core_clk, 550000000); + unsigned long max_rate = rpi_firmware_clk_get_max_rate(vc4->hvs->core_clk); if (max_rate < 550000000) vc4_hdmi->disable_4kp60 = true; From patchwork Thu Oct 20 09:12:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 6072 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp150543wrs; Thu, 20 Oct 2022 02:19:24 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5FmQMSRmicy/RWE4MxJUZY62sayiUOnj0IIu7qoU/2gsQpt4MKWwPijTl//NmnUeGLFD7x X-Received: by 2002:a63:6c01:0:b0:429:ea6e:486d with SMTP id h1-20020a636c01000000b00429ea6e486dmr10709058pgc.247.1666257563867; Thu, 20 Oct 2022 02:19:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666257563; cv=none; d=google.com; s=arc-20160816; b=ogSKn2W7BmOBD/rIosiXQO7yaOakYFeZcni4lriqjqYM8Tp5Tzg7UXplcKr51S4aat zrT1yifdgoXe6BHrWAhBJGGeVPQU/p+XfiUldjB1EKnwDbyOWMsrofu+ZRdCzC6M4mkz Ah0voQJ8XH41y7Tyfk86DHzfP6kpRRPKWiqgDwJgwcneaKEwmnOZ7/0IEQvM0ktLmfxE RAz9NXJ1459TsynAEqlK9av3+6PhaEJwAAVEFR8/Kn8hiq71p16Q1kwW5ZU3nG9AnpY0 b6Q022F5sUv480O7QThzUgTW+rjCtp8EDYZu94oJA31iVvCulUptf/NwwLn/ejB8QbqV F9bg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :feedback-id:dkim-signature:dkim-signature; bh=6dwoVo8+Jq1eYdQA07l5dabcDlribV6O5KPjdwSe9j4=; b=d+0hPPNlaJJ8sNmR1rdurcqIJVKiYRMOnesh8G8a0FkVqvfjJrnvvjG4WgxY9fJHQp YAUXL1o4gzdrs90TRTiO/jwvOZ879geFqXt3UnXgYPRd9GfKSiLymfbnb4LWsvpmdUtX MSKX9VPMXncXrCUhu6k3K5BJEuHnDZS0V7LJ5zrxMjVYse7WmjBz5nqA6bZKC+GEy8mf d8nTcFowxDz9U5Wn+U0Ec24He0vMwRXt5c0AoMLc7CsrycMNP2PqioTEFhJucHRAI3KK k/6Q4BgU8KhIUdlQQYWYZa/y49024PrnjWrJYt4MwY42wb9hYxvKNeiWAjgLO5xJkPcA e81A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@cerno.tech header.s=fm3 header.b=lpoads41; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=BRpCskWq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=cerno.tech Received: from out1.vger.email (out1.vger.email. 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Thu, 20 Oct 2022 05:13:43 -0400 (EDT) From: maxime@cerno.tech Date: Thu, 20 Oct 2022 11:12:13 +0200 Subject: [PATCH v4 5/7] drm/vc4: hdmi: Rework hdmi_enable_4kp60 detection code MIME-Version: 1.0 Message-Id: <20220815-rpi-fix-4k-60-v4-5-a1b40526df3e@cerno.tech> References: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> In-Reply-To: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> To: Daniel Vetter , Emma Anholt , Michael Turquette , Stephen Boyd , Maxime Ripard , Ray Jui , Florian Fainelli , David Airlie , Broadcom internal kernel review list , Scott Branden Cc: Stefan Wahren , Maxime Ripard , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Dom Cobley , linux-rpi-kernel@lists.infradead.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5876; i=maxime@cerno.tech; h=from:subject:message-id; bh=PO31vnQmNp3a4bMZwotcRmoN9WaGejWzAdZOqpYrwoo=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmBAq8MuXQWGB0SuZl6cqf1/3TGpKaGdU4Xc8tkuH5lLDwa 93hVRykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACZieoqRYcGk3s3tace4N8Q1RgpufK YU4DDBbuuPBXt3CXfdDIs9eoLhn/LDxooZQcV3Lzz3OPXbuK9t+v4VHWbywpeKtM8ZqtsXcwMA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747197691197402070?= X-GMAIL-MSGID: =?utf-8?q?1747197691197402070?= In order to support higher HDMI frequencies, users have to set the hdmi_enable_4kp60 parameter in their config.txt file. This will have the side-effect of raising the maximum of the core clock, tied to the HVS, and managed by the HVS driver. However, we are querying this in the HDMI driver by poking into the HVS structure to get our struct clk handle. Let's make this part of the HVS bind implementation to have all the core clock related setup in the same place. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_drv.h | 10 ++++++++++ drivers/gpu/drm/vc4/vc4_hdmi.c | 15 ++++----------- drivers/gpu/drm/vc4/vc4_hdmi.h | 8 -------- drivers/gpu/drm/vc4/vc4_hvs.c | 23 +++++++++++++++++++++++ 4 files changed, 37 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index 418a8242691f..8b2b1af565f9 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -326,6 +326,8 @@ struct vc4_hvs { struct clk *core_clk; + unsigned long max_core_rate; + /* Memory manager for CRTCs to allocate space in the display * list. Units are dwords. */ @@ -337,6 +339,14 @@ struct vc4_hvs { struct drm_mm_node mitchell_netravali_filter; struct debugfs_regset32 regset; + + /* + * Even if HDMI0 on the RPi4 can output modes requiring a pixel + * rate higher than 297MHz, it needs some adjustments in the + * config.txt file to be able to do so and thus won't always be + * available. + */ + bool vc5_hdmi_enable_scrambling; }; struct vc4_plane { diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 87961d4de5aa..afe3daa2173e 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -46,7 +46,6 @@ #include #include #include -#include #include #include #include @@ -460,6 +459,7 @@ static int vc4_hdmi_connector_detect_ctx(struct drm_connector *connector, static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) { struct vc4_hdmi *vc4_hdmi = connector_to_vc4_hdmi(connector); + struct vc4_dev *vc4 = to_vc4_dev(connector->dev); int ret = 0; struct edid *edid; @@ -483,7 +483,7 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) ret = drm_add_edid_modes(connector, edid); kfree(edid); - if (vc4_hdmi->disable_4kp60) { + if (!vc4->hvs->vc5_hdmi_enable_scrambling) { struct drm_device *drm = connector->dev; const struct drm_display_mode *mode; @@ -1757,11 +1757,12 @@ vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi, { const struct drm_connector *connector = &vc4_hdmi->connector; const struct drm_display_info *info = &connector->display_info; + struct vc4_dev *vc4 = to_vc4_dev(connector->dev); if (clock > vc4_hdmi->variant->max_pixel_clock) return MODE_CLOCK_HIGH; - if (vc4_hdmi->disable_4kp60 && clock > HDMI_14_MAX_TMDS_CLK) + if (!vc4->hvs->vc5_hdmi_enable_scrambling && clock > HDMI_14_MAX_TMDS_CLK) return MODE_CLOCK_HIGH; if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000)) @@ -3428,14 +3429,6 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) vc4_hdmi->disable_wifi_frequencies = of_property_read_bool(dev->of_node, "wifi-2.4ghz-coexistence"); - if (variant->max_pixel_clock == 600000000) { - struct vc4_dev *vc4 = to_vc4_dev(drm); - unsigned long max_rate = rpi_firmware_clk_get_max_rate(vc4->hvs->core_clk); - - if (max_rate < 550000000) - vc4_hdmi->disable_4kp60 = true; - } - ret = devm_pm_runtime_enable(dev); if (ret) return ret; diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h index db823efb2563..e3619836ca17 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h @@ -156,14 +156,6 @@ struct vc4_hdmi { */ bool disable_wifi_frequencies; - /* - * Even if HDMI0 on the RPi4 can output modes requiring a pixel - * rate higher than 297MHz, it needs some adjustments in the - * config.txt file to be able to do so and thus won't always be - * available. - */ - bool disable_4kp60; - struct cec_adapter *cec_adap; struct cec_msg cec_rx_msg; bool cec_tx_ok; diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index 4ac9f5a2d5f9..300ac0b57571 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -28,6 +28,8 @@ #include #include +#include + #include "vc4_drv.h" #include "vc4_regs.h" @@ -791,12 +793,33 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) hvs->regset.nregs = ARRAY_SIZE(hvs_regs); if (vc4->is_vc5) { + struct rpi_firmware *firmware; + struct device_node *node; + unsigned long max_rate; + + node = rpi_firmware_find_node(); + if (!node) + return -EINVAL; + + firmware = rpi_firmware_get(node); + of_node_put(node); + if (!firmware) + return -EPROBE_DEFER; + hvs->core_clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(hvs->core_clk)) { dev_err(&pdev->dev, "Couldn't get core clock\n"); return PTR_ERR(hvs->core_clk); } + max_rate = rpi_firmware_clk_get_max_rate(firmware, + RPI_FIRMWARE_CORE_CLK_ID); + rpi_firmware_put(firmware); + if (max_rate >= 550000000) + hvs->vc5_hdmi_enable_scrambling = true; + + hvs->max_core_rate = max_rate; + ret = clk_prepare_enable(hvs->core_clk); if (ret) { dev_err(&pdev->dev, "Couldn't enable the core clock\n"); From patchwork Thu Oct 20 09:12:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 6073 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp150685wrs; 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Thu, 20 Oct 2022 05:13:48 -0400 (EDT) From: maxime@cerno.tech Date: Thu, 20 Oct 2022 11:12:14 +0200 Subject: [PATCH v4 6/7] drm/vc4: hdmi: Add more checks for 4k resolutions MIME-Version: 1.0 Message-Id: <20220815-rpi-fix-4k-60-v4-6-a1b40526df3e@cerno.tech> References: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> In-Reply-To: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> To: Daniel Vetter , Emma Anholt , Michael Turquette , Stephen Boyd , Maxime Ripard , Ray Jui , Florian Fainelli , David Airlie , Broadcom internal kernel review list , Scott Branden Cc: Stefan Wahren , Maxime Ripard , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Dom Cobley , linux-rpi-kernel@lists.infradead.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3442; i=maxime@cerno.tech; h=from:subject:message-id; bh=QTgOeJuxmwauDIkCRKut8vRcGO6wjQAZnCghZDPfmdo=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmBAq++Pkhc8fPyDaWQq1d9baxiHacyukvPi1qQ9tbSo5+9 66xpRykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACbS+oDhv2vM5d6KGY/NP022i/eLbb WdNHXp8k0rGx/Uv9uq13h++wlGhjl+XwxOha5/lm+UWqv66HDXrWqxJ4/i09+b5iREsS49xQEA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747197722831025450?= X-GMAIL-MSGID: =?utf-8?q?1747197722831025450?= From: Dom Cobley At least the 4096x2160@60Hz mode requires some overclocking that isn't available by default, even if hdmi_enable_4kp60 is enabled. Let's add some logic to detect whether we can satisfy the core clock requirements for that mode, and prevent it from being used otherwise. Signed-off-by: Dom Cobley Signed-off-by: Maxime Ripard Reviewed-by: Dave Stevenson --- drivers/gpu/drm/vc4/vc4_drv.h | 6 ++++++ drivers/gpu/drm/vc4/vc4_hdmi.c | 11 +++++++++-- drivers/gpu/drm/vc4/vc4_hvs.c | 3 +++ 3 files changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index 8b2b1af565f9..72a6b7151d23 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -347,6 +347,12 @@ struct vc4_hvs { * available. */ bool vc5_hdmi_enable_scrambling; + + /* + * 4096x2160@60 requires a core overclock to work, so register + * whether that is sufficient. + */ + bool vc5_hdmi_enable_4096by2160; }; struct vc4_plane { diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index afe3daa2173e..fd3730ea976f 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -1753,6 +1753,7 @@ vc4_hdmi_sink_supports_format_bpc(const struct vc4_hdmi *vc4_hdmi, static enum drm_mode_status vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi, + const struct drm_display_mode *mode, unsigned long long clock) { const struct drm_connector *connector = &vc4_hdmi->connector; @@ -1765,6 +1766,12 @@ vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi, if (!vc4->hvs->vc5_hdmi_enable_scrambling && clock > HDMI_14_MAX_TMDS_CLK) return MODE_CLOCK_HIGH; + /* 4096x2160@60 is not reliable without overclocking core */ + if (!vc4->hvs->vc5_hdmi_enable_4096by2160 && + mode->hdisplay > 3840 && mode->vdisplay >= 2160 && + drm_mode_vrefresh(mode) >= 50) + return MODE_CLOCK_HIGH; + if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000)) return MODE_CLOCK_HIGH; @@ -1799,7 +1806,7 @@ vc4_hdmi_encoder_compute_clock(const struct vc4_hdmi *vc4_hdmi, unsigned long long clock; clock = vc4_hdmi_encoder_compute_mode_clock(mode, bpc, fmt); - if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, clock) != MODE_OK) + if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode, clock) != MODE_OK) return -EINVAL; vc4_state->tmds_char_rate = clock; @@ -1962,7 +1969,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_encoder *encoder, (mode->hsync_end % 2) || (mode->htotal % 2))) return MODE_H_ILLEGAL; - return vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode->clock * 1000); + return vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode, mode->clock * 1000); } static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = { diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index 300ac0b57571..a68913f76687 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -818,6 +818,9 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) if (max_rate >= 550000000) hvs->vc5_hdmi_enable_scrambling = true; + if (max_rate >= 600000000) + hvs->vc5_hdmi_enable_4096by2160 = true; + hvs->max_core_rate = max_rate; ret = clk_prepare_enable(hvs->core_clk); From patchwork Thu Oct 20 09:12:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 6076 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp151395wrs; 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Thu, 20 Oct 2022 05:13:53 -0400 (EDT) From: maxime@cerno.tech Date: Thu, 20 Oct 2022 11:12:15 +0200 Subject: [PATCH v4 7/7] drm/vc4: Make sure we don't end up with a core clock too high MIME-Version: 1.0 Message-Id: <20220815-rpi-fix-4k-60-v4-7-a1b40526df3e@cerno.tech> References: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> In-Reply-To: <20220815-rpi-fix-4k-60-v4-0-a1b40526df3e@cerno.tech> To: Daniel Vetter , Emma Anholt , Michael Turquette , Stephen Boyd , Maxime Ripard , Ray Jui , Florian Fainelli , David Airlie , Broadcom internal kernel review list , Scott Branden Cc: Stefan Wahren , Maxime Ripard , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Dom Cobley , linux-rpi-kernel@lists.infradead.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1986; i=maxime@cerno.tech; h=from:subject:message-id; bh=OlYeB2ublZKB2gNRKUkiz3SMrxpUPQXZoje1Yvw0WSE=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmBAq/qV2faRt7fczp8z6UQuZtzf4jXBz964lzz06byjv1x 21v1HaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZjIYjZGhl3uutFlDz7OSnbdcPhFWn thz711W3eJTDqZs+31u9LDHi8Z/nBoN8VOXfPiVuDiqdMUQz1zxawvtrBF9F7d1Wk0mfnJd1YA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747197858692310212?= X-GMAIL-MSGID: =?utf-8?q?1747197858692310212?= Following the clock rate range improvements to the clock framework, trying to set a disjoint range on a clock will now result in an error. Thus, we can't set a minimum rate higher than the maximum reported by the firmware, or clk_set_min_rate() will fail. Thus we need to clamp the rate we are about to ask for to the maximum rate possible on that clock. Signed-off-by: Maxime Ripard Reviewed-by: Dave Stevenson --- drivers/gpu/drm/vc4/vc4_kms.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c index 4419e810103d..5c97642ed66a 100644 --- a/drivers/gpu/drm/vc4/vc4_kms.c +++ b/drivers/gpu/drm/vc4/vc4_kms.c @@ -396,8 +396,8 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state) if (vc4->is_vc5) { unsigned long state_rate = max(old_hvs_state->core_clock_rate, new_hvs_state->core_clock_rate); - unsigned long core_rate = max_t(unsigned long, - 500000000, state_rate); + unsigned long core_rate = clamp_t(unsigned long, state_rate, + 500000000, hvs->max_core_rate); drm_dbg(dev, "Raising the core clock at %lu Hz\n", core_rate); @@ -431,14 +431,17 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state) drm_atomic_helper_cleanup_planes(dev, state); if (vc4->is_vc5) { - drm_dbg(dev, "Running the core clock at %lu Hz\n", - new_hvs_state->core_clock_rate); + unsigned long core_rate = min_t(unsigned long, + hvs->max_core_rate, + new_hvs_state->core_clock_rate); + + drm_dbg(dev, "Running the core clock at %lu Hz\n", core_rate); /* * Request a clock rate based on the current HVS * requirements. */ - WARN_ON(clk_set_min_rate(hvs->core_clk, new_hvs_state->core_clock_rate)); + WARN_ON(clk_set_min_rate(hvs->core_clk, core_rate)); drm_dbg(dev, "Core clock actual rate: %lu Hz\n", clk_get_rate(hvs->core_clk));