From patchwork Fri Mar 24 07:12:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 74381 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp431327vqo; Fri, 24 Mar 2023 00:16:54 -0700 (PDT) X-Google-Smtp-Source: AKy350YYfm+R3NYsN3F40ozpTkHwoogLVTdR9C9TJghWRi0d9LbkT453a+67h8qpaocbiGGWA1D2 X-Received: by 2002:a17:903:4305:b0:19e:8bfe:7d70 with SMTP id jz5-20020a170903430500b0019e8bfe7d70mr1454616plb.52.1679642214033; Fri, 24 Mar 2023 00:16:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679642214; cv=none; d=google.com; s=arc-20160816; b=room8WDfx23oojszK6gVaRW8hv5dl9Cl4NS9xJi9EDYbxyuZjwwbklQN4e0cI/ehUE ossRhy6R/TWmqOnEBblZ4TuZAA1fdX0SDXh5yGw5BRebB7vFeUgas2cZFcMuZcgljKz/ 23NHp0tP3ziX6s0lWngWcQQURy3ghXqPrj6VLT+TPpFMyKeXY9Dl7Q5eNzF3qH+oHe9n xIikjgOpjMFgbcy8Z5a3vjDWe90s9Y65LgSQ0ALiLvwhqvtqmW7ygPlX7vw1fevAcikL 3H6TZfR6dOM5GvftJfCQ+QEO0vRzoNJKCUQaLvhysPas2YS2d4NAlz5/7Q61Y1F1BjdT vNmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=77YY54V2Rb/oURSqdsoDnlM2oZlYCsr2YpIUIDIvvFQ=; b=zpXsyq/bjlh1RUhA+l08jP0Q8t/aL30aINHNjbVL/fI3IcMIvUe+5nmgR7JNbcWE4V dE5KaeAwmVmlLJ09QnPsNiM8M37W5YLpcIKFjtX3q7sH384+0r+uxL9wbQXVgOirfsod Bf1AwJngoxAqYzE6xeg3BYdlWamEyvkzUtomGv7xcSGSs4MOWf0ToFQejSpfnssFAnBf wk8h7RhN6f/gUFLPDQ/GpGx7mmFVJ2t9MGHrUhKCOaoFztQLl8gORuO5Z4CRA36QMzoU qU8lkLIAJNN/ApkBdcWRV/NmxeQTf13C4wj4IBKc6z7u3tMCV+i+uIhiXYOvejnGLxZ/ xzPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=usk7ybmm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 21-20020a630d55000000b0050fa771219csi8864301pgn.510.2023.03.24.00.16.42; Fri, 24 Mar 2023 00:16:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=usk7ybmm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231448AbjCXHOj (ORCPT + 99 others); Fri, 24 Mar 2023 03:14:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231444AbjCXHOh (ORCPT ); Fri, 24 Mar 2023 03:14:37 -0400 Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8DF4A113F9; Fri, 24 Mar 2023 00:14:33 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id B4C8ACE243C; Fri, 24 Mar 2023 07:14:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B2101C433A7; Fri, 24 Mar 2023 07:14:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1679642069; bh=a6pkreN/bR+v0jYs/l/GLCeFHYQLtQjZWlVe7ojZHf0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=usk7ybmmwQ9Q1r5nO+ibJKtn69la9vvH/t2YdqM7mU8Pqj5iLGmJGmAB7BV5afiYP ZkaOdLX2yqk+TQPATo27idBPM/FKJhjyy4WlSXo3v6lWgWFKXUdwuPpcBk4CbecrBr BuWCs26VAHYWfIovxNxrKr7w4H+wGfzeTj3QMbPDQMip4ORhoKqC8zqc4hs2ok6GZK AFyebcm74pLsbNe0WDNJYPzvVpCG6Z7r5aJ7l0gY3wLVs0m3a5f6x8Qjwk9wzkCw/d XHRVY16joeCpdjR+0V5RRSGG6J3iYgQhLMTzVO44qjoKLRApRVGUeYZKc4Q5rZc0+d bOLpjrbNsgyEg== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, mark.rutland@arm.com, bjorn@kernel.org Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH -next V11 1/3] riscv: stack: Support HAVE_IRQ_EXIT_ON_IRQ_STACK Date: Fri, 24 Mar 2023 03:12:37 -0400 Message-Id: <20230324071239.151677-2-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230324071239.151677-1-guoren@kernel.org> References: <20230324071239.151677-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761232514387376419?= X-GMAIL-MSGID: =?utf-8?q?1761232514387376419?= From: Guo Ren Add independent irq stacks for percpu to prevent kernel stack overflows. It is also compatible with VMAP_STACK by implementing arch_alloc_vmap_stack. Many architectures have supported HAVE_IRQ_EXIT_ON_IRQ_STACK, riscv should follow up. Tested-by: Jisheng Zhang Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/Kconfig | 8 ++++++ arch/riscv/include/asm/thread_info.h | 2 ++ arch/riscv/include/asm/vmap_stack.h | 28 ++++++++++++++++++++ arch/riscv/kernel/irq.c | 32 +++++++++++++++++++++++ arch/riscv/kernel/traps.c | 38 ++++++++++++++++++++++++++-- 5 files changed, 106 insertions(+), 2 deletions(-) create mode 100644 arch/riscv/include/asm/vmap_stack.h diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index e6df999f08cc..eb3c40d3a21b 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -493,6 +493,14 @@ config FPU If you don't know what to do here, say Y. +config IRQ_STACKS + bool "Independent irq stacks" if EXPERT + default y + select HAVE_IRQ_EXIT_ON_IRQ_STACK + help + Add independent irq stacks for percpu to prevent kernel stack overflows. + We may save some memory footprint by disabling IRQ_STACKS. + endmenu # "Platform type" menu "Kernel features" diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index e0d202134b44..ab60593eed99 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -40,6 +40,8 @@ #define OVERFLOW_STACK_SIZE SZ_4K #define SHADOW_OVERFLOW_STACK_SIZE (1024) +#define IRQ_STACK_SIZE THREAD_SIZE + #ifndef __ASSEMBLY__ extern long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE / sizeof(long)]; diff --git a/arch/riscv/include/asm/vmap_stack.h b/arch/riscv/include/asm/vmap_stack.h new file mode 100644 index 000000000000..3fbf481abf4f --- /dev/null +++ b/arch/riscv/include/asm/vmap_stack.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +// Copied from arch/arm64/include/asm/vmap_stack.h. +#ifndef _ASM_RISCV_VMAP_STACK_H +#define _ASM_RISCV_VMAP_STACK_H + +#include +#include +#include +#include +#include +#include + +/* + * To ensure that VMAP'd stack overflow detection works correctly, all VMAP'd + * stacks need to have the same alignment. + */ +static inline unsigned long *arch_alloc_vmap_stack(size_t stack_size, int node) +{ + void *p; + + BUILD_BUG_ON(!IS_ENABLED(CONFIG_VMAP_STACK)); + + p = __vmalloc_node(stack_size, THREAD_ALIGN, THREADINFO_GFP, node, + __builtin_return_address(0)); + return kasan_reset_tag(p); +} + +#endif /* _ASM_RISCV_VMAP_STACK_H */ diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index 7207fa08d78f..52f2fa44a9bb 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -9,6 +9,37 @@ #include #include #include +#include + +#ifdef CONFIG_IRQ_STACKS +DEFINE_PER_CPU(ulong *, irq_stack_ptr); + +#ifdef CONFIG_VMAP_STACK +static void init_irq_stacks(void) +{ + int cpu; + ulong *p; + + for_each_possible_cpu(cpu) { + p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu)); + per_cpu(irq_stack_ptr, cpu) = p; + } +} +#else +/* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */ +DEFINE_PER_CPU_ALIGNED(ulong [IRQ_STACK_SIZE/sizeof(ulong)], irq_stack); + +static void init_irq_stacks(void) +{ + int cpu; + + for_each_possible_cpu(cpu) + per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu); +} +#endif /* CONFIG_VMAP_STACK */ +#else +static void init_irq_stacks(void) {} +#endif /* CONFIG_IRQ_STACKS */ int arch_show_interrupts(struct seq_file *p, int prec) { @@ -18,6 +49,7 @@ int arch_show_interrupts(struct seq_file *p, int prec) void __init init_IRQ(void) { + init_irq_stacks(); irqchip_init(); if (!handle_arch_irq) panic("No interrupt controller found."); diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index 1f4e37be7eb3..b69933ab6bf8 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -305,16 +305,50 @@ asmlinkage __visible noinstr void do_page_fault(struct pt_regs *regs) } #endif -asmlinkage __visible noinstr void do_irq(struct pt_regs *regs) +static void noinstr handle_riscv_irq(struct pt_regs *regs) { struct pt_regs *old_regs; - irqentry_state_t state = irqentry_enter(regs); irq_enter_rcu(); old_regs = set_irq_regs(regs); handle_arch_irq(regs); set_irq_regs(old_regs); irq_exit_rcu(); +} + +#ifdef CONFIG_IRQ_STACKS +DECLARE_PER_CPU(ulong *, irq_stack_ptr); +#endif + +asmlinkage void noinstr do_irq(struct pt_regs *regs) +{ + irqentry_state_t state = irqentry_enter(regs); +#ifdef CONFIG_IRQ_STACKS + if (on_thread_stack()) { + ulong *sp = per_cpu(irq_stack_ptr, smp_processor_id()) + + IRQ_STACK_SIZE/sizeof(ulong); + __asm__ __volatile( + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" ra, (sp) \n" + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" s0, (sp) \n" + "addi s0, sp, 2*"RISCV_SZPTR "\n" + "move sp, %[sp] \n" + "move a0, %[regs] \n" + "call handle_riscv_irq \n" + "addi sp, s0, -2*"RISCV_SZPTR"\n" + REG_L" s0, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + REG_L" ra, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + : + : [sp] "r" (sp), [regs] "r" (regs) + : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", + "t0", "t1", "t2", "t3", "t4", "t5", "t6", + "memory"); + } else +#endif + handle_riscv_irq(regs); irqentry_exit(regs, state); } From patchwork Fri Mar 24 07:12:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 74390 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp438357vqo; Fri, 24 Mar 2023 00:33:34 -0700 (PDT) Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=UthNUi9q X-Google-Smtp-Source: AKy350YguQ5WfP4byy7NhiNWwD0RGT84sYartdetxRJPOli4ng/aW+LIsUOr6+GzVlmGveMCwTyc X-Received: by 2002:a17:90b:1e0e:b0:23d:3698:8ee8 with SMTP id pg14-20020a17090b1e0e00b0023d36988ee8mr1934725pjb.31.1679643214048; Fri, 24 Mar 2023 00:33:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679643214; cv=none; d=google.com; s=arc-20160816; b=HftvXuGZ1ZQjdO+hahfQX7XbrsIKy+LHr5qSljTgbwQ3g0ACWywKJe90w77FwFPLjY ecR3H2+phu+c5yJvP3ST1LgZ3cNgPctDbk29QzwX1w3q06sGBB/Dq+1sTD/xgZ01LDjf A7D5Lg/Bbi6cKXdYZ2B0fXbjk2c53eC/ULwmpgtLqhCGsy0YA5qWR/uhnHDk9S9Xu+qW nZbZuUwViklQkZR58kXKXoZR6ZlViHj3+J58up1PqRurTAQDyDRTeD0cQUdUUFsx1Qel 5WDJVXy+iE+eUM+MwfvhJUr8R4SckSZSVsJagdqfmG6kL+Nzx2ls1IiPSJtsIaQedGv3 eXHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e+xABXxlgzvWRJzYIuuJjHcIZgSAXnoGl2mt+oIuYFo=; b=Gp3LnWyxzr9z2dzI77ituU7zdLLSt8CYOKy8q8wqwMT5sDV+KG5B4TSh8EFjGsfxFM l0GKU82xcOr9RCfi6NCK862dqiv0HGdKcHWH1YzGjiYDneQDmnDzuEkAFHlEwPj6HK6X X65XcK3eSPjJkLf+dC8rAJ6n5vb7Cla61bLnhzGPPAnRcntE0sebhJcug4fc6UdqooEm tCyWpTUhGFq3lAyRfQTtot8A0ExtgAWxukYmqrhs7uZs+7BB8iLvxjoXeVz1WiD1zaLe LCeca9PAcRUtphrzPUTUITE0tWCFHZG8dRfCTKt4mb2k2rE4K8y/Dcm0A8O8PzzD6/5+ iP/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=UthNUi9q; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 31-20020a17090a0fa200b00233efa8d3e5si3662731pjz.20.2023.03.24.00.33.21; Fri, 24 Mar 2023 00:33:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=UthNUi9q; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231499AbjCXHO5 (ORCPT + 99 others); Fri, 24 Mar 2023 03:14:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231483AbjCXHOk (ORCPT ); Fri, 24 Mar 2023 03:14:40 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33E7F10261; Fri, 24 Mar 2023 00:14:39 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D2276B8228C; Fri, 24 Mar 2023 07:14:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 75C6BC433EF; Fri, 24 Mar 2023 07:14:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1679642076; bh=l0++r3py708ypvnpG587Sveo6OJJ1+QXcd11boQ5cIg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UthNUi9qbVxLX0I5M6PIRNMzRwMK4TbxHJwwS0nY/c/rhga6JndjgfbZ4faDxjoqe wlWXFOCy5TEsqNMqqOvRkJBsCmZvS7dHRX6EUHAbdNZCbBB8W04kYJrs4+xmSRfsky ll7PQG9oYCF2oK+lrv2jeCmjC8q+UTNeIY+mIXaUuRApeVu/PQyaFBoda+shaE2V2g dpMtopr6YjShYsvGO7yGvG4Urho0B63mKLUq9bZ9qDaOHf+b9EcjoJ2P3CrHDyES8H vK+LI0hx74qL1UbZmAp/69awh8KPIx2h8lWi7Siyoz6XzJVcfbjUno6iaHtN9Gy1v9 TUrcTPlsyHPXg== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, mark.rutland@arm.com, bjorn@kernel.org Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH -next V11 2/3] riscv: stack: Support HAVE_SOFTIRQ_ON_OWN_STACK Date: Fri, 24 Mar 2023 03:12:38 -0400 Message-Id: <20230324071239.151677-3-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230324071239.151677-1-guoren@kernel.org> References: <20230324071239.151677-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761233562673661530?= X-GMAIL-MSGID: =?utf-8?q?1761233562673661530?= From: Guo Ren Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config. The irq and softirq use the same independent irq_stack of percpu by time division multiplexing. Tested-by: Jisheng Zhang Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/Kconfig | 7 ++++--- arch/riscv/kernel/irq.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+), 3 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index eb3c40d3a21b..7b10af7d2479 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -494,12 +494,13 @@ config FPU If you don't know what to do here, say Y. config IRQ_STACKS - bool "Independent irq stacks" if EXPERT + bool "Independent irq & softirq stacks" if EXPERT default y select HAVE_IRQ_EXIT_ON_IRQ_STACK + select HAVE_SOFTIRQ_ON_OWN_STACK help - Add independent irq stacks for percpu to prevent kernel stack overflows. - We may save some memory footprint by disabling IRQ_STACKS. + Add independent irq & softirq stacks for percpu to prevent kernel stack + overflows. We may save some memory footprint by disabling IRQ_STACKS. endmenu # "Platform type" diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index 52f2fa44a9bb..0592c2e99b5f 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -10,6 +10,8 @@ #include #include #include +#include +#include #ifdef CONFIG_IRQ_STACKS DEFINE_PER_CPU(ulong *, irq_stack_ptr); @@ -37,6 +39,38 @@ static void init_irq_stacks(void) per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu); } #endif /* CONFIG_VMAP_STACK */ + +#ifdef CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK +void do_softirq_own_stack(void) +{ +#ifdef CONFIG_IRQ_STACKS + if (on_thread_stack()) { + ulong *sp = per_cpu(irq_stack_ptr, smp_processor_id()) + + IRQ_STACK_SIZE/sizeof(ulong); + __asm__ __volatile( + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" ra, (sp) \n" + "addi sp, sp, -"RISCV_SZPTR "\n" + REG_S" s0, (sp) \n" + "addi s0, sp, 2*"RISCV_SZPTR "\n" + "move sp, %[sp] \n" + "call __do_softirq \n" + "addi sp, s0, -2*"RISCV_SZPTR"\n" + REG_L" s0, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + REG_L" ra, (sp) \n" + "addi sp, sp, "RISCV_SZPTR "\n" + : + : [sp] "r" (sp) + : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", + "t0", "t1", "t2", "t3", "t4", "t5", "t6", + "memory"); + } else +#endif + __do_softirq(); +} +#endif /* CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK */ + #else static void init_irq_stacks(void) {} #endif /* CONFIG_IRQ_STACKS */ From patchwork Fri Mar 24 07:12:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 74391 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp438773vqo; Fri, 24 Mar 2023 00:34:29 -0700 (PDT) X-Google-Smtp-Source: AK7set+NKHYdM6m6sCwqGT59JpVyYgRu2buZOSHQwuECCrc43NB6QCyWXoqqmYn2swmNthTLHhom X-Received: by 2002:a05:6402:b8c:b0:4b6:821e:1859 with SMTP id cf12-20020a0564020b8c00b004b6821e1859mr8327015edb.7.1679643269573; Fri, 24 Mar 2023 00:34:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679643269; cv=none; d=google.com; s=arc-20160816; b=yKj34Y9cjbh4jrlPEDylmgmB/wS1scFBVqdD8kuw3JBdF5QL+kKIV6M86ae2NRYJsZ GuKw0mM/YiWtY9ltUu25PppJD7kltA6OAdYs7QX9H2sXA3JmqMcQH1IsE6AfvSFIQONB 6kdfxlA2sbKUThVMlp7fvt5KlAd5e9JFeU8l+XOZQ2ktRdTRHALTF47xkM2V9o1kwVAi eVcUiR3msIV3xTw6+LqCrj42opLYN65khAGuPuvWeUExYWe5++6UdI8BCU7nanw/D9WL Pr8WkPxbfT9Bh8YmHilh88LevmsmGQQretblViY7OOKzfKFTmqLATq9oW58ruVz0NvPp xNmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9se1nNgyyTzioNLfyAw2N+NM0uU5wF4/JGgvHmMVvbo=; b=mYpKWgQxeFfDCdMu3UyD1fOHOgkxWTRBhM7aYvP8EqcGhIeEqTm7cmzcNJWOfUZD75 mRQv4uAXJpe9fi6FhDjVNEBaYktsphB3+tqFjk4y4TDYVAEHKP5hTwfVxfAk+pGY+IA+ xX/HEnyRVjsZ4GvAQRKr/mt0YM/f4V0KiEBULSaB/b10AgBzqMgui1ZUvObzVicKNqGI OlpxRS3bZQYfPaHwcDOm7zAjdzbFhuzxlQV1DTSehdA727m/Wl9HH9Fxc18JimDCv1Y7 mUhIwI+b/glUVr1UvowN6/p7jcs8m4qZlPF7hjzJaaJgK7IfvtUXscNShK/qDYGJ2EJz 0XaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=bSt7xWTQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d8-20020aa7ce08000000b005002c4202a0si22345999edv.182.2023.03.24.00.34.05; Fri, 24 Mar 2023 00:34:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=bSt7xWTQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231655AbjCXHPD (ORCPT + 99 others); Fri, 24 Mar 2023 03:15:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231608AbjCXHOw (ORCPT ); Fri, 24 Mar 2023 03:14:52 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 327E61448B; Fri, 24 Mar 2023 00:14:46 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 998A7B819BA; Fri, 24 Mar 2023 07:14:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 368CCC4339C; Fri, 24 Mar 2023 07:14:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1679642083; bh=5Apt43PtNAwm2BzPLMCNMaIA3jE930gvw1frsSZwRcA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bSt7xWTQ8EDfBmF/+gfDgrXxNbsKZkHQIvgyzDiebEdRbBPRSb1kfXqq5toIXzX4j kGptgJX058jI4BaeNWwWfyeES3V32qD5jH2NS7vJuzJSpzO6vxogJtaIi8WYVxb4mm VkfxphQZwF9/rbxXG85b/eCA3CTomFMfh3UzG8ywV5v1R3HlMfgqn32TU9tq1OXDdr G3+lDp17cBvLCYZN9q4itL2xe205klcxvA8xj9qT7FEwQE5m6cl3lLTNsitVXfo0ru Rox0R2BkH1VIj3g1lgyAVWtbA5qfWD6nVC2s6IZ7UOEgPVXA5YeSXq/dY4md4iroBb uSrC7JorAVjsA== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, mark.rutland@arm.com, bjorn@kernel.org Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [PATCH -next V11 3/3] riscv: stack: Add config of thread stack size Date: Fri, 24 Mar 2023 03:12:39 -0400 Message-Id: <20230324071239.151677-4-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230324071239.151677-1-guoren@kernel.org> References: <20230324071239.151677-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-5.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761233620641175253?= X-GMAIL-MSGID: =?utf-8?q?1761233620641175253?= From: Guo Ren The commit 0cac21b02ba5 ("riscv: use 16KB kernel stack on 64-bit") increases the thread size mandatory, but some scenarios, such as D1 with a small memory footprint, would suffer from that. After independent irq stack support, let's give users a choice to determine their custom stack size. Link: https://lore.kernel.org/linux-riscv/5f6e6c39-b846-4392-b468-02202404de28@www.fastmail.com/ Suggested-by: Arnd Bergmann Tested-by: Jisheng Zhang Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- arch/riscv/Kconfig | 10 ++++++++++ arch/riscv/include/asm/thread_info.h | 12 +----------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 7b10af7d2479..f58a8e37f1d5 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -502,6 +502,16 @@ config IRQ_STACKS Add independent irq & softirq stacks for percpu to prevent kernel stack overflows. We may save some memory footprint by disabling IRQ_STACKS. +config THREAD_SIZE_ORDER + int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT + range 0 4 + default 1 if 32BIT && !KASAN + default 3 if 64BIT && KASAN + default 2 + help + Specify the Pages of thread stack size (from 4KB to 64KB), which also + affects irq stack size, which is equal to thread stack size. + endmenu # "Platform type" menu "Kernel features" diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index ab60593eed99..41556ee84290 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -11,18 +11,8 @@ #include #include -#ifdef CONFIG_KASAN -#define KASAN_STACK_ORDER 1 -#else -#define KASAN_STACK_ORDER 0 -#endif - /* thread information allocation */ -#ifdef CONFIG_64BIT -#define THREAD_SIZE_ORDER (2 + KASAN_STACK_ORDER) -#else -#define THREAD_SIZE_ORDER (1 + KASAN_STACK_ORDER) -#endif +#define THREAD_SIZE_ORDER CONFIG_THREAD_SIZE_ORDER #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) /*