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[2620:137:e000::1:20]) by mx.google.com with ESMTP id s12-20020a056a0008cc00b006256e67028dsi19556670pfu.122.2023.03.23.10.31.43; Thu, 23 Mar 2023 10:32:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=KCgwX9Jx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231678AbjCWRbV (ORCPT + 99 others); Thu, 23 Mar 2023 13:31:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231556AbjCWRbT (ORCPT ); Thu, 23 Mar 2023 13:31:19 -0400 Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B7DC52686C for ; Thu, 23 Mar 2023 10:31:10 -0700 (PDT) Received: by mail-pl1-x629.google.com with SMTP id ja10so22988557plb.5 for ; Thu, 23 Mar 2023 10:31:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592670; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=km2gqXc7azHXISk3TRRkbz6777YLDRrwj5fuSfpq1q8=; b=KCgwX9Jxa6ZuTKmTith9SO5UOsRsmngKseZno4cqXEm7+jy1lVMNhTL1iOBxxM5TxK oYE8Dll9PNG+8RA0LbuHxpwQIZxHdl8kOBdP4qkOWRFfmZlXmgW7smhrcv73a8Vu18z4 0zVIqv9teDevEYUSrhbLRlUA2va7Vj4PC4tN8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592670; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=km2gqXc7azHXISk3TRRkbz6777YLDRrwj5fuSfpq1q8=; b=ZFYQ/nfEiNGJrxyUy+JB9oBkR0EVbb1B+pH+MvlozFDV/+Ipr6Y6kIHLH21P4gNDg5 htHjRqpZUruu9yP8YLyl7fgVWBeLAl6oOc+yXzjxc5bFViZFdE7RpieYCH9jJLCHW7Yx AW8cv6HiIWurrima4DeYNEm+VN/4rxFFy9cLbdvzoYZYvfdXvwuQ1YjybytZ02107OHF KQZseMpqJK47mxqQ1UO5EhQl2yY6SGXvrBKCeQXMi+UUDlbO47SGrOnse0n4EU7mwraW mHy3TZu47jJjz/Cw19UMiXMhVgtlf4gsn7UD55iVBkbR0bCMWpxrEn92MnO+6MHlrk8j iupg== X-Gm-Message-State: AO0yUKUEn4roGYoqNrWeA/lt6ziVHXwWTNbaZmJTUTnQXSqaY0nPzcqp UNI2cv77d7Lu8hw+2OpEBvkJSA== X-Received: by 2002:a05:6a20:8b9c:b0:da:d9e7:9a5d with SMTP id m28-20020a056a208b9c00b000dad9e79a5dmr400673pzh.4.1679592669751; Thu, 23 Mar 2023 10:31:09 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:09 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , Rajendra Nayak , Roja Rani Yarubandi , linux-kernel@vger.kernel.org Subject: [PATCH 01/14] arm64: dts: sc7180: Rename qspi data12 as data23 Date: Thu, 23 Mar 2023 10:30:05 -0700 Message-Id: <20230323102605.1.Ifc1b5be04653f4ab119698a5944bfecded2080d6@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761180621674808424?= X-GMAIL-MSGID: =?utf-8?q?1761180621674808424?= There are 4 qspi data pins: data0, data1, data2, and data3. Currently we have a shared pin state for data0 and data1 (2 lane config) and a pin state for data2 and data3 (you'd enable both this and the 2 lane state for 4 lanes). The second state is obviously misnamed. Fix it. Fixes: ba3fc6496366 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1") Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index ebfa21e9ed8a..fe62ce516c4e 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1540,7 +1540,7 @@ qspi_data01: qspi-data01-state { function = "qspi_data"; }; - qspi_data12: qspi-data12-state { + qspi_data23: qspi-data23-state { pins = "gpio66", "gpio67"; function = "qspi_data"; }; From patchwork Thu Mar 23 17:30:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74131 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3043139wrt; Thu, 23 Mar 2023 10:32:19 -0700 (PDT) X-Google-Smtp-Source: AK7set94KYg1doY6ayslwfBCFOqUyQ7oZxoDmqUkYSMHyFK+Z2cuqCl46p/Rf900UxveAxNB/zr1 X-Received: by 2002:a17:902:da92:b0:19f:3b10:71fc with SMTP id j18-20020a170902da9200b0019f3b1071fcmr9944856plx.21.1679592739110; Thu, 23 Mar 2023 10:32:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679592739; cv=none; d=google.com; s=arc-20160816; b=PAEKlzxgsmrSQhZqlVpuXTg7dJhyoAoVREQgx589B9KCp3ra+qUX4SzcZOIHLb5ryX PooewmXVdTAd3rWBgCo8XkyGNICp4TTxRGzWuEfocROqdDUJn5D0oiBiiR+FUxeLL8PN +yTJP1SQmZ1P7p06MK8el2ixwHvIZK3jUTvlJN4jALM5JHKhy+j9TnfTLXZElSbkdB22 Yjcssiw9SwiLHouioxUv6kl4UEnN9GPZrEdNFJZzI3r8Dqpqt4cEYc8oZJeKhRQTBMy4 +qoLsq0tTvV4tlND9TaZJceZcOGFGkgNsdNM/0pNqdb6eJSWeB5l3Vzs7vtzX/tNxKe5 ny2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LHcHlbRFQY1a3JxFlrTE/SnrAnzBxSKk8fubRmial5c=; b=mbxathjTWxqV1ZkHBOMM9Xooqbh3B9qtmKjWMw21mg1U8PoJcaqcnCtBhpymPYPrqj jA5KpBIDlo8A3xG/f6PRKz/cMXelf98qXYVKjfxW7YjDpVmTaUx5MZQy4ZwixZ2mEobL GV/aYGTJ7SN3KfMbprl5jIvjsfkdhCrQ5HcS7hNRmE7mkREG/YHEjdFq0Jjx+0DifgMx VPPHKfISYta2plqxKKWgBxlhfEwZ2OBduOy3N0URvT+9zSKXPL9eDTp+cz/+JqE7RuWY Gyd3iRKQ28uZ7C3rF7kF9+8Tl+0POGSFlK2wSDOBVLfHnc4sSCpIv5ZIJCH7QpLiDuq2 LJtw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=fa1AbAuC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h9-20020a170902748900b001a04202f77bsi18045220pll.431.2023.03.23.10.31.52; Thu, 23 Mar 2023 10:32:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=fa1AbAuC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232281AbjCWRbZ (ORCPT + 99 others); Thu, 23 Mar 2023 13:31:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43988 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232076AbjCWRbV (ORCPT ); Thu, 23 Mar 2023 13:31:21 -0400 Received: from mail-pg1-x530.google.com (mail-pg1-x530.google.com [IPv6:2607:f8b0:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C12BF23874 for ; Thu, 23 Mar 2023 10:31:12 -0700 (PDT) Received: by mail-pg1-x530.google.com with SMTP id d22so13026669pgw.2 for ; Thu, 23 Mar 2023 10:31:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592672; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LHcHlbRFQY1a3JxFlrTE/SnrAnzBxSKk8fubRmial5c=; b=fa1AbAuC4lMywoWwSoxWcDq285CBpRd8wXgmJnExNcYHfkUP1ByNGsnGs2A+nRC58g IhBPVm84vP7b9SjRBDVPetgiMJK3hzuEBeEk/aTsLjmFl1GMxcmBJTPfNls0eXD6mO38 Ot9J34CJK0XUpgnnWoc0fCWj8B4ePd39cTIuY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592672; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LHcHlbRFQY1a3JxFlrTE/SnrAnzBxSKk8fubRmial5c=; b=PzXDEWbGKpmMWedmiMH/4IULikRZdK1VE50u/zb23bnacMcji4jJ6IzqMWQcng1ccP CxzyMieobiwoZbs1HH6klva2Vgode0yVQtKNqAm8wNXgQzN5zJ64+zGTK6Q/lI+xCMek 4Ywvq0k/jWoGRUe5/U8FqRINYP0NzYLFc1JDwFCJM95YWtqHr06WlfjrlQwGlbJtRMn6 +vG5Q4CwXGvJgk/DxRj4lUioGp4fEQCk7DTWHO0QaBmekS1u6NvUj8yXsQRsd+fFVlgC Pw+tA8+s7/73tOmpVcjCwenB3pa082kM9xBYUeqwG1FObAgG3yaMEe/9Krc4Oseqn3LY 8U5Q== X-Gm-Message-State: AAQBX9edwgOnwfNdSWYaKesZmm1z0IqIpODWgEw5s73EB7fa6HmiQayG UWGDLaRAE2nU7MXODPIYPPQ2nQ== X-Received: by 2002:aa7:94ba:0:b0:627:f756:b206 with SMTP id a26-20020aa794ba000000b00627f756b206mr260563pfl.1.1679592671782; Thu, 23 Mar 2023 10:31:11 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:11 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , Rajesh Patil , Roja Rani Yarubandi , linux-kernel@vger.kernel.org Subject: [PATCH 02/14] arm64: dts: sc7280: Rename qspi data12 as data23 Date: Thu, 23 Mar 2023 10:30:06 -0700 Message-Id: <20230323102605.2.I4043491bb24b1e92267c5033d76cdb0fe60934da@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761180636007154114?= X-GMAIL-MSGID: =?utf-8?q?1761180636007154114?= There are 4 qspi data pins: data0, data1, data2, and data3. Currently we have a shared pin state for data0 and data1 (2 lane config) and a pin state for data2 and data3 (you'd enable both this and the 2 lane state for 4 lanes). The second state is obviously misnamed. Fix it. Fixes: 7720ea001b52 ("arm64: dts: qcom: sc7280: Add QSPI node") Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index bdcb74925313..71e2e51c7c7f 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -4342,7 +4342,7 @@ qspi_data01: qspi-data01-state { function = "qspi_data"; }; - qspi_data12: qspi-data12-state { + qspi_data23: qspi-data23-state { pins = "gpio16", "gpio17"; function = "qspi_data"; }; From patchwork Thu Mar 23 17:30:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74135 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3045276wrt; Thu, 23 Mar 2023 10:36:42 -0700 (PDT) X-Google-Smtp-Source: AKy350Z1wVyTDn506IsLe1ZIGY7cNsUxU8gLdT90cmPPYtPklv9Ol5TibJg7sGBsOn1RTbFK2VBm X-Received: by 2002:a62:7904:0:b0:5df:9809:2e95 with SMTP id u4-20020a627904000000b005df98092e95mr288469pfc.11.1679593001881; Thu, 23 Mar 2023 10:36:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679593001; cv=none; d=google.com; s=arc-20160816; b=C6ItEv7nckkSqlZGZhy9AiM7O2pbcLX8XfDIUqcuLzIz1LE4tqPTODEfUcn+tNcCaw 4lfgKadfm/PhplgvFRBeMPV56FZeBokCUmNyWiDXLHf6yed+JQ5uTct+YelMegwPENSw 34BdWidDSZnvVEsBtHOF4GugPIkYenZyQZ6MkrpMcpB7YVC0WEVj2ZQFkPEPm2nzMMq8 7yz2cxkylaRc454jITLCaYc1z45HqtelH7cd077NbMuuYnrWw8i7bAg0GQYSkTARCx+Q 4scgPLKNSaeyEZgFq+lcwgjXu0HMJ/Y4F9moDVwB84GLYtN7QOmjmpF7/4EorGAU9Fd+ CTGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Q/zeFLtT5svFzGSOkobW0E5oP7EbYRFgi9o291n1fds=; b=WZ3nxvOp1P1SnVBgXX9H53yUcJwFXAn+3WQmyYy5k+7V7PRnHFaZDy9Ntr02JzCCV0 reHibyaBL90IdWlkXUQiOUIvh1AP51VUbCZK3YG6lpH7BXSQ7ibq6wf4XpWbkd5eMVBe ds38esKGVdu+CKi31KlYIkaCwCUQvzhl+smDqJM6AU6nJWZkjIbGn5Ka7XQLqopYTTSb tFSBAJLvA9hYh288rlDG+yCFel42ilAaKtPHrmPwn1FF9N2zfZGQVaR5t+Qh5ZjVktOg BBVPbySkjgHw0IR5oPC414k0VN00WCqVYDXPaGruK7uJ3MJVboyGibM/ZzW0AgeMtGF3 ZDYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=boK1pbwf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k30-20020a056a000d1e00b00627fc8871basi10999865pfv.351.2023.03.23.10.36.28; Thu, 23 Mar 2023 10:36:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=boK1pbwf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232344AbjCWRb2 (ORCPT + 99 others); Thu, 23 Mar 2023 13:31:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232088AbjCWRbW (ORCPT ); Thu, 23 Mar 2023 13:31:22 -0400 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F283274BF for ; Thu, 23 Mar 2023 10:31:14 -0700 (PDT) Received: by mail-pj1-x102b.google.com with SMTP id q102so7629714pjq.3 for ; Thu, 23 Mar 2023 10:31:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592673; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Q/zeFLtT5svFzGSOkobW0E5oP7EbYRFgi9o291n1fds=; b=boK1pbwfD/kYb4hq6aRa2l1YdEoUbvsvhKq6ynUQNzmwi7Jv/PhGDBu5Bx1f6HvNmn +khbFlnkQMzS1vnj/PR7JEto7gmj8WiTli3UEBDkSnzmGBO4IjkpU4y2asHr8V/a7iDS 94iajP4/4tBFsAcYJKwUUfFsYUkBQkDxkA1Io= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592673; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Q/zeFLtT5svFzGSOkobW0E5oP7EbYRFgi9o291n1fds=; b=VS/MNygZnCD+C2arGk3mLq4SkbJSa0p4FxcxNH0yravl+PPaIREoHPzEsBJRRSlzN2 pY3EiV0pa4O1EgZQhKgXenNEVcQZYh6z6g08BXJO6pf7STW3ZOraoKIL1Qc61jm3wwOr 2XDSR9liUkpheLyE7XWgAJzDAUgmReNd8fsn+h2BybHgrFCXidlPXfzB3BxjLiwAxtrM CtjmpADuCfBfbTDocj6UWf99lvNS01czBUNUgTq1QPd/BXMo6tYxJn7ZQD++um86Nnee 2Rvk8dhREYe3jGmM1z3D4p/GqpBio1Gbi4xLL7dw/U5hCL2v1ZGRPdYjszJ6dvEcf9UU y8OA== X-Gm-Message-State: AO0yUKXTsFG32DyK2rM6dbmJB7UVbfxApCSRgeKw5RvIoUhT4f3Td95f ZLqbF7iLE4XMgcrFO7fqr/1a8A== X-Received: by 2002:a05:6a20:4d92:b0:da:aaec:9455 with SMTP id gj18-20020a056a204d9200b000daaaec9455mr304246pzb.43.1679592673682; Thu, 23 Mar 2023 10:31:13 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:13 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 03/14] arm64: dts: sdm845: Rename qspi data12 as data23 Date: Thu, 23 Mar 2023 10:30:07 -0700 Message-Id: <20230323102605.3.I88528d037b7fda4e53a40f661be5ac61628691cd@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761180911122338051?= X-GMAIL-MSGID: =?utf-8?q?1761180911122338051?= There are 4 qspi data pins: data0, data1, data2, and data3. Currently we have a shared pin state for data0 and data1 (2 lane config) and a pin state for data2 and data3 (you'd enable both this and the 2 lane state for 4 lanes). The second state is obviously misnamed. Fix it. Fixes: e1ce853932b7 ("arm64: dts: qcom: sdm845: Add qspi (quad SPI) node") Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 479859bd8ab3..aafc7cc7edd8 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2763,7 +2763,7 @@ qspi_data01: qspi-data01-state { function = "qspi_data"; }; - qspi_data12: qspi-data12-state { + qspi_data23: qspi-data23-state { pins = "gpio93", "gpio94"; function = "qspi_data"; }; From patchwork Thu Mar 23 17:30:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74132 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3043248wrt; Thu, 23 Mar 2023 10:32:30 -0700 (PDT) X-Google-Smtp-Source: AK7set9o3zc0Ws5IpCEmiCey/c+vGYsDZIf33oH6x7jGfwb65Xn5lNg4uBmQrbWK364S1hE8/Xp+ X-Received: by 2002:a05:6a20:8925:b0:d3:89a1:76d1 with SMTP id i37-20020a056a20892500b000d389a176d1mr373038pzg.11.1679592750207; Thu, 23 Mar 2023 10:32:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679592750; cv=none; d=google.com; s=arc-20160816; b=Z7os/ZE/ySBkWmGn1/7rXB5H5h/ny68sMSWWp0GN/yfmNX0W+Sa/pLUtdYbvyOfsKH G7DMKrsXIf5hZ+4B/4kgiUioVBdjRZVoxCirCk8uIgXqrdMozbY0SYcoY369+uRCY/Yp xgFLcVBj5twT3XZ+cYU6yPE2+eZrxQGD7yckj+XslQqZjvO2G2VOOMNMJuqQCS9Ntutq DVEEzecWx0WxXtm/AI34JbahbY4o8Ikf2sE1KoKl6qnLJN+HmHEfXNe+fDenq3/+v8fM KpdSeZuCPnibmU6NDHNDltL2lGl+gc5q3DsFCM2K8D2igBQ9DbQcsOR2G2biglnENYB2 jTNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6kiM2lrh2kvgdALZI8OIkWyLB50SqdxAm52tOpr2esY=; b=d0WoYYogii4Mt72KmFvjR2ZbxiMFHswglJhNoQIm4r9g/Gi+lg8VXCZDdZq7/iWnBT eTbYIXFLcaNiRYJRh8s43K5VN9F/M6QJmC4JsGhNMpZs/7kqFEaYwE2m75I3mLQoiOAw NvWR6mVrfa1MRQ2UvpBNVIM1UMX1PzixU593xrAwBQ+AWBm5raJexycixJFKByV+MUd/ H7S8bQgmlqQt5gDHvQgL1t9eVTxlTsUiqQQkSZCNN84C9jFIH/gaFdsyRcab+xkM+pzq ij5iDnhlY2PGtQw6b93JpFpxqBgI/pCyTZazEi1HruSdpHgvieOrLRXe5Mk7k/pxCH+9 YZVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=HXiP72py; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y70-20020a62ce49000000b00623e3bcfbd2si18742670pfg.11.2023.03.23.10.32.09; Thu, 23 Mar 2023 10:32:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=HXiP72py; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232419AbjCWRbf (ORCPT + 99 others); Thu, 23 Mar 2023 13:31:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232242AbjCWRbX (ORCPT ); Thu, 23 Mar 2023 13:31:23 -0400 Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6342127D71 for ; Thu, 23 Mar 2023 10:31:17 -0700 (PDT) Received: by mail-pg1-x535.google.com with SMTP id y19so13011881pgk.5 for ; Thu, 23 Mar 2023 10:31:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592677; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6kiM2lrh2kvgdALZI8OIkWyLB50SqdxAm52tOpr2esY=; b=HXiP72pym+YYw/orvrMjuH/G76artp0TTfq7fhSlUPoJldbPdKxo3MqETM7XoMrCX/ 5MljJsHVpAL1rPPYKJFros7D3ckXNFp7LvANq7FzWMN8EXqeau3FUOkkmfu430yNwGtk rNzLOsjj27FpxdgtXZE5PmSLTxs0yAK+PEzT4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592677; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6kiM2lrh2kvgdALZI8OIkWyLB50SqdxAm52tOpr2esY=; b=ioSs/a0dPYhlnXF9Uv1y3ncwKPwF++P/2qQ18ht3kdrN5lFjga0diE8yKO8obpoiRF VbWRKcAEoEHnZP5F5iIKQRcxfAiDxRBf5fnbZaixbA+PZBR5K7ygzEqTEiAjBZJkJsDy g3SPXsnZdr0VUgo8if+XCfjHxriiahr9b588fZjjEj6ZsBM7+xXf+DPBJf+oOqeTc7pg 9/JnR/Bfgf5myDSNOk15kfa+/9FMREsXPYrTtG4392aO6x6Lwc8Ct6E7STKh6Req3QiQ JrEYT8dRLWakKEZUne+I6B4q/FmBCqBYTek8s+Vy3zChCH98pALQnPXpndv9i0BWI8XY 63Ew== X-Gm-Message-State: AAQBX9fT29zUwSsrJVvXtWV9KSwTMBfuw3AMglnrkWVZp70THNvphiHW CtPDXwrNQDOHeXK55AxI8TTCZQ== X-Received: by 2002:a62:8413:0:b0:624:d72e:e629 with SMTP id k19-20020a628413000000b00624d72ee629mr251075pfd.8.1679592676912; Thu, 23 Mar 2023 10:31:16 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:15 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 04/14] arm64: dts: qcom: sc7180: Annotate l13a on trogdor to always-on Date: Thu, 23 Mar 2023 10:30:08 -0700 Message-Id: <20230323102605.4.I9f47a8a53eacff6229711a827993792ceeb36971@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761180647924587143?= X-GMAIL-MSGID: =?utf-8?q?1761180647924587143?= The l13a rail on trogdor devices has always been intended to be always-on on both S0 and S3. Different trogdor variants use l13a in slightly different ways, but the overall theme is that it's a 1.8V rail that the board uses for things that it wants powered in on S0 and S3. On many boards this includes the boot SPI (AKA qspi). For all intents and purposes this patch is actually a no-op since something else in the system seems to already be keeping the rail on all the time (confirmed via multimeter). That "something else" was postulated to be the modem but the rail is on / stays on even without the modem/wifi coming up so it's likely the boot config. In any case, making the fact that this is always-on explicit seems like a good idea. Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 423630c4d02c..1f2e1f701761 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -512,6 +512,8 @@ pp1800_l13a: ldo13 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-initial-mode = ; + regulator-always-on; + regulator-boot-on; }; pp1800_prox: From patchwork Thu Mar 23 17:30:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74142 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3046008wrt; Thu, 23 Mar 2023 10:38:22 -0700 (PDT) X-Google-Smtp-Source: AK7set/5jy0ARkjmcJyhf3FU4cbN8rxLaqM6vhmskECzPPTrvLuzDo9CCVnIt9PozQc8agkyG9jB X-Received: by 2002:a17:90b:3b4b:b0:23a:ad68:25a7 with SMTP id ot11-20020a17090b3b4b00b0023aad6825a7mr8299519pjb.2.1679593102509; Thu, 23 Mar 2023 10:38:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679593102; cv=none; d=google.com; s=arc-20160816; b=TzCDMpq5/UhlzUfm05XgQKpqqJKRpQZUJijnL2J/7arCJVOceom8zNijO+KSVPwp8a JeCY/Ti0xpRA2bjkiEdytR06n/m8dc4qgx1reP6nqEXqahQHXGj93bM2/BJENGK020BU x6d/QHXKpnoWA4suUSIzfxB180EFFMc+c2mN7btGIqpWTm5ZakF3F2KWIi11a7lucPCd USnwwTSWosAaaf2W3otgi0I8p80UukGO2lXri35sv43L6M0IXXWh5BPddv1x/2tDYqmA Fw3g13LEQoefO2rAxqtH1cztjZ3JH6/HjVQilJZN9DJNGLNzM8PjXTJLzlTTn+gF0Lsw DRGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=axzKHWKEv5YVhGt7OnDPPiY6mPvXZ76IZmLOehTivRM=; b=DqqxYJCiVpynX6LeFhUE0UukpG+IC0+RXlu+YpzlBZl7GrqgAq54nDDb+VAxASezw0 HRIC64GLPUSy8Q6hAldydQZh12HE8Xy+2jeyxTpCug/xCzDsIExwPE3Z64Mbxnilzff6 5w6xusym5GmIDByQJNmr0G9x5ko9PKp5NHKiMQGQuoP+7oi3/VEJtsjaeQo1N0oCHUCM Gi6OyGqW+6WvIMmwkoqKKynFwZe8bTHHdDhWRXhf0posyhV/5TOz1uH2f4DoSOA4VZlj kG+FzL/4SfuDhkG9iMnYlTAAfsNBprp2RHkoyg6N6xl4jqc4js6cXwyUXbqTgi40Yo8Q N/AQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=Hr6ofu6o; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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Let's do that for spi-qcom-qspi. Signed-off-by: Douglas Anderson --- drivers/spi/spi-qcom-qspi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c index c334dfec4117..7851cf1986cc 100644 --- a/drivers/spi/spi-qcom-qspi.c +++ b/drivers/spi/spi-qcom-qspi.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -581,6 +582,8 @@ static int __maybe_unused qcom_qspi_runtime_suspend(struct device *dev) return ret; } + pinctrl_pm_select_sleep_state(dev); + return 0; } @@ -590,6 +593,8 @@ static int __maybe_unused qcom_qspi_runtime_resume(struct device *dev) struct qcom_qspi *ctrl = spi_master_get_devdata(master); int ret; + pinctrl_pm_select_default_state(dev); + ret = icc_enable(ctrl->icc_path_cpu_to_qspi); if (ret) { dev_err_ratelimited(ctrl->dev, "%s: ICC enable failed for cpu: %d\n", From patchwork Thu Mar 23 17:30:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74149 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3047012wrt; Thu, 23 Mar 2023 10:40:43 -0700 (PDT) X-Google-Smtp-Source: AK7set+r+cIom7ULHmCsczInrGEzzu9ItUGO5CI9TwMwZgmlQTKL7rjODBlzTD+iG8rlXkWA2ar7 X-Received: by 2002:a17:903:247:b0:19a:9880:175f with SMTP id j7-20020a170903024700b0019a9880175fmr8609954plh.51.1679593243602; Thu, 23 Mar 2023 10:40:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679593243; cv=none; d=google.com; s=arc-20160816; b=vjC09OJ67ag65Y2qKHAUXzkGKpPC0ev58A1aIN9IuO6r+9kyLFY250aZk/r9vHxpo/ AAoVok1fXOXJXp9KCukwRmu0CDxa3CKuCRzHfSSMfa8GEPTy6iCMwBvdUtl6wlMOdti2 zCBUixUz+JscoYK9Aq0tHvYVXXeTPmEgSgmszqbuD+67eRvhnX6i5qFdvV6bCUIexIMk 3PMbpP3MOWaPCJSLzwaLn9x90WKTFeaKEC9AxVEnFh19fgTvdh4DkvhZXDTU8JVvFj6K W4X5ZVld9UXuAV6KWLaGnlIfjQqOi6OJWDTke58jIc2p98wt+ZJHoUyUeOvAabs1Sk7g t+rA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=FoRlfx7CbmqnP3zURzbR63MNq645Q0jdEhms+74MeYc=; b=QRPTsVKWXKBdVbtIw0a24iyO79WQK4BY5O5YpYMbVQC3MSwuqb5q2gCXZiNcHPD/rm OIj9AMkIuEsMlIy/1FL+ApiqOg0Vt3o/r3vG+HKMhznuP2OI9tWqFhM0PcCs8GQW4pO7 hu1IxxC2+L0C7ormcPxFz/hCO3f36R+zbDSipuNEDkMECJA1JopaSBtdIGwmEl4To2Aj Af3y2ZmOBUvxl2wrLASGZW0nTzz+jXZNZawbbri6kdoWNv2xc4IZ0lqtcjkKswH3diil icS/WCqXUDZrnX3YwVXmfOW8Ydb2JJ0npNWJqZvLRsqgkKMEmo1forgu7mc73bHMzWE5 SbXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b="kAbV/I/7"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m7-20020a170902db0700b001a11cf69a5csi19144869plx.612.2023.03.23.10.40.30; Thu, 23 Mar 2023 10:40:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b="kAbV/I/7"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232475AbjCWRbn (ORCPT + 99 others); Thu, 23 Mar 2023 13:31:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232220AbjCWRb1 (ORCPT ); Thu, 23 Mar 2023 13:31:27 -0400 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F29743C0C for ; Thu, 23 Mar 2023 10:31:23 -0700 (PDT) Received: by mail-pj1-x102b.google.com with SMTP id mp3-20020a17090b190300b0023fcc8ce113so2650208pjb.4 for ; Thu, 23 Mar 2023 10:31:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592683; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FoRlfx7CbmqnP3zURzbR63MNq645Q0jdEhms+74MeYc=; b=kAbV/I/7xnERMCRUryA9uRdH+3r0Gbql1oICa8dpLQkpw3nzC30aFv0O2WVZhad+Rg z/5TPz2pe2fz4w0QwV2aTcCxsSSCzZRWT4Rb7+IXKwSWE25W9HVRgq2ygsxETUMA6Yeu 1bfWQmuHyrMczCGKRaLFy9bXJTz805huHOKHY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592683; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FoRlfx7CbmqnP3zURzbR63MNq645Q0jdEhms+74MeYc=; b=lk6xzfmOCVYqbMLdUIFxa1fL0Ok9nxuQ9b7Varu4xqXQNNHMC3zsIcz+9VI0/Z0IlN 7O0YxMTTeK478zZkObt8aNsBHMtcqoL9qW6OsFR+4rIMoDYnL88Fg1NcnjvA36IXeQVx SZFDCzMOBnMgIOFwytBVUVrUXRm+goBzLmz0abs+rx4dicqPiVwZ9+OoS5aHFLaSQeuG xVfmf0Vsc6uEy7T05wz3NNk2UmEDd1lJQpgSCaz0Dkn7VkBxPkfwTtl6OipsQgz56zqd kYfHafngaiQfEGchQRIMpbuT2qcMPQ+bcZMKN4q6+Q7CtuwrCmC55RCq1qOg3ym4mZHc kLQg== X-Gm-Message-State: AO0yUKV2zHAWPERqr10AX3HQaakHYPT8yVOXf/abpy05UcJ6y5c8Uzlm 8LI3rhH/Ghi3R3An1GlFUvrhQQ== X-Received: by 2002:a05:6a20:33a8:b0:d4:c605:4512 with SMTP id f40-20020a056a2033a800b000d4c6054512mr318424pzd.30.1679592683296; Thu, 23 Mar 2023 10:31:23 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:21 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 06/14] dt-bindings: pinctrl: qcom: tlmm should use output-disable, not input-enable Date: Thu, 23 Mar 2023 10:30:10 -0700 Message-Id: <20230323102605.6.I291ce0ba2c6ea80b341659c4f75a567a76dd7ca6@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761181164792566866?= X-GMAIL-MSGID: =?utf-8?q?1761181164792566866?= As evidenced by the Qualcomm TLMM Linux driver, the TLMM IP block in Qualcomm SoCs has a bit to enable/disable the output for a pin that's configured as a GPIO but _not_ a bit to enable/disable an input buffer. Current device trees that are specifying "input-enable" for pins managed by TLMM are either doing so needlessly or are using it to mean "output-disable". Presumably the current convention of using "input-enable" to mean "output-disable" stems from the fact that "output-disable" is a "new" property from 2017. It was introduced in commit 425562429d4f ("pinctrl: generic: Add output-enable property"). The "input-enable" handling in Qualcomm drivers is from 2015 introduced in commit 407f5e392f9c ("pinctrl: qcom: handle input-enable pinconf property"). Given that there's no other use for "input-enable" for TLMM, we can still handle old device trees in code, but let's encourage people to move to the proper / documented property by updating the bindings. Signed-off-by: Douglas Anderson Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/pinctrl/qcom,tlmm-common.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml index cb5ba1bd6f8d..5a815c199642 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml @@ -75,7 +75,8 @@ $defs: bias-pull-down: true bias-pull-up: true bias-disable: true - input-enable: true + input-enable: false + output-disable: true output-high: true output-low: true From patchwork Thu Mar 23 17:30:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74133 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3043400wrt; Thu, 23 Mar 2023 10:32:47 -0700 (PDT) X-Google-Smtp-Source: AK7set+duNReyC3hDmlGBD1Sqty/icwNGNh3q4pkBPBzI/KWmPSQBDoKZ6hyReNbRXvDSAT4ueOk X-Received: by 2002:a17:903:1c8:b0:1a1:ee8c:eeba with SMTP id e8-20020a17090301c800b001a1ee8ceebamr8843360plh.59.1679592767287; Thu, 23 Mar 2023 10:32:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679592767; cv=none; d=google.com; s=arc-20160816; b=sYzuCTwCk2raAUk0v/Vv+lPEkOQQDBi9hsAekZg3sly4twS9K34w7IGcPtJDwEr4J0 slfLknYNwjoYsZ58/pFuMgrBvHXWPyw612H4YeQo0SYmUhJ6ekoldJxTH3lDtmExnkzJ CJjp80cU4WqC48RmmTTsyC+wzhTqhKepxyMH896w9UYmLfm4NFa4HJtpkcZpR3FgtoGS nB5Mh3aK1vnTUnq0ojjB2vpPsohS/LiC3zTeNDSQOUu1h0qMDY8Ss8WymrFCzwXEcmzM qcy6+cv+wMrvZEQy+6vPyW9JPQIfUYGkOmrn52bpdzl8t14K3I8S8PI591Fqm2VSwxx/ Yc7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PrlHsI5Z/NNnOc1NjNfOu1jz21Q+M+e28AawYyOfx3M=; b=VgZShd+RKWpJP2eYWwy1fpI0aBfcJ7La9iKuzhyZ3s5YUPaLHW2rLbHsxJ8cF4l3h/ M9IHpnpLpvnuig2u43VXollXpdm6Hxswyk6tYwGbaWiqmLuIPGL7HG7gl/9h77E9YYHG ROWD+Ez68OoNXLhSERzQ3ED2Gq6mptGji0B697QfDehmX1cOeU5RC+OqIpnBSZXDufHe 47Op3PSSPrLdgeHzpG2EB6KULMMP6oI0m9fSFor7HdhZKhjiG/lB+x2YwVzQSw970CVn qDn6p8Aq4U/qgriC6RSJlQQ8B0fOF8rFK1+Ky6wQOgoLA9yQ/uDXRCu/Tm9If9SCPlUK dMDg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=edHQ2+I5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s4-20020a170902ea0400b00194bdcf1aafsi19675674plg.541.2023.03.23.10.32.27; Thu, 23 Mar 2023 10:32:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=edHQ2+I5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232503AbjCWRbt (ORCPT + 99 others); Thu, 23 Mar 2023 13:31:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232371AbjCWRb3 (ORCPT ); Thu, 23 Mar 2023 13:31:29 -0400 Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CC8D2B629 for ; Thu, 23 Mar 2023 10:31:26 -0700 (PDT) Received: by mail-pf1-x42c.google.com with SMTP id z11so13718475pfh.4 for ; Thu, 23 Mar 2023 10:31:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592686; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PrlHsI5Z/NNnOc1NjNfOu1jz21Q+M+e28AawYyOfx3M=; b=edHQ2+I5cm1iMvu/Yj4j6Xbo05S5NenSnnJ/8+XM+FqQ9x1iG7FiNzB4IqHhkdKkdy I7hNLoWg0LzzdN1YAC5hKBHtRdEq0ZUvRvp4YkxNHFhYoF36rHr7JoId7M/TCNQpSQj0 2YixmX4hf3itZ3gWw9KyqAqkg0eMTKQYXPTgU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592686; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PrlHsI5Z/NNnOc1NjNfOu1jz21Q+M+e28AawYyOfx3M=; b=yAuMTJK1alvZx9OwqmDguNdr2/0JSGMulMSbuG7AmExLpm2EBP3AiWr5lXbAG2Hygc brtwFlOvl7P4TirFaEHv9qlGBV3puQJ9nciEvtr2vUdzTaFL1QXAzkNW+FN51V2GLCHL wEPdhBSwGqhJL0ZEVr1K2jrMvJ6L5ORoOYBdlWKgXvBBMjcZp7WUul/gMTlFOOB84UXy 5FgDmvMFpPHxZ79QM8IwLweLCrX9NzsQBd2pqOmQF2UUv5Ls/WHQw7c8Wt+GQTdkLYha AlIpdzoPI9BbYQVL19KsegP+at7BbawrS8s9IYAMFRqt5pTKZ72W33gHGMczwmYSuKi8 FayQ== X-Gm-Message-State: AO0yUKWng/qpy6E8HKrYwODE+ATGavmhj/qLOx4tlCUeuT7ad+aJXMbb nAhgfjCIQYnP5bBir1UmLztNGQ== X-Received: by 2002:a62:1941:0:b0:5e2:434d:116b with SMTP id 62-20020a621941000000b005e2434d116bmr179799pfz.23.1679592685919; Thu, 23 Mar 2023 10:31:25 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:24 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 07/14] dt-bindings: pinctrl: qcom: Add output-enable Date: Thu, 23 Mar 2023 10:30:11 -0700 Message-Id: <20230323102605.7.I7874c00092115c45377c2a06f7f133356956686e@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761180665356540661?= X-GMAIL-MSGID: =?utf-8?q?1761180665356540661?= In the patch ("dt-bindings: pinctrl: qcom: tlmm should use output-disable, not input-enable") we allowed setting "output-disable" for TLMM pinctrl states. Let's also add "output-enable". At first blush this seems a needless thing to do. Specifically: - In Linux (and presumably any other OSes using the same device trees) the GPIO/pinctrl driver knows to automatically enable the output when a GPIO is changed to an output. Thus in most cases specifying "output-enable" is superfluous and should be avoided. - If we need to set a pin's default state we already have "output-high" and "output-low" and these properties already imply "output-enabled" (at least on the Linux Qualcomm TLMM driver). However, there is one instance where "output-enable" seems like it could be useful: sleep states. It's not uncommon to want to configure pins as inputs (with appropriate pulls) when the driver controlling them is in a low power state. Then we want the pins back to outputs when the driver wants things running normally. To accomplish this we'd want to be able to use "output-enable". Then the "default" state could have "output-enable" and the "sleep" state could have "output-disable". NOTE: in all instances I'm aware of, we'd only want to use "output-enable" on pins that are configured as "gpio". The Qualcomm documentation that I have access to says that "output-enable" only does something useful when in GPIO mode. Signed-off-by: Douglas Anderson Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml index 5a815c199642..90b7d75840c1 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml @@ -77,6 +77,7 @@ $defs: bias-disable: true input-enable: false output-disable: true + output-enable: true output-high: true output-low: true From patchwork Thu Mar 23 17:30:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74147 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3046434wrt; Thu, 23 Mar 2023 10:39:21 -0700 (PDT) X-Google-Smtp-Source: AK7set/HSOx7+yBIf+qCxbM1/xuXNbX/pFQRPWMfq9dH+uDr5sGOINqxBFTlaAslS7eM1H6OhToC X-Received: by 2002:a17:90b:3b44:b0:23f:1868:94fa with SMTP id ot4-20020a17090b3b4400b0023f186894famr8247010pjb.36.1679593161076; Thu, 23 Mar 2023 10:39:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679593161; cv=none; d=google.com; s=arc-20160816; b=QeUjMcHPMOuMhKshG+CCue73VRKckSKQhY6c1viSi4YkXEhJNCYRriLzvTuoAObKVO RR1U3jHkDvlWVTBPSlZ5ZCFZ8LgoSR+AHCyAiJtTvVzkFK+egPAMuwRL3m9vP8HG/g20 R9pcKO44dKR6hJnrwvesDX5OVMnIkOc8+i3UEmQd9S8NAUwinnfn3uQTriKz62hf3TPQ swcvfQghdmoA7dccxzR+z+V7GExpBAuOEYbVmotq/5AZzYsncswLYiHAQaxTFHoBe2g3 sCwXdlBnFxNZEp2WIl8CrAFZnXLcqL0gMEF5AfcCsSnCX61AUyx3o/nQ5IMwtFqJLZ96 jeWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ItXOwha8h+SsgLUIpHMGhHvifqAv9ElkC8GCOIPwlBw=; b=yJzIepLuKbkAnqBYp9aOvCEyPUhhg+v1hqJRGPqTgyLx7DSMaWqdsNLTZPiB4zvqRp myQydNZv2cmWPtyFMZ6iEsfxTLYHlc62M5hBSBiCRUR/5cbtxbqFnD8x3LCB6cDpEbmC aD6cibnYXquSEocwFAFv9Svd4ogaB0gFHABiQT1n3fhdPNfpCZKgpY05zpsE9H1BgsWr ezJR5qFiiShfNL2VeL0BIuzMPEpW8rwt5Q8hcZwvTA8XBi6HxaKI1pqovwgoI4joBXCm oFugE7rUybKWmxUUg/YOTi6QlmPYc3/0M5Jy2E4ISWGMh830f9vQ5CXucPQfqMb1HGAT oUhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=dlcfhiyu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e16-20020a17090301d000b001a20679d548si1293088plh.183.2023.03.23.10.39.09; Thu, 23 Mar 2023 10:39:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=dlcfhiyu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232533AbjCWRbz (ORCPT + 99 others); Thu, 23 Mar 2023 13:31:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232443AbjCWRbj (ORCPT ); Thu, 23 Mar 2023 13:31:39 -0400 Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FD292BF26 for ; Thu, 23 Mar 2023 10:31:28 -0700 (PDT) Received: by mail-pl1-x635.google.com with SMTP id o2so15580078plg.4 for ; Thu, 23 Mar 2023 10:31:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592688; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ItXOwha8h+SsgLUIpHMGhHvifqAv9ElkC8GCOIPwlBw=; b=dlcfhiyu360dY4oLMEki5fh68mVrzK1golDy+8Cl/tA1wIHUAz5UypP9RbEfsj/oPz Q192lYMSR1A2uPv9Q7Edridi1TOXxy/UISMuh1Q1qYdm+3okAQFuaxPQ4WJ3XTS9J1fj arFPfu9+Wy9gvejEE21dWL8FGSCl5kOrmFnEE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592688; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ItXOwha8h+SsgLUIpHMGhHvifqAv9ElkC8GCOIPwlBw=; b=NYZ+48jidcMFcxiWF0PLvXGLWGtL+ZeBVpqzSdgMUXhibpNda//4hy8+D9kELuEFeF IJZGOJnVEofwlJY9ZK2n3/lYfDRuvWSsV3CNAd1A72YehNXYsoruJxktBeKEpjfGdPGL rnYTn0GbJymPeh27Q5alqxy8AZLLXxw9js7jYLmMyUNYShSwy5euXr/SJeYcrQbgLCN/ BqxxfQQv7/Go7JI+56CLr0M0P6QQelaywrW0EdL/aJGJKtLel0UodXqPGXVSvL3rzl2Y EuPsHQVcFxo7VVCQxkJsaPelIqVl5F1gYw8l1y2Rnff2wrO6/edi9gAxs8cj96fzKj3F YC9A== X-Gm-Message-State: AO0yUKUREfoNL4Ylrfg3Ztkdlly6QI273VGnAUC0m/7mfYBAmUvoIq4m rV/QZC7ZVZ9R6i+JhMMG5plwhg== X-Received: by 2002:a05:6a20:8b82:b0:d9:7fcf:1076 with SMTP id m2-20020a056a208b8200b000d97fcf1076mr374864pzh.25.1679592687986; Thu, 23 Mar 2023 10:31:27 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:27 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 08/14] pinctrl: qcom: Support OUTPUT_ENABLE; deprecate INPUT_ENABLE Date: Thu, 23 Mar 2023 10:30:12 -0700 Message-Id: <20230323102605.8.Id740ae6a993f9313b58add6b10f6a92795d510d4@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761181078358709124?= X-GMAIL-MSGID: =?utf-8?q?1761181078358709124?= The Qualcomm pinctrl driver has been violating the documented meaning of PIN_CONFIG_INPUT_ENABLE. That documentation says: Note that this does not affect the pin's ability to drive output. ...yet the Qualcomm driver's sole action when asked to "enable input" on a pin is to disable its output. The Qualcomm driver's implementation stems from the fact that "output-disable" is a "new" property from 2017. It was introduced in commit 425562429d4f ("pinctrl: generic: Add output-enable property"). The "input-enable" handling in Qualcomm drivers is from 2015 introduced in commit 407f5e392f9c ("pinctrl: qcom: handle input-enable pinconf property"). Let's change the Qualcomm driver to move us in the right direction. As part of this: 1. We'll now support PIN_CONFIG_OUTPUT_ENABLE 2. We'll still support using PIN_CONFIG_INPUT_ENABLE to disable a pin's output (in violation of the docs) with a big comment in the code. This is needed because old device trees have "input-enable" in them and, in some cases, people might need the old behavior. While we could programmatically change all old device trees, it doesn't really hurt to keep supporting the old behavior and we're _supposed_ to try to be compatible with old device trees anyway. It can also be noted that the PIN_CONFIG_INPUT_ENABLE handling code seems to have purposefully ignored its argument. That means that old boards that had _either_ "input-disable" or "input-enable" in them would have had the effect of disabling a pin's output. While we could change this behavior, since we're only leaving the PIN_CONFIG_INPUT_ENABLE there for backward compatibility we might as well be fully backward compatible. NOTE: despite the fact that we'll still support PIN_CONFIG_INPUT_ENABLE for _setting_ config, we take it away from msm_config_group_get(). This appears to be only used for populating debugfs and fixing debugfs to "output enabled" where relevant instead of "input enabled" makes more sense and has more truthiness. Signed-off-by: Douglas Anderson Reviewed-by: Bjorn Andersson --- drivers/pinctrl/qcom/pinctrl-msm.c | 36 +++++++++++++++++++++++++----- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index daeb79a9a602..4515f375c5e8 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -323,6 +323,7 @@ static int msm_config_reg(struct msm_pinctrl *pctrl, break; case PIN_CONFIG_OUTPUT: case PIN_CONFIG_INPUT_ENABLE: + case PIN_CONFIG_OUTPUT_ENABLE: *bit = g->oe_bit; *mask = 1; break; @@ -414,11 +415,9 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev, val = msm_readl_io(pctrl, g); arg = !!(val & BIT(g->in_bit)); break; - case PIN_CONFIG_INPUT_ENABLE: - /* Pin is output */ - if (arg) + case PIN_CONFIG_OUTPUT_ENABLE: + if (!arg) return -EINVAL; - arg = 1; break; default: return -ENOTSUPP; @@ -502,9 +501,36 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev, arg = 1; break; case PIN_CONFIG_INPUT_ENABLE: - /* disable output */ + /* + * According to pinctrl documentation this should + * actually be a no-op. + * + * The docs are explicit that "this does not affect + * the pin's ability to drive output" but what we do + * here is to modify the output enable bit. Thus, to + * follow the docs we should remove that. + * + * The docs say that we should enable any relevant + * input buffer, but TLMM there is no input buffer that + * can be enabled/disabled. It's always on. + * + * The points above, explain why this _should_ be a + * no-op. However, for historical reasons and to + * support old device trees, we'll violate the docs + * still affect the output. + * + * It should further be noted that this old historical + * behavior actually overrides arg to 0. That means + * that "input-enable" and "input-disable" in a device + * tree would _both_ disable the output. We'll + * continue to preserve this behavior as well since + * we have no other use for this attribute. + */ arg = 0; break; + case PIN_CONFIG_OUTPUT_ENABLE: + arg = !!arg; + break; default: dev_err(pctrl->dev, "Unsupported config parameter: %x\n", param); From patchwork Thu Mar 23 17:30:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74146 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3046423wrt; Thu, 23 Mar 2023 10:39:19 -0700 (PDT) X-Google-Smtp-Source: AK7set/fhg0hEJJfr/u9+DtDt2lqP119AGkAKaVTExcX6gvMIRd5HTb8D1B4zJspGkvCSEdLEK92 X-Received: by 2002:a17:902:d413:b0:1a1:d366:b0a4 with SMTP id b19-20020a170902d41300b001a1d366b0a4mr6068395ple.51.1679593159421; Thu, 23 Mar 2023 10:39:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679593159; cv=none; d=google.com; s=arc-20160816; b=rpufWfhWZkrOzZd7pP3iIdqZsH6305uwHFLHFVkdZQ9rPYMhwWaPrafy1o7AHxP6eV IphXR4MeRbzwc/2A2BdLDHwrL0p7QaiKz7mWPZ29ehdyvWGYWipchzFjovhvxREnlgzq +wTye9CY+rhGiiWCDnVOPVcMjsTEamIh+vq247sDzl4A2RuCpRV25T4FMbWopmFQMC3z zK9qtTB/R3QklIR9g71eZyB7JKm6lIKRbHUnESdoP6+6SdGsVEfZGIxkw2Nh2zbQmHrV SQ0AaZYA+LskoyUwx9EuG8+yogfLmo1G1wU4/8b8qqaVaAn5ndhnmzOEWrS/FsMWB61J NpDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UzgVWFKkQG0YRgZ5w6TjXBTOfYthe0uzWRC1HMbAqOY=; b=DaDeMTkkxaz4vzSPeiriuENt28PkiuSfIf/i4V+oU5sUih5GoOTbquD9ss1uGN1h+q BmoRR1AotvxmpIPPDIwQ304WdeHDfahB4WWXmZtr7fO97lETjy0tXU/vQB9cdMhYby3S XHHMV3C22HBMqrz8my4iaAgD6vdEk3Y5eEatIVaRKUP5c0r0UFtUIQXcUg2fTzsbeZnK vYUL4w0FHf8zNaHfEY7gNRvF0p79WHHlkg/sCxdxvNuhrKS0JHXHKXNaVdZLRbdneaC9 CT4AxP2r9bwQQosPRpR51O8eBqUlZp89aemJUlAmH5wX4B9sKjTvYFlkrzLH1sTijFhg AhbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=X2o9knEs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a3-20020a170902ecc300b001a1e782c0c4si7115162plh.286.2023.03.23.10.39.07; Thu, 23 Mar 2023 10:39:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=X2o9knEs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232549AbjCWRcB (ORCPT + 99 others); Thu, 23 Mar 2023 13:32:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232460AbjCWRbl (ORCPT ); Thu, 23 Mar 2023 13:31:41 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2E3C305FA for ; Thu, 23 Mar 2023 10:31:30 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id fy10-20020a17090b020a00b0023b4bcf0727so2820790pjb.0 for ; Thu, 23 Mar 2023 10:31:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592690; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UzgVWFKkQG0YRgZ5w6TjXBTOfYthe0uzWRC1HMbAqOY=; b=X2o9knEsTKQQzx8gUX7pGP/FjrsVMIhOGp2uKJa+AGe9PxrgzMZdCJqPp5cq0yvbBt l4lRBlXZT14PG0qFzIEQO5xtDafKJHZhf9fTZfMAWHVFQJ932srFyL1blt+2uieb9QTl Nlq1T0lil2SQWsSAEJmaFlXjwl/k55JK9MK38= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592690; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UzgVWFKkQG0YRgZ5w6TjXBTOfYthe0uzWRC1HMbAqOY=; b=lPxhvKlPLvTnujbL9muH+8g2uWYDhsxlWQ3w4QbM7KIPTaUZRdorSuISkHiqcjPaN7 9YiYYJb9tW3vY7cdLc1mzh3cUP9IW/wsZuw6Sx7pWCBBOZ5aprGpVThSjl2wd+owqfj0 lOK5SzmTOwRHAzshIX3wmW+XdkrHMNg3Msj65TQtYY/w9hQCWiPlBrnx0c+/SNhBoNmw eGPNKdf8MR12LtrN1w2P0duN0NTUfdRo9KAipjN/5U4/KIOZEb9mHu7wFx+HBwleHNkH KIV/OB/DGC9ThPAglutk5cL88KGN1GhqjF7g7eCsSG7vdkUTvF9eHhHulJqvWvR9H75j 3Q6g== X-Gm-Message-State: AO0yUKUC6OxZiggDlrx7pM99Ef+APTnRfTZ8+SV7OAtQz7dyh+VThxvb LVkqthcDqjPcjeP/+01Ubf6/GlrI9TYyahwfXJI= X-Received: by 2002:a05:6a20:2d99:b0:d5:b3d1:bff9 with SMTP id bf25-20020a056a202d9900b000d5b3d1bff9mr250734pzb.52.1679592689791; Thu, 23 Mar 2023 10:31:29 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:29 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 09/14] arm64: dts: qcom: sc7180: Remove superfluous "input-enable"s from trogdor Date: Thu, 23 Mar 2023 10:30:13 -0700 Message-Id: <20230323102605.9.I94dbc53176e8adb0d7673b7feb2368e85418f938@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761181076788051073?= X-GMAIL-MSGID: =?utf-8?q?1761181076788051073?= As talked about in the patch ("dt-bindings: pinctrl: qcom: tlmm should use output-disable, not input-enable"), using "input-enable" in pinctrl states for Qualcomm TLMM pinctrl devices was either superfluous or there to disable a pin's output. Looking at trogdor: * ap_ec_int_l, fp_to_ap_irq_l, h1_ap_int_odl, p_sensor_int_l: Superfluous. The pins will be configured as inputs automatically by the Linux GPIO subsystem (presumably the reference for other OSes using these device trees). * bios_flash_wp_l: Superfluous. This pin is exposed to userspace through the kernel's GPIO API and will be configured automatically. That means that in none of the cases for trogdor did we need to change "input-enable" to "output-disable" and we can just remove these superfluous properties. Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 1f2e1f701761..39100b0c1140 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -1206,7 +1206,6 @@ amp_en: amp-en-state { ap_ec_int_l: ap-ec-int-l-state { pins = "gpio94"; function = "gpio"; - input-enable; bias-pull-up; }; @@ -1229,7 +1228,6 @@ ap_suspend_l_neuter: ap-suspend-l-neuter-state { bios_flash_wp_l: bios-flash-wp-l-state { pins = "gpio66"; function = "gpio"; - input-enable; bias-disable; }; @@ -1271,7 +1269,6 @@ fp_rst_l: fp-rst-l-state { fp_to_ap_irq_l: fp-to-ap-irq-l-state { pins = "gpio4"; function = "gpio"; - input-enable; /* Has external pullup */ bias-disable; @@ -1286,7 +1283,6 @@ fpmcu_boot0: fpmcu-boot0-state { h1_ap_int_odl: h1-ap-int-odl-state { pins = "gpio42"; function = "gpio"; - input-enable; bias-pull-up; }; @@ -1335,7 +1331,6 @@ pen_rst_odl: pen-rst-odl-state { p_sensor_int_l: p-sensor-int-l-state { pins = "gpio24"; function = "gpio"; - input-enable; /* Has external pullup */ bias-disable; From patchwork Thu Mar 23 17:30:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74138 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3045308wrt; Thu, 23 Mar 2023 10:36:46 -0700 (PDT) Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=clWzYxFd X-Google-Smtp-Source: AK7set+pNzDzEjTi7r42WV0RjHyiZBcpgAfyXkWUq3vNdTUCxgdNpiAh39+kb/z2tYKkHs84GQVO X-Received: by 2002:a17:90b:4c41:b0:23f:7e2e:fe13 with SMTP id np1-20020a17090b4c4100b0023f7e2efe13mr9317691pjb.0.1679593005831; Thu, 23 Mar 2023 10:36:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679593005; cv=none; d=google.com; s=arc-20160816; b=sdX9clM18uqvs/p/aPUtjKbU58mmIcvkK7YEz97FlPhiMcEqu1EmnbTv7HdUV0EBwK hIVIcy1HfegNAVi4K33CbEGWMaJS3ttlcuaHNJnBlCuimnKbUxTSmweE71fR2oO/FCj5 7JYE3HGAWaVdHajFO0YNNaS/Ur+0+1J1GF6t59BdXhoK8oJzLxOILh3vkBgkbV13PnET vCtIqQnXQG1lroSeAoPbEue78hENqkra6adn57ZNcTAJ8HLPnP/aZYPA2vLiXvdrIscS WmaTgM/XT4sNH57nVAJymsNhKx50sfaFu14NU5U8ajml4jZVViM8jxskxchyHK4olfLm iTpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Dc1zQxQOlxvSPv0A2NTnsyCSg5q98+XxyGONS3dAKvA=; b=aP1DqQE2RGyPGvaXGqjgUvoNt+y//L+CFqSglYWT9WaEDW9YFSPujxQSS3qRXFUHmE QpM3jWLAokn5eE2WoOwCr1SOF7Dadd3T0+G29d5KbnJwqOukkVB6t0v1DxJswMg+3ZU4 oLAC+BzIhfmGA+faI5LhkBzesJrK+GbPbc6XGIQMICTAQBvzVER5rSt8c94F39cPS3k0 KXbxqb+CIl50Xy3xfo4xyRaJi3fDQJBYnaKbSSPyUgrohKylXePsJXNHOOX1JE9Mr5Zn VUs/reZKtoiZByUN1SaAu1yF/OJpz33W2+bX8wvTWF4wcG9dUz/tNAiXJ+UDEi/OU6CF KCbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=clWzYxFd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a4-20020a17090a70c400b0023b32e93affsi2157956pjm.103.2023.03.23.10.36.31; Thu, 23 Mar 2023 10:36:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=clWzYxFd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232489AbjCWRcL (ORCPT + 99 others); Thu, 23 Mar 2023 13:32:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44184 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232487AbjCWRbs (ORCPT ); Thu, 23 Mar 2023 13:31:48 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C816199C5 for ; Thu, 23 Mar 2023 10:31:32 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id a16so17776120pjs.4 for ; Thu, 23 Mar 2023 10:31:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592691; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Dc1zQxQOlxvSPv0A2NTnsyCSg5q98+XxyGONS3dAKvA=; b=clWzYxFdbsjAMyeObdN7chgEUWdefpw8mMcFLIi5kA9IjVTr+S1coqTXXi0/7EQrwB kcu6xEE7wEMWUpgG3Dfkhz1MOlShemHzO13U4P4/GERa5IP3Dnr7OAFJmIqSaBdTd8VV 5Uor4aiKQsUtBQvZ/NclDLfD3Rx/Ip4/Gbj38= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592691; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Dc1zQxQOlxvSPv0A2NTnsyCSg5q98+XxyGONS3dAKvA=; b=2Mj6UaHcNgFccN4ZW8zjdDzL6awB+fd+LuEUa+fjFFJtjZjWVHJ5XNES80Xq0ESyiz YmgPc0pGFO+Beeo3XBl5TZGUmHTEzXtlyohvmI1CKyt0UO54cyP/BghSUPpjVIwtZaeL WyAvA4vnoZfDkARqmhRMALjMTa+a+zdeQCCY71niSXHQlUzQQ8yrvQBA1uo+uQ579hLI lMfVKec1e8N2Y43PNZEb3+yUnTQTy7VjVOptE3keCgOYAdadB9CL1/boNuzbhzGpiAA7 F7sbSSq4EtK1Ug7O4wCz0uuuMC0jhyv4JAyR0THNy6PeucCl7hg+gGeTmK0WiMFw6nDw +wAA== X-Gm-Message-State: AO0yUKVPyW3+C9XRzoBgkWIIZRTenr5Pa4H6oa1ucA9LVEsKJ4pvPok8 ilNdr7Y+rs5YG3s9UGycUdE00Q== X-Received: by 2002:a05:6a20:c109:b0:d8:997f:b21c with SMTP id bh9-20020a056a20c10900b000d8997fb21cmr309546pzb.27.1679592691735; Thu, 23 Mar 2023 10:31:31 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:31 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 10/14] arm64: dts: qcom: sc7280: Remove superfluous "input-enable"s from idp-ec-h1 Date: Thu, 23 Mar 2023 10:30:14 -0700 Message-Id: <20230323102605.10.I1343c20f4aaac8e2c1918b756f7ed66f6ceace9c@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761180915739436947?= X-GMAIL-MSGID: =?utf-8?q?1761180915739436947?= As talked about in the patch ("dt-bindings: pinctrl: qcom: tlmm should use output-disable, not input-enable"), using "input-enable" in pinctrl states for Qualcomm TLMM pinctrl devices was either superfluous or there to disable a pin's output. Looking at the sc7280-idp-ec-h1.dtsi file: * ap_ec_int_l, h1_ap_int_odl: Superfluous. The pins will be configured as inputs automatically by the Linux GPIO subsystem (presumably the reference for other OSes using these device trees). That means that in none of the cases for sc7280-idp-ec-h1.dtsi did we need to change "input-enable" to "output-disable" and we can just remove these superfluous properties. Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi index 3cfeb118d379..ebae545c587c 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi @@ -82,14 +82,12 @@ &tlmm { ap_ec_int_l: ap-ec-int-l-state { pins = "gpio18"; function = "gpio"; - input-enable; bias-pull-up; }; h1_ap_int_odl: h1-ap-int-odl-state { pins = "gpio104"; function = "gpio"; - input-enable; bias-pull-up; }; From patchwork Thu Mar 23 17:30:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74134 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3043694wrt; Thu, 23 Mar 2023 10:33:27 -0700 (PDT) X-Google-Smtp-Source: AK7set+wb+Rqvi6OEK/0O6w+4JFNmrbsP+lH1GhPK6vVl3Wde5EOs5ZVBE1/s4mUSziNjXlnRNeD X-Received: by 2002:a17:90a:305:b0:234:13a3:6e67 with SMTP id 5-20020a17090a030500b0023413a36e67mr9129175pje.12.1679592807538; Thu, 23 Mar 2023 10:33:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679592807; cv=none; d=google.com; s=arc-20160816; b=iTt9qii9wyCxrdw72R40ZY2G2sPn+/0WVuGN31jEqlhHnJB8ix9ZUNWjWJOTNjIGQG qpI3OnB8a1eVung18lt51rSknRHntTcLX5tBj7a3zCZK8JmGaFIarDpPE4aM8GArRA6/ U+dXmVyFuUZ3YVOp8Egq3L0Yroai1GprP2zfe3Hhua3fZnnlouRl7+EFo6qJC2/kH8zu +9ZzUwurm0ZP/vpcznhlA8QOz0IfYCC14GNU7QxthvatI6ImWkWf4I/Zzy4Dtp6mfCz3 pHCiUR6uFZPcwe03YKwAMgVDsukUo5f6atyiUdpZcZvTlM+ohk+dY07OjIkPxiKvtDul R9cg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e0GSudvBlA2ChvW+1tK19vXmBXB0gm+MldtIhXHWk80=; b=AOxi9Aum1oGwGbC4kcyIPtVswjWysZzTld5d4Gabk4Dy+uNArGzEmkL356vssyRRwZ S6nNxH9AeCAeiQs2weVpsTVEwQ3YdJO27ek2pC/8JTZe2bht6QiwP1chqaqXD1OCAJex y/KhXiAojXhUvfP1fAYT0k2f6RFBUgEGhzqwBNbUpj9UuQtRt9ZDOthMuj7AXQkB0ZMV Cr/+EmTeMDMfUNa0vKAV5b2fXshC3oZsgUWEvuO8v4nvtI0Rc6WKFpxoJ5QHAkjgbx42 RyA0wtYXJmIy1Tbh4LdayLHUYvhHGHQ9waKwmylDqFb9pnpzbaUQYikduwVB3/SzoxUL vQqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=f8MEMPhD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q4-20020a17090a9f4400b002340e454213si2164673pjv.190.2023.03.23.10.33.10; Thu, 23 Mar 2023 10:33:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=f8MEMPhD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232578AbjCWRcT (ORCPT + 99 others); Thu, 23 Mar 2023 13:32:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232514AbjCWRbu (ORCPT ); Thu, 23 Mar 2023 13:31:50 -0400 Received: from mail-pj1-x1036.google.com (mail-pj1-x1036.google.com [IPv6:2607:f8b0:4864:20::1036]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B02BA37554 for ; Thu, 23 Mar 2023 10:31:34 -0700 (PDT) Received: by mail-pj1-x1036.google.com with SMTP id d13so22158926pjh.0 for ; Thu, 23 Mar 2023 10:31:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592693; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e0GSudvBlA2ChvW+1tK19vXmBXB0gm+MldtIhXHWk80=; b=f8MEMPhDfzoFegAhp/wfBqbHVIsGQ736bOmKQD+YQO8hYiVarK1C43+BZhyvyHDqb2 qygRDuX5MFaxcnB+jTX/PyrCbyk3gwQ0pCf4mCgXPd54jUhyzslyhuPnUX3NjxMNenuD Vf4bdDfS4YeAdxNX5bBueM8Yuj7TfCR5AR4zM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592693; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e0GSudvBlA2ChvW+1tK19vXmBXB0gm+MldtIhXHWk80=; b=6Htk9QLiNiXShbg89ThpHi7Ew1ZJiJpoH9BKVsZ4jyc01TaRuzO7+9x5re8VcAWf5s Qb4Eh8fVrBOhN7cQ6Ylr+V7somiMjX0nkfGR9bHkLE6s4oIwnAMhzDkVInL3aLz1zrhv uKeFfrLGPo+M3B5r3bzOn6dGZBD57TADD+eniuQW1VMeItAUx5PvKhZZQQoI8dUKaf9O GYcfZxCnTVSBwJDARLCzIaOY7c6huHpkQeH1l4VhUNsX89ksFow5LebFqJgx3g4A1PWV +lCv+Ba/IpgFWKZ/jVTNy6BmMbNhxtZUc33freHZJFkJBgz/IbwPP+1+h9DPd+gx/yOc u0Cg== X-Gm-Message-State: AO0yUKXDX6aEGjndsW/FJclIsmsZNeQkeBcEf68kiRK20XH6IKSB8zTW 6ZxzfyNgmR0zPioFF81EdJQWoQ== X-Received: by 2002:a05:6a20:718a:b0:d9:a792:8e3d with SMTP id s10-20020a056a20718a00b000d9a7928e3dmr349987pzb.30.1679592693514; Thu, 23 Mar 2023 10:31:33 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:32 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 11/14] arm64: dts: qcom: sdm845: Remove superfluous "input-enable"s from cheza Date: Thu, 23 Mar 2023 10:30:15 -0700 Message-Id: <20230323102605.11.Ia439c29517b1c0625325a54387b047f099d16425@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761180707753936005?= X-GMAIL-MSGID: =?utf-8?q?1761180707753936005?= As talked about in the patch ("dt-bindings: pinctrl: qcom: tlmm should use output-disable, not input-enable"), using "input-enable" in pinctrl states for Qualcomm TLMM pinctrl devices was either superfluous or there to disable a pin's output. Looking at cheza * ec_ap_int_l, h1_ap_int_odl: Superfluous. The pins will be configured as inputs automatically by the Linux GPIO subsystem (presumably the reference for other OSes using these device trees). * bios_flash_wp_l: Superfluous. This pin is exposed to userspace through the kernel's GPIO API and will be configured automatically. That means that in none of the cases for cheza did we need to change "input-enable" to "output-disable" and we can just remove these superfluous properties. Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi index f2b48241d15c..588165ee74b3 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi @@ -1155,14 +1155,12 @@ ap_edp_bklten: ap-edp-bklten-state { bios_flash_wp_r_l: bios-flash-wp-r-l-state { pins = "gpio128"; function = "gpio"; - input-enable; bias-disable; }; ec_ap_int_l: ec-ap-int-l-state { pins = "gpio122"; function = "gpio"; - input-enable; bias-pull-up; }; @@ -1190,7 +1188,6 @@ en_pp3300_dx_edp: en-pp3300-dx-edp-state { h1_ap_int_odl: h1-ap-int-odl-state { pins = "gpio129"; function = "gpio"; - input-enable; bias-pull-up; }; From patchwork Thu Mar 23 17:30:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74145 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3046251wrt; Thu, 23 Mar 2023 10:38:55 -0700 (PDT) X-Google-Smtp-Source: AK7set9HftgdU4BRPbU0+gc71GDDCmCG/sqdS8KDUZbtzidPBKfHwHTQ/Eyb/zUq/uUBe9kMWA1n X-Received: by 2002:a17:90a:e7cd:b0:23d:35d9:d065 with SMTP id kb13-20020a17090ae7cd00b0023d35d9d065mr8116144pjb.48.1679593134998; Thu, 23 Mar 2023 10:38:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679593134; cv=none; d=google.com; s=arc-20160816; b=HzaxGHvR98UT4KgzWkvCEOBLD1ZNfV2GYESJwOpkHOu/ND+8Zml6ie5PgAYrjJPKqW 0B/+4XGv47exMtL8QpvX+sgmFS835rccCSWR4ZeycMpjQDvN7jLiMd1KWKRW57ul7Vru h26ySbW2+V0u8C7S3Gipp2lYj6NE2TZEA9d6Qu8Uazq/87yCBn91h5JDXM5UbUTQdWKG n8BMg9/Az6qhn/c1cOZ/w9hv8wv6NcygmT5z5zsfgNXad5lamZD2a5jKFZsdHaYxB3g6 Rg/lo5PBv248giQ0dooVFHte22xvw7XlwbB4nwtQThX/V3PEUALZ8JszJseG2RCRMpZ+ RUag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=j6LXKCEb3/BINodw1aD0uX0Oh1YqBoNeM7/LB28/UeE=; b=A9eGwC83HPQHIfcPAKIVrn6Sx3afv9y7BMXqiot+o7VNilWwSZBDJKv5xhZ509w/nc e2V/8jCv8jETArsxrgckmw4l6g0ZonTj0ATdS47dDLFl+tUIdSUwPbUPeVO3WgXDSLcv LBrv/M0pT8leehMr95TFjMnQhXjDxzCxL93dGiDhe4DZLQRGCYTCEg9GytgrPYrR0igs Jc/9Apkv3/+SgcegEkfsEfzQ371sphOjcSnMQVZRUQD3PuxQOoPU1E2bUHtt3+6U+JQ0 ttWaEv270DDSacCQbhKg6z4WmcOwFDFY6spp1F5KKEL3BZvpD/hyhcTIoLKhUKHOhN7z SN/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=NK9khFXd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ku14-20020a170903288e00b001a1f70cc7dbsi3770403plb.562.2023.03.23.10.38.35; Thu, 23 Mar 2023 10:38:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=NK9khFXd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232537AbjCWRcW (ORCPT + 99 others); Thu, 23 Mar 2023 13:32:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232279AbjCWRbv (ORCPT ); Thu, 23 Mar 2023 13:31:51 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBBCB36451 for ; Thu, 23 Mar 2023 10:31:35 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id h12-20020a17090aea8c00b0023d1311fab3so2793126pjz.1 for ; Thu, 23 Mar 2023 10:31:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592695; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=j6LXKCEb3/BINodw1aD0uX0Oh1YqBoNeM7/LB28/UeE=; b=NK9khFXdbhd8AKbccKVwlYyqpaZSoBXNzGIi3sVGUjFITXPQheAzihAZfIYb9p+oxb XUEpywwYq0mqN5UgRT4jN3CL+nDWq1ly1yWETTmghx9I7R6rh1PuH7RfMF66fg37AzoU FDVkOPpzOxlYJBbqQ9zCj6qxz0ADFmmhi3w5o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592695; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=j6LXKCEb3/BINodw1aD0uX0Oh1YqBoNeM7/LB28/UeE=; b=KR1tDelMC7I2pOVFo12OJ40RG/outl2Ry2j/zP50sPGY7zuPrrifReHtEVVNYQiFuL 21Tb7WI2vpZaNcafI3uxrc01H4VCsKLLaSrqJnZArO4XGyLXzJ1ab67j7AcMQI/uGQgJ fAcI4PQ+GdiDavJtjggOf0TY4KEo2Og/emVPaswKi8rsLmLttBfHCI4WSjl8R8bLnEq6 1LvA7Xh5aobD37iUo1vfU3/fBDt8DY0UMNMLCShfCXDnwlwtlud09kxApYqIlrUuEeAE wke5LVkUQRXzIh7PhD2kPyg5+xNWfEvtve46bwHvJ/BG+GX573XBECfo6xcy0LIpnPYz rDiQ== X-Gm-Message-State: AO0yUKWcRVJ4pUyA4a2vqYDdUZSQI0E0cz7KEymtdCpBDRMqy7U/AEWx XsDzfpoMV80mtSMGlfmi5meIng== X-Received: by 2002:a05:6a20:8b83:b0:da:5ab7:8ce9 with SMTP id m3-20020a056a208b8300b000da5ab78ce9mr271523pzh.22.1679592695237; Thu, 23 Mar 2023 10:31:35 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:34 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 12/14] arm64: dts: qcom: sc7180: Fix trogdor qspi pin config Date: Thu, 23 Mar 2023 10:30:16 -0700 Message-Id: <20230323102605.12.I6f03f86546e6ce9abb1d24fd9ece663c3a5b950c@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761181050993393545?= X-GMAIL-MSGID: =?utf-8?q?1761181050993393545?= In commit 7ec3e67307f8 ("arm64: dts: qcom: sc7180-trogdor: add initial trogdor and lazor dt") we specified the pull settings on the boot SPI (the qspi) data lines as pullups to "park" the lines. This seemed like the right thing to do, but I never really probed the lines to confirm. Since that time, I've done A LOT of research, experiements and poking of the lines with a voltmeter. A first batch of discoveries: - There is an external pullup on CS (clearly shown on schematics) - There are weak external pulldowns on CLK/MOSI (believed to be Cr50's internal pulldowns) - There is no pull on MISO. - When qspi isn't actively transferring it still drives CS, CLK, and MOSI. CS and MOSI are driven high and CLK is driven low. It does not drive MISO and (if no internal pulls are enabled) the line floats. The above means that it's good to have some sort of pull on MISO, at the very least. The pullup that we had before was actually fine (and my voltmeter confirms that it actually affected the state of the pin) but a pulldown would work equally well (and would match MOSI and CLK better). The above also means that we could save a tiny bit of power (not measurable by my setup) by setting up a sleep state for these pins. If nothing else this prevents us from driving high against Cr50's internal pulldown on MOSI. However, Qualcomm has also asserted in the past that it burns a little extra power to drive a pin, especially since these are configured with a slightly higher drive strength Let's fix all this. Since the external pulls are different for the two data lines, we'll split them into separate configs. Then we'll change the MISO pin to a pulldown and add a sleep state. On a slightly tangental (but not totally unrelated note), I also discovered some interesting things with these pins in suspend. First, I found that if we don't switch the pins to GPIO that the qspi peripheral continues to drive them in suspend. That'll be solved by what we're already doing above. Second, I found that something in the system suspend path (after Linux stops running) reconfigures these pins so that they don't have their normal pulls enabled but instead change to "keepers" (bias-bus-hold in DT speak). If a pin was floating before we entered suspend then it would stop floating. I found that I could manually pull a pin to a different level and then probe it and it would stay there. This is exactly keeper behavior. With the solution we have the switch to "keeper" doesn't matter too much but it's good to document. While talking about "keepers", it can also be noted that I found that the "keepers" on these pins were at least enough to win a fight against Cr50's internal pulls. That means it's best to make sure that the state of the pins are already correct before the mysterious transition to a keeper. Otherwise we'll burn (a small amount of) power in S3 via this fight. Luckily with the current solution we don't hit this case. NOTE: I've left "sc7180-idp" behavior totally alone in this patch. I didn't add a sleep state and I didn't change any pulls--I just adapted it to the fact that the data lines have separate configs. Qualcomm doesn't provide me with schematics for IDP and thus I don't actually know how the pulls are configured. Since this is just a development platform and worked well enough, it seems safer to leave it alone. Dependencies: - This patch has a hard dependency on ("pinctrl: qcom: Support OUTPUT_ENABLE; deprecate INPUT_ENABLE"). Something in the boot code seemed to have been confused and thought it needed to set the "OUTPUT ENABLE" bit for these pins even though it was using them as SPI. Thus if we don't honor the "output-disable" property we could end up driving the SPI pins while in sleep mode. - In general, it's probably best not to backport this to a kernel that doesn't have commit d21f4b7ffc22 ("pinctrl: qcom: Avoid glitching lines when we first mux to output"). That landed a while ago, but it's still good to be explicit in case someone was backporting. If we don't have that then there might be a glitch when we first switch over to GPIO before we disable the output. - This patch _doesn't_ really have any dependency on the qspi driver patch that supports setting the pinctrl sleep state--they can go in either order. If we define the sleep state and the driver never selects it that's fine. If the driver tries to select a sleep state that we don't define that's fine. Signed-off-by: Douglas Anderson --- v1 of this patch was ("arm64: dts: qcom: sc7180: Fix trogdor qspi pull direction") [1]. Since then, I've spent time running experiments where I tried lots of different combinations and then probed the GPIOs with a multimeter to figure out what's happening. As a result, it's now at the end of a somewhat larger series. I should note that I've removed the "Fixes" tag of this patch. While it still technically does "fix" the old behavior, the old behavior really wasn't terrible (a miniscule amount of extra power draw). It's probably not worth the risk that adding "Fixes" will cause it to get backported without the pinctrl support (see "Dependencies" in the patch description). [1] https://lore.kernel.org/r/20230213165743.1.I6f03f86546e6ce9abb1d24fd9ece663c3a5b950c@changeid arch/arm64/boot/dts/qcom/sc7180-idp.dts | 9 ++++-- arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 34 ++++++++++++++++---- arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++++-- 3 files changed, 40 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts index c3bdd3295c02..44c27b4eac45 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts @@ -354,7 +354,7 @@ &qfprom { &qspi { status = "okay"; pinctrl-names = "default"; - pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>; + pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, <&qspi_data1>; flash@0 { compatible = "jedec,spi-nor"; @@ -512,8 +512,11 @@ &qspi_cs0 { bias-disable; }; -&qspi_data01 { - /* High-Z when no transfers; nice to park the lines */ +&qspi_data0 { + bias-pull-up; +}; + +&qspi_data1 { bias-pull-up; }; diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 39100b0c1140..ca6920de7ea8 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -424,8 +424,9 @@ &qfprom { &qspi { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data01>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, <&qspi_data1>; + pinctrl-1 = <&qspi_sleep>; flash@0 { compatible = "jedec,spi-nor"; @@ -1046,17 +1047,20 @@ &pri_mi2s_mclk_active { }; &qspi_cs0 { - bias-disable; + bias-disable; /* External pullup */ }; &qspi_clk { drive-strength = <8>; - bias-disable; + bias-disable; /* Rely on Cr50 internal pulldown */ }; -&qspi_data01 { - /* High-Z when no transfers; nice to park the lines */ - bias-pull-up; +&qspi_data0 { + bias-disable; /* Rely on Cr50 internal pulldown */ +}; + +&qspi_data1 { + bias-pull-down; }; &qup_i2c2_default { @@ -1336,6 +1340,22 @@ p_sensor_int_l: p-sensor-int-l-state { bias-disable; }; + qspi_sleep: qspi-sleep-state { + pins = "gpio63", "gpio64", "gpio65", "gpio68"; + + /* + * When we're not actively transferring we want pins as GPIOs + * with output disabled so that the quad SPI IP block stops + * driving them. We rely on the normal pulls configured in + * the active state and don't redefine them here. Also note + * that we don't need the reverse (output-enable) in the + * normal mode since the "output-enable" only matters for + * GPIO function. + */ + function = "gpio"; + output-disable; + }; + qup_uart3_sleep: qup-uart3-sleep-state { cts-pins { /* diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index fe62ce516c4e..b2fcf0b58722 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1535,8 +1535,13 @@ qspi_cs1: qspi-cs1-state { function = "qspi_cs"; }; - qspi_data01: qspi-data01-state { - pins = "gpio64", "gpio65"; + qspi_data0: qspi-data0-state { + pins = "gpio64"; + function = "qspi_data"; + }; + + qspi_data1: qspi-data1-state { + pins = "gpio65"; function = "qspi_data"; }; From patchwork Thu Mar 23 17:30:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74143 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3046065wrt; Thu, 23 Mar 2023 10:38:30 -0700 (PDT) X-Google-Smtp-Source: AK7set8FVnbctXfN+cPU12I/RX7O570OXIJqtsn3YzBTSH5icJWQE3f+yBWklszinklAnR078Wgo X-Received: by 2002:a17:902:ea07:b0:1a1:9666:7a30 with SMTP id s7-20020a170902ea0700b001a196667a30mr9725170plg.54.1679593110111; Thu, 23 Mar 2023 10:38:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679593110; cv=none; d=google.com; s=arc-20160816; b=gt8GpuzfURaBBCpFL0zzPBa10ulV7KhnhJFMa2RG9sioEFeu5OR2Ok1bvXNJYqvhsk RYPUybo+o+o+yxJBS+jUVlBu0dnyOCXTI4hsDGKB3UGzcwFZVv73DedrzcJDfkKmUjRw /rt7JlXt5kH5rLLwCqqYiCm1rwiTzoq9Cw0YkKOwTAg01dT0bT3fCY51Fwzk8A6sLNb0 kAi2YQqgCyPCsXdzI0o1H9ddUT3gXKWB7rLhn2NhVOJZCCMxoc85Iq/p5hx+iUjKhMiF MX1weWjiP7bSLMUGpXEmWEP2/A0E59niubB+mSqzpd0Ut9vs6aKowg6qa4X24Rh6P9KY yYiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wRxHjat8O8FYtA1vS1Ehqi9VaQ+n7ssLGElmobuUyNk=; b=By672/pibdG4fqpGGP75YDg+kYhnsuwijCH/stCPI1SJDlahsDsRbAWfAYCCBseMSE 7NvIHge9St4oDbKbuBTxQYRXXqJ3oCLpwJnPckVcDZHJN+54Bll1jR8gzqHEaNZrzVbz u3+hGyaPHa6PYalotDzgWePuwMWdHd+Y8ZUGLQYptldIzgBPO5QQjemlhHM3uRiK6OcJ b8RVJjyS17R66zAaMyWv8dgedTOv56vDl76YyMEjBOteyd43CJN56v6BiUMYGArGiG2e VyC8ExEjb82y4C3Ussd9DNng8m6xkPG1wMbNK5bVJ3RrKTywupR+IFxVl8pTiCJGauEJ vGHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=U+4DEso+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id lc7-20020a170902fa8700b001a05347d092si17463816plb.642.2023.03.23.10.38.17; Thu, 23 Mar 2023 10:38:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=U+4DEso+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232596AbjCWRci (ORCPT + 99 others); Thu, 23 Mar 2023 13:32:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232479AbjCWRcI (ORCPT ); Thu, 23 Mar 2023 13:32:08 -0400 Received: from mail-pf1-x429.google.com (mail-pf1-x429.google.com [IPv6:2607:f8b0:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0BF623800E for ; Thu, 23 Mar 2023 10:31:38 -0700 (PDT) Received: by mail-pf1-x429.google.com with SMTP id i15so9704047pfo.8 for ; Thu, 23 Mar 2023 10:31:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592698; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wRxHjat8O8FYtA1vS1Ehqi9VaQ+n7ssLGElmobuUyNk=; b=U+4DEso+L/0m/PFXzT7CZpH9N8N0qk37EIGBUM9bYOrsWMIBtlO2tOyJBPL29QQwV4 GJhQjcoCRMUsexIHCQ/f996IhXXdiUupT4oHps+65XZzI28Yo9q9VrTbsycdovu6fpKs mujXI+2Hz+scgy06KyIdr+3MPES2iK719bDgk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592698; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wRxHjat8O8FYtA1vS1Ehqi9VaQ+n7ssLGElmobuUyNk=; b=2NNRyAXdVOnysJ9zpEiuRvccpqJOr5ASJwyo03qKHepI/6j+ZP2iiZ07W3B/miNyD3 iRad07N1QESh+o66B8b3E6Wrxo9/9YwohPJ3TR4ah7Rn7CEkrL2YcjxhnoJPx8TwEK/T R1CVaMCHTcJV4ovoV5eIKGxuXUwr9hRA2FTktsLLGp3X2oikelGFamO9DAnTRm3OOv08 UscYC0xL9aL4SzFAWwO6O+M5poABxuvmwyo1ZLSr8smFPsdpEdum9jRXcTLmqvR6WXYs pMC0FhKeUetcAWtHRSWPHURTeaynSbvOcHOpcaWUFPCEplftswETK84g610x0bxMA31y i4Sw== X-Gm-Message-State: AAQBX9crnQju6TnnLiT6ZdHe3KLGWQ65Rftptn8OsGU5E8jaPtwcScuv jNIsJ56zStrVxoJXQDux9MGoRw== X-Received: by 2002:a62:18c4:0:b0:619:53de:8880 with SMTP id 187-20020a6218c4000000b0061953de8880mr187692pfy.16.1679592697823; Thu, 23 Mar 2023 10:31:37 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:36 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 13/14] arm64: dts: qcom: sc7280: Fix qspi pin config Date: Thu, 23 Mar 2023 10:30:17 -0700 Message-Id: <20230323102605.13.Ib44c3e417c414a4227db8def75ded37ad368212c@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761181025203577106?= X-GMAIL-MSGID: =?utf-8?q?1761181025203577106?= Similar to sc7180 (see the patch ("arm64: dts: qcom: sc7180: Fix trogdor qspi pin config")), we should adjust the qspi pin config for sc7280. I won't re-describe all the research/arguments in the sc7180 patch here, but there are a few differences for sc7280 worth noting: 1. On herobrine the SPI flash (qspi) is wired up differently on the board. Rather than Cr50 and the AP being wired directly together, there's actually a mux that will _either_ connect the AP to the flash or Cr50 to the flash. This means that the internal pulls on Cr50 don't affect us and we should enable our own pulldowns. 2. On herobrine, EEs added an external pulldown on the MISO line. The argument in the schematic said that we added it (but not one on MOSI and CLK) because Cr50 already enabled pulldowns on MOSI and CLK. ...though, as per #1, those Cr50 pulldowns would only affect the line when the mux was swung to Cr50. The ironic result of #1 and #2 is that the external pulldowns on CLK/MISO/MOSI on herobrine are _exactly opposite_ of the ones on trogdor. 3. While I still don't have the actual exact schematics for all variants of IDP/CRD that were produced, I have some reference schematics that give me a belief of how the qspi is hooked up there. From this, I'm fairly certain that all of the older variants of IDP/CRD either have a pulldown on the CLK/MOSI/MISO lines (maybe through a direct connect to Cr50) or have no pull (in other words, they don't have a pullup). I'll go ahead and enable internal pulldowns on all the lines since that won't hurt to double-pull if there's an external pulldown and it's nice to have a pulldown if there's nothing external. Note that this only affects _older_ CRDs. Newer revs are considered "herobrine" (see the hoglin/zoglin device trees). 4. I didn't find the same strange "auto-switch-to-keeper" at suspend when probing on sc7280. Whatever pulls (or lack thereof) I left at suspend time seemed to persist into suspend. Signed-off-by: Douglas Anderson --- .../boot/dts/qcom/sc7280-chrome-common.dtsi | 25 +++++++++++++++++-- .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 14 +++++++---- arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 13 ++++++---- arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++-- 4 files changed, 47 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi index 16fb20369c01..f562e4d2b655 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi @@ -60,8 +60,9 @@ &pmk8350_pon { */ &qspi { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data01>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, <&qspi_data1>; + pinctrl-1 = <&qspi_sleep>; spi_flash: flash@0 { compatible = "jedec,spi-nor"; @@ -85,3 +86,23 @@ wifi-firmware { iommus = <&apps_smmu 0x1c02 0x1>; }; }; + +/* PINCTRL - chrome-common pinctrl */ + +&tlmm { + qspi_sleep: qspi-sleep-state { + pins = "gpio12", "gpio13", "gpio14", "gpio15"; + + /* + * When we're not actively transferring we want pins as GPIOs + * with output disabled so that the quad SPI IP block stops + * driving them. We rely on the normal pulls configured in + * the active state and don't redefine them here. Also note + * that we don't need the reverse (output-enable) in the + * normal mode since the "output-enable" only matters for + * GPIO function. + */ + function = "gpio"; + output-disable; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi index b6137816f2f3..e651f633341f 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -692,18 +692,22 @@ &pcie1_clkreq_n { }; &qspi_cs0 { - bias-disable; + bias-disable; /* External pullup */ drive-strength = <8>; }; &qspi_clk { - bias-disable; + bias-pull-down; /* No external pulls */ drive-strength = <8>; }; -&qspi_data01 { - /* High-Z when no transfers; nice to park the lines */ - bias-pull-up; +&qspi_data0 { + bias-pull-down; /* No external pulls */ + drive-strength = <8>; +}; + +&qspi_data1 { + bias-disable; /* External pulldown */ drive-strength = <8>; }; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 8b5293e7fd2a..6aaa77abc00b 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -636,16 +636,19 @@ &pcie1_clkreq_n { }; &qspi_cs0 { - bias-disable; + bias-disable; /* External pullup */ }; &qspi_clk { - bias-disable; + bias-pull-down; /* No external pulls or external pulldown */ }; -&qspi_data01 { - /* High-Z when no transfers; nice to park the lines */ - bias-pull-up; +&qspi_data0 { + bias-pull-down; /* No external pulls or external pulldown */ +}; + +&qspi_data1 { + bias-pull-down; /* No external pulls or external pulldown */ }; &qup_uart5_tx { diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 71e2e51c7c7f..b98994cc8616 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -4337,8 +4337,13 @@ qspi_cs1: qspi-cs1-state { function = "qspi_cs"; }; - qspi_data01: qspi-data01-state { - pins = "gpio12", "gpio13"; + qspi_data0: qspi-data0-state { + pins = "gpio12"; + function = "qspi_data"; + }; + + qspi_data1: qspi-data1-state { + pins = "gpio13"; function = "qspi_data"; }; From patchwork Thu Mar 23 17:30:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 74144 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp3046134wrt; Thu, 23 Mar 2023 10:38:38 -0700 (PDT) X-Google-Smtp-Source: AKy350ae8vSadqxv/WG2BE2/ntaZCOKvYBr1JI/DKRDNrPQ37jlkMMPNqEZY+eWg6yAEw1CvJlLc X-Received: by 2002:a17:902:da81:b0:1a1:f413:70c1 with SMTP id j1-20020a170902da8100b001a1f41370c1mr7733735plx.11.1679593118206; Thu, 23 Mar 2023 10:38:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679593118; cv=none; d=google.com; s=arc-20160816; b=S7UDzqn6zLWodoSZlP58QwpnD5YhnJbdTpeX7xdgSwh8o0Ike/oVRm55LGCjD0LuVl /haLu2f3NNH8vNDOQjTZ5m6VAu+saQGmc4cWoDRI2h7dCzaNtHYzt0lTSBAL8fvZCGFw mioVxNl1Db/mCeWcnk0ujciLOiqegwaunvfRmpuV2ryz88h9RsE0K8vIktjPGeFJwVLI 02s09oY0lyr3dm9hc84uMS9w73szdTCjfQH8QBvqY5Y9L7vSUKR+0o6Fe3jSi8HIcDjk dBmBLYb6Z6vDZbN03SDbQxb869l+h6U2zxdHxdx3wPo9akA2wG25VbbNqmXNdS4kWsg5 aP1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=atxXW/bb/Kha81+083F6Kw6bAgYeqNPEO1ABZE0wVDw=; b=jtV2gT/lMX6JWQxGvIUofyUx2xhdsSGWDGsju0swbdTyy15yH/B/GvwnWhO81v7//I WS6vBV/NTa8wgA9ghTMXPiOi2vyuDIvSYeOBbLbmqkDoxHal6CqyMgV/TkjUziCQ6//9 u20cEHJztaR+5jDxxkrsbKqIrNqV123R+hjIValQSJ0yI293T+QzT6lTn+hOXcCfjxDn qY9LWr/L0TeWR8Hzd3bKTAe/DFi2shFVDwBSkjvuLntXzw5Y1GDjbk7bk9PIPE1NL4YS LFgR1rc0k2AUoe1hxoBK1Lh7WgdpziqBT/6zpph6N5vNG2abmjJhK5//MFthF7CDe4hR TKKw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=P8BlZdRl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u12-20020a170902e5cc00b001a1cefdaa43si2029857plf.351.2023.03.23.10.38.25; Thu, 23 Mar 2023 10:38:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=P8BlZdRl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232571AbjCWRcs (ORCPT + 99 others); Thu, 23 Mar 2023 13:32:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232507AbjCWRcR (ORCPT ); Thu, 23 Mar 2023 13:32:17 -0400 Received: from mail-pg1-x531.google.com (mail-pg1-x531.google.com [IPv6:2607:f8b0:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1665E37703 for ; Thu, 23 Mar 2023 10:31:41 -0700 (PDT) Received: by mail-pg1-x531.google.com with SMTP id d10so13015524pgt.12 for ; Thu, 23 Mar 2023 10:31:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679592699; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=atxXW/bb/Kha81+083F6Kw6bAgYeqNPEO1ABZE0wVDw=; b=P8BlZdRlVK88iY7jAdBGyiIJ69nn1tyzqQCBr6btUu6Fv2jM5HvV+pUX6AtfzmXfJR 9/wUGRhjF1pCUzZPbLTZggyLHW2Ipo0RGRG9L2EkH2oDSwFogiPxCfZ6stRuN1ZVYV4X 6i+o1Y7RiUw+mj+LhDs3s0a2wEGLmwjZCTI4c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679592699; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=atxXW/bb/Kha81+083F6Kw6bAgYeqNPEO1ABZE0wVDw=; b=oLAGXL/U5O4jv4G6Kc5OYqoisEe/PsL4n/YJF6Cyf6w6hcls9hWWocsF1XPyK0dASd K9nPpw5of8pQjcmJcL0BWjNwW8wZj87tkRb0n6bY0FB4sAThtxzmV9GGqWUVsivR/tYD CQbo6k2RtGn1CxlLjkCXKiaW0L4vJr0NNOiF00morhy8Rp56hghQLHBIAutvE9Sm9PdN EP8UlOEX5NhftKbrDvmbXy7ddyDpYN7TQ2fr8GYS5K/NRAHILLpUKVVYKFja5gLocTos RoTSUwgzRycbZlM33Yja5alKTS05aEn15hdUndmz8D1I3VL4DQRVWsKWm6xf27EiZJsa wrMQ== X-Gm-Message-State: AAQBX9fcVTrmWtO1Vf6V7vBUN4YppuTeGHQnPdADzgfirQLcOco+XqxP xAvXgO0nQN82W/9tMt8/UobP4Q== X-Received: by 2002:a62:5254:0:b0:625:febb:bc25 with SMTP id g81-20020a625254000000b00625febbbc25mr239719pfb.11.1679592699617; Thu, 23 Mar 2023 10:31:39 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:16d3:ef20:206a:6521]) by smtp.gmail.com with ESMTPSA id x13-20020a62fb0d000000b0061a6f4c1b2bsm12613546pfm.171.2023.03.23.10.31.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Mar 2023 10:31:39 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Mark Brown , Linus Walleij Cc: Matthias Kaehlcke , Konrad Dybcio , linux-gpio@vger.kernel.org, Stephen Boyd , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, Douglas Anderson , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 14/14] arm64: dts: qcom: sdm845: Fix cheza qspi pin config Date: Thu, 23 Mar 2023 10:30:18 -0700 Message-Id: <20230323102605.14.I82951106ab8170f973a4c1c7d9b034655bbe2f60@changeid> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230323173019.3706069-1-dianders@chromium.org> References: <20230323173019.3706069-1-dianders@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761181033410359903?= X-GMAIL-MSGID: =?utf-8?q?1761181033410359903?= Cheza's SPI flash hookups (qspi) are exactly the same as trogdor's. Apply the same solution that's described in the patch ("arm64: dts: qcom: sc7180: Fix trogdor qspi pin config") Signed-off-by: Douglas Anderson --- I think cheza is only very lightly used today (it was never sold, but there are various people still using the dev boards) and I'm not personally setup to test this. It's fairly straightforward but has only been compile-tested. arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 34 +++++++++++++++++----- arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 ++++-- 2 files changed, 34 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi index 588165ee74b3..64ad8d1ed433 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi @@ -319,8 +319,9 @@ venus_mem: memory@96000000 { &qspi { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, <&qspi_data1>; + pinctrl-1 = <&qspi_sleep>; flash@0 { compatible = "jedec,spi-nor"; @@ -995,16 +996,19 @@ &wifi { /* PINCTRL - additions to nodes defined in sdm845.dtsi */ &qspi_cs0 { - bias-disable; + bias-disable; /* External pullup */ }; &qspi_clk { - bias-disable; + bias-disable; /* Rely on Cr50 internal pulldown */ }; -&qspi_data01 { - /* High-Z when no transfers; nice to park the lines */ - bias-pull-up; +&qspi_data0 { + bias-disable; /* Rely on Cr50 internal pulldown */ +}; + +&qspi_data1 { + bias-pull-down; }; &qup_i2c3_default { @@ -1233,6 +1237,22 @@ pen_rst_l: pen-rst-l-state { output-high; }; + qspi_sleep: qspi-sleep-state { + pins = "gpio90", "gpio91", "gpio92", "gpio95"; + + /* + * When we're not actively transferring we want pins as GPIOs + * with output disabled so that the quad SPI IP block stops + * driving them. We rely on the normal pulls configured in + * the active state and don't redefine them here. Also note + * that we don't need the reverse (output-enable) in the + * normal mode since the "output-enable" only matters for + * GPIO function. + */ + function = "gpio"; + output-disable; + }; + sdc2_clk: sdc2-clk-state { pins = "sdc2_clk"; bias-disable; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index aafc7cc7edd8..dce2cb29347b 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2758,8 +2758,13 @@ qspi_cs1: qspi-cs1-state { function = "qspi_cs"; }; - qspi_data01: qspi-data01-state { - pins = "gpio91", "gpio92"; + qspi_data0: qspi-data0-state { + pins = "gpio91"; + function = "qspi_data"; + }; + + qspi_data1: qspi-data1-state { + pins = "gpio92"; function = "qspi_data"; };