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Add the child node within IMEM for the boot stat region containing register address and compatible string. Signed-off-by: Souradeep Chowdhury --- .../devicetree/bindings/sram/qcom,imem.yaml | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml index 665c06e..c8c3890 100644 --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -48,6 +48,26 @@ patternProperties: $ref: /schemas/remoteproc/qcom,pil-info.yaml# description: Peripheral image loader relocation region + "^boot-stat@[0-9a-f]+$": + type: object + description: + node for boot stat. + + properties: + compatible: + items: + - const: qcom,imem-boot_stats + + reg: + maxItems: 1 + description: + The base address of the register region in case of + imem boot stats. + + required: + - compatible + - reg + required: - compatible - reg From patchwork Tue Mar 21 13:51:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Souradeep Chowdhury X-Patchwork-Id: 72879 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp1796630wrt; Tue, 21 Mar 2023 07:05:45 -0700 (PDT) X-Google-Smtp-Source: AK7set/TlYRm855bEo+4yV0Q7rVjgDmdEIKPalud/rYE9fGPKcZCOcg8w6nm5x2B5l3cl3B/YJ/D X-Received: by 2002:a05:6a20:7007:b0:d7:a352:ffa0 with SMTP id h7-20020a056a20700700b000d7a352ffa0mr1818916pza.62.1679407544846; Tue, 21 Mar 2023 07:05:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679407544; cv=none; d=google.com; s=arc-20160816; b=KIeD72avJp8GEMTW7O2WDPwS3+w6NYDyR8/Qj0mOzwckQ2kwSFKhuzAKcAr71bgb0b RHQiJst5awzqVGh76BpguvGxWxUVVXCy1jxNxdLDCdcQBgQ9Y48LSScKSgKHJ/1YEfKX 5LA1SjVrSR27yQxcUXU2cBx7fzWwQsHxQk4GkE+3P6bA/YT45tk3RCgGlJ/Q1Y8CRoEa th10ejbmTJwE4A2vi/2EDmM+YCa6CBXiQ1rP5gVku7eOFmRwq6KaAl0YFqqYqkM1DuWj IuAxANhauOAzNkMHG5evekRfKzjpFnzE0paqN3j9ZLj8k6kGz/+TYF4u+u+L/+IqHBhU B6AQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=0rmgemONNJfGZzVwQn3IfTQ2H6gFeJjA70ihHxeH6+o=; b=YzJFi3tTK0XCSH5KAplMA74wtGZ4c7nB1a0nWhHmYtQmMy3zRFWHRj4NFdtTPxJlv+ MFF9N5lAznEi510e8frE1PyMOFGpMks1DubIVAQcWqsdZPbeMex+3G2cfReHan8G41K8 gsT0tdELcWEE2WsGWG8AvrDC9F9xtsNQzKgZcepLb+4T2tIfOviItQtwFHBbM4H93f/C +tYR0q+/+1aRYwpDgn9ciCwBE/dDAVIeniwkA+QBwoIPc9EGpjRoozzF4NFewEqBmqbq TcV2NKMLiKJO3MiBz36/GH+QX9gjlCQmXLxn5r9FiWrFFmXet0hRaRmVuD4b23ahSEpb 0mKQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b="GSOdZsr/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Souradeep Chowdhury --- .../bindings/soc/qcom/qcom,mpm-sleep-counter.yaml | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,mpm-sleep-counter.yaml diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,mpm-sleep-counter.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,mpm-sleep-counter.yaml new file mode 100644 index 0000000..f9f46b7 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,mpm-sleep-counter.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,mpm-sleep-counter.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MPM Sleep Counter + +maintainers: + - Souradeep Chowdhury + +description: | + MPM(Module Power Manager) has a sleep counter which is used to track + various stages of the boot process in Qualcomm. + +properties: + compatible: + items: + - const: qcom,mpm2-sleep-counter + + reg: + items: + - description: MPM Sleep Counter Base + + clock-frequency: + description: Frequency for the sleep counter + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + mpm2-sleep-counter@c221000{ + compatible = "qcom,mpm2-sleep-counter"; + reg = <0xc221000 0x1000>; + clock-frequency = <32768>; + }; From patchwork Tue Mar 21 13:51:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Souradeep Chowdhury X-Patchwork-Id: 72886 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp1799969wrt; Tue, 21 Mar 2023 07:10:51 -0700 (PDT) X-Google-Smtp-Source: AK7set96m+vlirRsp90PF8vMlZTgsEC7UnbYnr2+xOLClJXqo+7DUFmgBLygyNsbdBlQ50H2UxTn X-Received: by 2002:a62:4ec9:0:b0:625:cf6d:b260 with SMTP id c192-20020a624ec9000000b00625cf6db260mr15674pfb.6.1679407851622; Tue, 21 Mar 2023 07:10:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679407851; cv=none; d=google.com; s=arc-20160816; b=Z6QHuEoLF2i9qaRMozAt3zZosN/Xb01AdJWEXjCb6j8sEDItfKgifFYmTVh4vYzrE6 fe8C5BCOWw8znAks4XR/Sl2KCgzL8WrMaxdhL7Ps5bNyinbVlUnWUzNS+OnlvnhLFXHA DGMfcPTKvv1+JW0eCRJeGnQab7LS5EIrRYTnkEsY7Ho+hDOPXnb86Z2WFDlnK3bhNj6p pl9x3TL2S1L2fXmTXeR4iq3UKn1DjH5ZyS9t0XX7bUOjYlgxfqpoYQHPsSg2Zl2JD4Fj WMFmlsnNXIShCgPg6TYnjYkZX9+gmuB48J8fuKYzlwacF2X0VtMU0ZbNAdzm549iCcGv m7qA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=U8UOMbDwFI06IsZqUd4WADb+CIUPSSIb2pfTfxi6t7s=; b=d8mP+j5Mu+DTZ4LOkZYfOe04+CwJ5mrj+q3LH5I8i3DD52ohZfTifPOHNP0vfbq5Gj OFyPPrnxUzyTilXQBmQBIM2pCSAhoOqJAeM5NxAldK5tC6T17GWtMhdCzdmo++8h0kFU U7ptb4bd5TlnOiyaYMc+UtSpXFSj7jmL0eRHunwEEoJp2IrrR73wzlb6Uy8dGAN85shL xPPssPxwWpnSdDgwQKaWfdGz5sGsr6/CI0RS3nJWJU8LAb+7tf+fhBD6FCmOT/OhL1BG U6wAjh6g9uH+VO2uqRj6EZx/sPOrtDiGZbfoRS07t9wb1C7raUxuVv6vhID3BWq51Zjh k6UA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=ccB9Tttk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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This information is captured in a specific format by this driver by mapping a structure to the IMEM memory region and then accessing the members of the structure to print the information. This information is useful in verifying if the existing boot KPIs have regressed or not. A sample log in SM8450(waipio) device is as follows:- KPI: Pre ABL Time = 3s KPI: ABL Time = 14s KPI: Kernel MPM timestamp = 890206 The Module Power Manager(MPM) sleep counter starts ticking at the PBL stage and the timestamp generated by the sleep counter is logged by the Qualcomm proprietary bootloader(ABL) at two points-> First when it starts execution which is logged here as "Pre ABL Time" and the second when it is about to load the kernel logged as "ABL Time". Both are logged in the unit of seconds. The current kernel timestamp is printed by the boot_stats driver as well. Signed-off-by: Souradeep Chowdhury --- drivers/soc/qcom/Kconfig | 7 +++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/boot_stats.c | 108 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 116 insertions(+) create mode 100644 drivers/soc/qcom/boot_stats.c -- 2.7.4 diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index d11bda2..2cfdbb7 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -79,6 +79,13 @@ config QCOM_DCC driver provides interface to configure DCC block and read back captured data from DCC's internal SRAM. +config QCOM_BOOTSTAT + tristate "Qualcomm Technologies, Boot Stat driver" + depends on ARCH_QCOM || COMPILE_TEST + help + This option enables driver for boot stats. Boot stat driver prints + the kernel bootloader information by accessing the imem region. + config QCOM_KRYO_L2_ACCESSORS bool depends on ARCH_QCOM && ARM64 || COMPILE_TEST diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 3b92c6c..e9b1e52 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -5,6 +5,7 @@ obj-$(CONFIG_QCOM_GENI_SE) += qcom-geni-se.o obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o obj-$(CONFIG_QCOM_CPR) += cpr.o obj-$(CONFIG_QCOM_DCC) += dcc.o +obj-$(CONFIG_QCOM_BOOTSTAT) += boot_stats.o obj-$(CONFIG_QCOM_GSBI) += qcom_gsbi.o obj-$(CONFIG_QCOM_MDT_LOADER) += mdt_loader.o obj-$(CONFIG_QCOM_OCMEM) += ocmem.o diff --git a/drivers/soc/qcom/boot_stats.c b/drivers/soc/qcom/boot_stats.c new file mode 100644 index 0000000..59b5ab6 --- /dev/null +++ b/drivers/soc/qcom/boot_stats.c @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2013-2019, 2021 The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/** + * struct boot_stats - timestamp information related to boot stats + * @bootloader_start: Time for the starting point of the abl bootloader + * @bootloader_end: Time when the kernel starts loading from abl bootloader + */ +struct boot_stats { + u32 bootloader_start; + u32 bootloader_end; +} __packed; + +static struct boot_stats __iomem *boot_stats; +static void __iomem *mpm_counter_base; +static u32 mpm_counter_freq; + +static int mpm_parse_dt(void) +{ + struct device_node *np_imem, *np_mpm2; + + np_imem = of_find_compatible_node(NULL, NULL, + "qcom,imem-boot_stats"); + if (!np_imem) { + pr_err("can't find qcom,imem node\n"); + return -ENODEV; + } + boot_stats = of_iomap(np_imem, 0); + if (!boot_stats) { + pr_err("boot_stats: Can't map imem\n"); + goto err1; + } + + np_mpm2 = of_find_compatible_node(NULL, NULL, + "qcom,mpm2-sleep-counter"); + if (!np_mpm2) { + pr_err("mpm_counter: can't find DT node\n"); + goto err2; + } + + if (of_property_read_u32(np_mpm2, "clock-frequency", &mpm_counter_freq)) + goto err2; + + if (of_get_address(np_mpm2, 0, NULL, NULL)) { + mpm_counter_base = of_iomap(np_mpm2, 0); + if (!mpm_counter_base) { + pr_err("mpm_counter: can't map counter base\n"); + goto err2; + } + } else { + goto err2; + } + + return 0; + +err2: + of_node_put(np_mpm2); +err1: + of_node_put(np_imem); + return -ENODEV; +} + +static void print_boot_stats(void) +{ + u32 pre_abl_time = readl_relaxed(&boot_stats->bootloader_start) / mpm_counter_freq; + u32 abl_time = readl_relaxed(&boot_stats->bootloader_end) / mpm_counter_freq; + + pr_info("KPI: Pre ABL Time = %us\n", pre_abl_time); + pr_info("KPI: ABL Time = %us\n", abl_time); + pr_info("KPI: Kernel MPM timestamp = %u\n", readl_relaxed(mpm_counter_base)); +} + +static int __init boot_stats_init(void) +{ + int ret; + + ret = mpm_parse_dt(); + if (ret < 0) + return -ENODEV; + + print_boot_stats(); + + iounmap(boot_stats); + iounmap(mpm_counter_base); + + return 0; +} +module_init(boot_stats_init); + +static void __exit boot_stats_exit(void) +{ +} +module_exit(boot_stats_exit) + +MODULE_DESCRIPTION("Qualcomm Technologies Inc. Boot Stat driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Mar 21 13:51:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Souradeep Chowdhury X-Patchwork-Id: 72880 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp1797583wrt; Tue, 21 Mar 2023 07:07:12 -0700 (PDT) X-Google-Smtp-Source: AK7set9+6QDq2Rf1UIyboFR3qTc8cRxe9EeN9rA3MTmOpUwcj+g+1hEM3yf8sqmhtz7UAv3WL9iT X-Received: by 2002:a92:c80c:0:b0:323:1869:15a3 with SMTP id v12-20020a92c80c000000b00323186915a3mr1691647iln.8.1679407632103; Tue, 21 Mar 2023 07:07:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679407632; cv=none; d=google.com; s=arc-20160816; b=C+Zoj4RESUMcVq3S3XOIvNyu2LMi8OWxGdpPuL7w4EB3SrQxnEnF5+FYzDhdy9vLs5 eAaoivIxrn7F2JsLRVN3zTh/LQ6mhRGReabVNX+lEMXA/vJbPvTXKFjV4OGJf3gy16JF mjYtej7KyCrZ20tvi4j9plyaepjpYxOk//BU9r1/gNoHtxqdsuclXHz9VlliTm5/QKRe G4nhZsWEUX8zeDbRPw5EYJ5SN1nL+P+j1DSFd/whWtNQA/rrM2xH+XolikElc9Pjel1P M7KcqVblofE3c3yosfdFrkqAcxI79WjV0QE6RA6MV8+c9gEF0hAURzuZgdzvojyIVWmi o1mQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=GlbQ6R7BvqzcBCmdNU07/9LL8nz61k8DP3MPvKU1WtM=; b=BB+GqPckBp4Q6UfVki++kbFDMAi/8gkec+wH3JTNkqp2jX2q4sJzxKRUnPyUX9/LB3 ZHCbBHjepXta7I/MLVcEs60B+QQZ0AgLCwP3CATlS6YXMP1fs2Rnu+ex/hN1BY788O06 TkLEdjE7SywzgzcqACycHBvYypLR4SevKSfSgnKLGLJYFy8WaBxcV0ztEufhMxbTT7R+ nPC8mC/2gvnjvCzOqTehuK7B+YUWMsOKfDzFp6UzxPAhN2sS/CYWufu9O89fKN8oibfQ AfxrnJwIqQRu9WxgptZPENFahW6TJLXQ3RPgWbTsx1rK9ROb/RQ+KZfY9z3A6kLxUR4w HE2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=JsYzteUg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Souradeep Chowdhury --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index f2c3d47..6a55577 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17071,6 +17071,13 @@ L: netdev@vger.kernel.org S: Supported F: drivers/net/ipa/ +QCOM BOOT_STATS DRIVER +M: Souradeep Chowdhury +L: linux-arm-msm@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/soc/qcom/qcom,mpm-sleep-counter.yaml +F: drivers/soc/qcom/boot_stats.c + QEMU MACHINE EMULATOR AND VIRTUALIZER SUPPORT M: Gabriel Somlo M: "Michael S. Tsirkin"