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Signed-off-by: Harini Katakam Signed-off-by: Michal Simek Signed-off-by: Radhey Shyam Pandey --- v2: Handle operation using a single write as suggested by Cladiu drivers/net/ethernet/cadence/macb.h | 4 ++++ drivers/net/ethernet/cadence/macb_main.c | 15 +++++++++++++-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index 9c410f93a103..1aa578c1ca4a 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -95,6 +95,8 @@ #define GEM_SA4B 0x00A0 /* Specific4 Bottom */ #define GEM_SA4T 0x00A4 /* Specific4 Top */ #define GEM_WOL 0x00b8 /* Wake on LAN */ +#define GEM_RXPTPUNI 0x00D4 /* PTP RX Unicast address */ +#define GEM_TXPTPUNI 0x00D8 /* PTP TX Unicast address */ #define GEM_EFTSH 0x00e8 /* PTP Event Frame Transmitted Seconds Register 47:32 */ #define GEM_EFRSH 0x00ec /* PTP Event Frame Received Seconds Register 47:32 */ #define GEM_PEFTSH 0x00f0 /* PTP Peer Event Frame Transmitted Seconds Register 47:32 */ @@ -245,6 +247,8 @@ #define MACB_TZQ_OFFSET 12 /* Transmit zero quantum pause frame */ #define MACB_TZQ_SIZE 1 #define MACB_SRTSM_OFFSET 15 /* Store Receive Timestamp to Memory */ +#define MACB_PTPUNI_OFFSET 20 /* PTP Unicast packet enable */ +#define MACB_PTPUNI_SIZE 1 #define MACB_OSSMODE_OFFSET 24 /* Enable One Step Synchro Mode */ #define MACB_OSSMODE_SIZE 1 #define MACB_MIIONRGMII_OFFSET 28 /* MII Usage on RGMII Interface */ diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 51c9fd6f68a4..4c2c82573399 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -288,6 +288,13 @@ static void macb_set_hwaddr(struct macb *bp) top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); macb_or_gem_writel(bp, SA1T, top); +#ifdef CONFIG_MACB_USE_HWSTAMP + if (gem_has_ptp(bp)) { + gem_writel(bp, RXPTPUNI, bottom); + gem_writel(bp, TXPTPUNI, bottom); + } +#endif + /* Clear unused address register sets */ macb_or_gem_writel(bp, SA2B, 0); macb_or_gem_writel(bp, SA2T, 0); @@ -721,8 +728,12 @@ static void macb_mac_link_up(struct phylink_config *config, spin_unlock_irqrestore(&bp->lock, flags); - /* Enable Rx and Tx */ - macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(RE) | MACB_BIT(TE)); + /* Enable Rx and Tx; Enable PTP unicast */ + ctrl = macb_readl(bp, NCR); + if (IS_ENABLED(CONFIG_MACB_USE_HWSTAMP) && gem_has_ptp(bp)) + ctrl |= MACB_BIT(PTPUNI); + + macb_writel(bp, NCR, ctrl | MACB_BIT(RE) | MACB_BIT(TE)); netif_tx_wake_all_queues(ndev); } From patchwork Tue Mar 21 12:38:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harini Katakam X-Patchwork-Id: 72851 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp1753549wrt; Tue, 21 Mar 2023 05:46:17 -0700 (PDT) X-Google-Smtp-Source: AK7set8eZf3mMLKxz55b5D9xfv2BtEjmwG/xmyqibrccm9gUZXfRIac2YgvzTEjdc+LjbqMR2heh X-Received: by 2002:a05:6a20:2e0a:b0:d4:a361:fd3 with SMTP id be10-20020a056a202e0a00b000d4a3610fd3mr1745276pzb.58.1679402777502; Tue, 21 Mar 2023 05:46:17 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1679402777; cv=pass; d=google.com; s=arc-20160816; b=bcu4ty2xpLFaGDr41VXwO6H82rqvte6MgyoAh+SFwTJX87cpOqHbcyWuGbfSjlKEgX hZNmsr7v8+SBwqM8xk7ncAQG7c3amiZWDh+hSUWPurVgx/X0Ww/r9+ZXfbXMlmRZ6rjh GxepQ+MmwwzFesMmCPdm/MSEkXe+iRUUXIrQnwHJfuii9BykyoBAYYFb8yLR+v0Z9C/N pLpLaQCBHIylq5Q2qsIPXxvDqGy5NK6UeyJSYhWFBT02iZziHYLhjxZAzmzENSJCJCrr pq3MnPeROn+zHcr9P6DDV2odTq+ZizdYJcF0j9bCdaw/QRo5g+mGRj1fsDr+xU2szFSp uwzw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=6WEEhg49v3+3iROgDmHgjFTD2ZPMS3r+TroKLngfkCs=; b=ACw/+ATHQZ/0tp4suPo1PQx5sREFBidaSdw0vZZeMA+RGDJQLN6uUrlf8huKrC7Tae Pz12J9lzm+fPpxODthDp5NmkCo+sh2dr6dXnLRFUSlW9kCrhvOsN1iRj4IlU6nXD17GR hsdusoTq7xM09TyBY/UJ8KbPCtPhpfHRBGLpYWk/Edeyau1APhwaljaZDOYHkUMCeVfm qLz81mmXDiy1h6j0tOOEPUzyvv/yqfrQf7aSBSymcL/PzRtdWju4ECGM67mTgVYlGyzJ lNg/6ALyYyI3vtGwVGcj2jzLl7l8BSMUt7iYhYwtvo9wvictT6z1n1noecYsApxeCyl6 iyYg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=E7VpHyKj; arc=pass (i=1); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Mar 2023 12:38:51.4104 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0aa76614-85d6-4507-6f8f-08db2a0939c0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C97D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8403 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760981446757317883?= X-GMAIL-MSGID: =?utf-8?q?1760981446757317883?= From: Harini Katakam The seconds input from BD (6 bits) just needs to be ORed with the upper bits from timer in this function. Avoid addition operation every single time. Seconds rollover handling is left untouched. Signed-off-by: Harini Katakam Signed-off-by: Michal Simek Signed-off-by: Radhey Shyam Pandey --- v2: - Update HW timestamp logic to remove sec_rollover variable as per Cladiu's comment - Remove Richard Cochran's ACK on original patch as the patch changed drivers/net/ethernet/cadence/macb_ptp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_ptp.c b/drivers/net/ethernet/cadence/macb_ptp.c index e6cb20aaa76a..f9db4501b995 100644 --- a/drivers/net/ethernet/cadence/macb_ptp.c +++ b/drivers/net/ethernet/cadence/macb_ptp.c @@ -258,6 +258,8 @@ static int gem_hw_timestamp(struct macb *bp, u32 dma_desc_ts_1, */ gem_tsu_get_time(&bp->ptp_clock_info, &tsu, NULL); + ts->tv_sec |= ((~GEM_DMA_SEC_MASK) & tsu.tv_sec); + /* If the top bit is set in the timestamp, * but not in 1588 timer, it has rolled over, * so subtract max size @@ -266,8 +268,6 @@ static int gem_hw_timestamp(struct macb *bp, u32 dma_desc_ts_1, !(tsu.tv_sec & (GEM_DMA_SEC_TOP >> 1))) ts->tv_sec -= GEM_DMA_SEC_TOP; - ts->tv_sec += ((~GEM_DMA_SEC_MASK) & tsu.tv_sec); - return 0; }