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[2620:137:e000::1:20]) by mx.google.com with ESMTP id w10-20020a17090a780a00b0023adb22068csi1529518pjk.81.2023.03.17.01.03.34; Fri, 17 Mar 2023 01:03:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=BMrRa34V; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230365AbjCQHvo (ORCPT + 99 others); Fri, 17 Mar 2023 03:51:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230322AbjCQHvh (ORCPT ); Fri, 17 Mar 2023 03:51:37 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2BF38C0D6; Fri, 17 Mar 2023 00:51:36 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32H7pNim070594; Fri, 17 Mar 2023 02:51:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1679039483; bh=PpUfaVjVt4iNuG1/XgKubLP9ifTcdNa1nIS4MSP55A0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=BMrRa34VeU5LgoLLBjEjOe2TNiCMyp0dMW5X0wAveSGLsGMh5S37iN2MlUamc9dbO VNE0JnmIzwIJgDOkhzVLpi94yCmOYM/AeKTh3EtzfkVVdwk8rdmtdP/mQkApXnUbx1 VicfWrgstUmSPxLGSN07C7M1rtOV5fjQdbfghifs= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32H7pNcP004715 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 17 Mar 2023 02:51:23 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 17 Mar 2023 02:51:23 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 17 Mar 2023 02:51:23 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32H7pMLH005808; Fri, 17 Mar 2023 02:51:23 -0500 From: Achal Verma To: Lorenzo Pieralisi , Krzysztof Wilczy_ski , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Vignesh Raghavendra , Dhananjay Vilasrao Kangude , Anindita Das , Yuan Zhao , Milind Parab CC: , , , , , Achal Verma Subject: [PATCH v11 1/5] dt-bindings: PCI: ti,j721e-pci-*: add checks for num-lanes Date: Fri, 17 Mar 2023 13:21:16 +0530 Message-ID: <20230317075120.506267-2-a-verma1@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230317075120.506267-1-a-verma1@ti.com> References: <20230317075120.506267-1-a-verma1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760601284643973711?= X-GMAIL-MSGID: =?utf-8?q?1760601284643973711?= From: Matt Ranostay Add num-lanes schema checks based on compatible string on available lanes for that platform. Signed-off-by: Matt Ranostay Signed-off-by: Achal Verma Reviewed-by: Krzysztof Kozlowski --- .../bindings/pci/ti,j721e-pci-ep.yaml | 27 ++++++++++++++++--- .../bindings/pci/ti,j721e-pci-host.yaml | 27 ++++++++++++++++--- 2 files changed, 48 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index 10e6eabdff53..32e0c70ed801 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -10,9 +10,6 @@ title: TI J721E PCI EP (PCIe Wrapper) maintainers: - Kishon Vijay Abraham I -allOf: - - $ref: "cdns-pcie-ep.yaml#" - properties: compatible: oneOf: @@ -65,6 +62,30 @@ properties: items: - const: link_state +allOf: + - $ref: cdns-pcie-ep.yaml# + - if: + properties: + compatible: + enum: + - ti,am64-pcie-ep + then: + properties: + num-lanes: + const: 1 + + - if: + properties: + compatible: + enum: + - ti,j7200-pcie-ep + - ti,j721e-pcie-ep + then: + properties: + num-lanes: + minimum: 1 + maximum: 2 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 3d7aee97353a..2547088304e5 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -10,9 +10,6 @@ title: TI J721E PCI Host (PCIe Wrapper) maintainers: - Kishon Vijay Abraham I -allOf: - - $ref: "cdns-pcie-host.yaml#" - properties: compatible: oneOf: @@ -94,6 +91,30 @@ properties: interrupts: maxItems: 1 +allOf: + - $ref: cdns-pcie-host.yaml# + - if: + properties: + compatible: + enum: + - ti,am64-pcie-host + then: + properties: + num-lanes: + const: 1 + + - if: + properties: + compatible: + enum: + - ti,j7200-pcie-host + - ti,j721e-pcie-host + then: + properties: + num-lanes: + minimum: 1 + maximum: 2 + required: - compatible - reg From patchwork Fri Mar 17 07:51:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Achal Verma X-Patchwork-Id: 71122 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp207061wrt; Fri, 17 Mar 2023 01:04:46 -0700 (PDT) X-Google-Smtp-Source: AK7set9kJ8puPICytOF12PdRaY0oZnHTZG1yQP7rxnX9ppUnsOpMFJhpj6KiU/+KQgDIf4/68MVA X-Received: by 2002:a17:903:2308:b0:19a:7060:948 with SMTP id d8-20020a170903230800b0019a70600948mr6547665plh.1.1679040286335; Fri, 17 Mar 2023 01:04:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679040286; cv=none; d=google.com; s=arc-20160816; b=vi3QGQUG+QcvpVeX3gFfgcDD/y2h2EJP9B1NRQXJ/SYC1oFDQrgwe+V9pTMfUiNi9M 9LghU+IHrz223pAXFog3rV2eyEHJFIYL7lfeE32qTBov85mwcxlW5GEmU02vgOMvKpKD T0mVgBD6yjP6vsOmw6oVDlsWDwxVR8cuNbnBp19yo6i5vUCaDwbBWXeH+gbA43e797fN GkzdFIy4szhIYqg9m4aOg4kjxcsdAlmX/wCjCTnIU8n80xBUIcqFw3K4gag6IJW7bBLF kOW/6D/9O1luFRrWE1xgX+QXxG/oomVZtNMdGshPtsKtuCsMpaYzODHpqsrIyT8/SLMB kWfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6txK6JhGNmC1mVhE7nu+ujxZBb0FV1uO3fUqV2jp4bY=; b=lfodJ36DMO/Q1FaWesJGXbrRn6LwE/zR5y/wNHYffeuQxQFW2XNHi1yhdPIu8PJYVe leR4al7wJEr7j+bEHbk+wXVg/5W2fUy5a1piN0ZxH+EP8yO2FigDWxE//bBS6C/ggltG 09F1y2gfmdZO90IF1xyEmnqMWupj74+NXZJv4bp3RnuNWRGskTXqoc5CjA4+Nc0J9XTa obGlBJQ09O20fuXqNKTqoojq63Wco+2ldU0oq7tgZSHPHPw5WBYXQXg8YneKYWvEPHVi iqpqwc6J/87pBEfM4EHiFVmUqNz71f2sSYBX3Q171PevER5rsqaYEoVtWiqt9fmJqDZ5 yR/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=yIhRUIOQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r11-20020a170902c60b00b0019edb7346fbsi1772784plr.18.2023.03.17.01.04.33; Fri, 17 Mar 2023 01:04:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=yIhRUIOQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230352AbjCQHvt (ORCPT + 99 others); Fri, 17 Mar 2023 03:51:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230325AbjCQHvj (ORCPT ); Fri, 17 Mar 2023 03:51:39 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E541895BC0; Fri, 17 Mar 2023 00:51:36 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32H7pPV2070599; Fri, 17 Mar 2023 02:51:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1679039485; bh=6txK6JhGNmC1mVhE7nu+ujxZBb0FV1uO3fUqV2jp4bY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yIhRUIOQcHjPy39oy19pBQGPlewS3A0K5b2ERpEF3fKYfl8YpfPE0f3K16sCliQrj +9y9bqJfLzqQL8w+o5yLhDdMYwc7ac5Vnx7VvyrNZjl7rpll2D5imZBg6gfsIPAG+H i5ZOvT9HU0Ryh5l7ofCTQE7C5iGQyUuAIwNKVNaA= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32H7pPPc119557 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 17 Mar 2023 02:51:25 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 17 Mar 2023 02:51:24 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 17 Mar 2023 02:51:24 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32H7pOdq058405; Fri, 17 Mar 2023 02:51:24 -0500 From: Achal Verma To: Lorenzo Pieralisi , Krzysztof Wilczy_ski , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Vignesh Raghavendra , Dhananjay Vilasrao Kangude , Anindita Das , Yuan Zhao , Milind Parab CC: , , , , , Achal Verma Subject: [PATCH v11 2/5] PCI: j721e: Add per platform maximum lane settings Date: Fri, 17 Mar 2023 13:21:17 +0530 Message-ID: <20230317075120.506267-3-a-verma1@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230317075120.506267-1-a-verma1@ti.com> References: <20230317075120.506267-1-a-verma1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760601347515227804?= X-GMAIL-MSGID: =?utf-8?q?1760601347515227804?= From: Matt Ranostay Various platforms have different maximum amount of lanes that can be selected. Add max_lanes to struct j721e_pcie to allow for detection of this which is needed to calculate the needed bitmask size for the possible lane count. Signed-off-by: Matt Ranostay Signed-off-by: Vignesh Raghavendra Signed-off-by: Achal Verma --- drivers/pci/controller/cadence/pci-j721e.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index cc83a8925ce0..f4dc2c5abedb 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -47,8 +47,6 @@ enum link_status { #define GENERATION_SEL_MASK GENMASK(1, 0) -#define MAX_LANES 2 - struct j721e_pcie { struct cdns_pcie *cdns_pcie; struct clk *refclk; @@ -71,6 +69,7 @@ struct j721e_pcie_data { unsigned int quirk_disable_flr:1; u32 linkdown_irq_regfield; unsigned int byte_access_allowed:1; + unsigned int max_lanes; }; static inline u32 j721e_pcie_user_readl(struct j721e_pcie *pcie, u32 offset) @@ -290,11 +289,13 @@ static const struct j721e_pcie_data j721e_pcie_rc_data = { .quirk_retrain_flag = true, .byte_access_allowed = false, .linkdown_irq_regfield = LINK_DOWN, + .max_lanes = 2, }; static const struct j721e_pcie_data j721e_pcie_ep_data = { .mode = PCI_MODE_EP, .linkdown_irq_regfield = LINK_DOWN, + .max_lanes = 2, }; static const struct j721e_pcie_data j7200_pcie_rc_data = { @@ -302,23 +303,27 @@ static const struct j721e_pcie_data j7200_pcie_rc_data = { .quirk_detect_quiet_flag = true, .linkdown_irq_regfield = J7200_LINK_DOWN, .byte_access_allowed = true, + .max_lanes = 2, }; static const struct j721e_pcie_data j7200_pcie_ep_data = { .mode = PCI_MODE_EP, .quirk_detect_quiet_flag = true, .quirk_disable_flr = true, + .max_lanes = 2, }; static const struct j721e_pcie_data am64_pcie_rc_data = { .mode = PCI_MODE_RC, .linkdown_irq_regfield = J7200_LINK_DOWN, .byte_access_allowed = true, + .max_lanes = 1, }; static const struct j721e_pcie_data am64_pcie_ep_data = { .mode = PCI_MODE_EP, .linkdown_irq_regfield = J7200_LINK_DOWN, + .max_lanes = 1, }; static const struct of_device_id of_j721e_pcie_match[] = { @@ -432,8 +437,10 @@ static int j721e_pcie_probe(struct platform_device *pdev) pcie->user_cfg_base = base; ret = of_property_read_u32(node, "num-lanes", &num_lanes); - if (ret || num_lanes > MAX_LANES) + if (ret || num_lanes > data->max_lanes) { + dev_warn(dev, "num-lanes property not provided or invalid, setting num-lanes to 1\n"); num_lanes = 1; + } pcie->num_lanes = num_lanes; if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48))) From patchwork Fri Mar 17 07:51:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Achal Verma X-Patchwork-Id: 71120 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp203265wrt; Fri, 17 Mar 2023 00:53:50 -0700 (PDT) X-Google-Smtp-Source: AK7set98bGzZUaHEGb1d/l386YZaXPviIINTeBl62H+xRJc2OiN/s7iVDMggX3su15Zoh58/twrI X-Received: by 2002:a05:6a20:7fa3:b0:cd:345e:5b10 with SMTP id d35-20020a056a207fa300b000cd345e5b10mr11309355pzj.5.1679039630366; Fri, 17 Mar 2023 00:53:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679039630; cv=none; d=google.com; s=arc-20160816; b=WKcRWdEAECjlaKYBnVgI5KXDeNECI3HbjWrJyk0E2EfFIRU3/8rnbfODZx+JIDhrz0 YdDK+mv8T/E08FpsX59NdFAxrfkfvmchu/a2KlQmrmn33getrxoWyIDEtSsSLN/aSQo9 hDD24sV9OkxWf7RfsErDbxis0jKKUNtAXBmAgrJQvnvDSKzGMcEIEH7NZjIhuEJDG8PF +vSFqmRiW/YvxnrA8xgCCG/whxICqYoixc/15W+Szm132sR2BR6UrrVAxxqm61Y8gCq0 HeCk8ILE3RaPzDk0CXnepxId9vwfQayvhtl0A6Kz6cJfBI7NCDBApHf3F1IYzKYFuvAx QiIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=TISRczCqqClgTnuh9Jgbp4YdFIC7Href1UTZ0gVUQ5I=; b=NJbINuc0cN2SENCPU8Xf5iNf47XoIo9u5HP6B72drtdhi/id4t8giUTl5o6uOqUOXV oSfbrMlAJQHRsOZCJjpzL+dKeHSL2tdsQ6hkQ/pph1Iag7OL8oRDMZDYgzRrjN4d0SQk Z1qTlJ590rpWfBG+MZV/7/AqpV4al4uMfeSb0XZqkL10m3gqlV0pSY6vVJvqgfu49HyU bHu7XXcWleHVFl9RqntX9uLOo3zy2jYs5mHC1StNDYq7LCas3uSVHnjGarm+PhoEgxxB GtAAGPUHZPEwRkryp32KpVF5LGecmCI0QdqujzjSlCQjd4Qgclk/sXOUpW/F1HrwWbEl WoqQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=jaMqWZ5q; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j7-20020a056a00174700b006255fe95314si2002066pfc.60.2023.03.17.00.53.37; Fri, 17 Mar 2023 00:53:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=jaMqWZ5q; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230427AbjCQHv6 (ORCPT + 99 others); Fri, 17 Mar 2023 03:51:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58112 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230383AbjCQHvv (ORCPT ); Fri, 17 Mar 2023 03:51:51 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1881AC5AC9; Fri, 17 Mar 2023 00:51:42 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32H7pQFE008664; Fri, 17 Mar 2023 02:51:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1679039486; bh=TISRczCqqClgTnuh9Jgbp4YdFIC7Href1UTZ0gVUQ5I=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jaMqWZ5qBPyQA9WMOOvu0DfCBAw1ihhRm9e/tljBb5g/8vuNYFWURmsPhVMfYzbSw R9UB2teEoReDNpyQMuipQBJm+i3yYtPQdG8u6bXW3bFHPHv7m4RPj3KEfDlnEX692Q ZCEais0bbVQtg39nWls9UKEqnMqEfOA8eL6Tnj8c= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32H7pQD7119567 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 17 Mar 2023 02:51:26 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 17 Mar 2023 02:51:26 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 17 Mar 2023 02:51:26 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32H7pP24113752; Fri, 17 Mar 2023 02:51:26 -0500 From: Achal Verma To: Lorenzo Pieralisi , Krzysztof Wilczy_ski , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Vignesh Raghavendra , Dhananjay Vilasrao Kangude , Anindita Das , Yuan Zhao , Milind Parab CC: , , , , , Achal Verma Subject: [PATCH v11 3/5] PCI: j721e: Add PCIe 4x lane selection support Date: Fri, 17 Mar 2023 13:21:18 +0530 Message-ID: <20230317075120.506267-4-a-verma1@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230317075120.506267-1-a-verma1@ti.com> References: <20230317075120.506267-1-a-verma1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760600659799419014?= X-GMAIL-MSGID: =?utf-8?q?1760600659799419014?= From: Matt Ranostay Add support for setting of two-bit field that allows selection of 4x lane PCIe which was previously limited to only 2x lanes. Signed-off-by: Matt Ranostay Reviewed-by: Vignesh Raghavendra Reviewed-by: Roger Quadros Signed-off-by: Achal Verma --- drivers/pci/controller/cadence/pci-j721e.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index f4dc2c5abedb..58dcac9021e4 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -42,7 +42,6 @@ enum link_status { }; #define J721E_MODE_RC BIT(7) -#define LANE_COUNT_MASK BIT(8) #define LANE_COUNT(n) ((n) << 8) #define GENERATION_SEL_MASK GENMASK(1, 0) @@ -52,6 +51,7 @@ struct j721e_pcie { struct clk *refclk; u32 mode; u32 num_lanes; + u32 max_lanes; void __iomem *user_cfg_base; void __iomem *intd_cfg_base; u32 linkdown_irq_regfield; @@ -205,11 +205,15 @@ static int j721e_pcie_set_lane_count(struct j721e_pcie *pcie, { struct device *dev = pcie->cdns_pcie->dev; u32 lanes = pcie->num_lanes; + u32 mask = BIT(8); u32 val = 0; int ret; + if (pcie->max_lanes == 4) + mask = GENMASK(9, 8); + val = LANE_COUNT(lanes - 1); - ret = regmap_update_bits(syscon, offset, LANE_COUNT_MASK, val); + ret = regmap_update_bits(syscon, offset, mask, val); if (ret) dev_err(dev, "failed to set link count\n"); @@ -441,7 +445,9 @@ static int j721e_pcie_probe(struct platform_device *pdev) dev_warn(dev, "num-lanes property not provided or invalid, setting num-lanes to 1\n"); num_lanes = 1; } + pcie->num_lanes = num_lanes; + pcie->max_lanes = data->max_lanes; if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48))) return -EINVAL; From patchwork Fri Mar 17 07:51:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Achal Verma X-Patchwork-Id: 71119 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp203106wrt; Fri, 17 Mar 2023 00:53:12 -0700 (PDT) X-Google-Smtp-Source: AK7set8PqfOaAIrBhcWdGdY7O1dPA4Fdw0XgYEnuSSA5CWaj/qXbw49ENle0t34yHSDXOG0s3FKj X-Received: by 2002:a05:6a00:418c:b0:624:bf7e:9d8c with SMTP id ca12-20020a056a00418c00b00624bf7e9d8cmr6795996pfb.1.1679039592016; Fri, 17 Mar 2023 00:53:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679039592; cv=none; d=google.com; s=arc-20160816; b=ZXWZR6HybNKRon/6xYDmn5ujc5GzKcy8BfCXcbWYL2/cD5BXXxJoZdjDbiMS50xaVi z+wJqpGvmvJ1piMTVjWGwIo7PXzZto8OZrwOpnzR9+VJZDlx3VorhjOFuCqkMOk3Ac19 +tuFcmivk10Izu88gTWkEA9Nq++g8+oTjrJ1bNbOi5CdKYc29Z26GKCasgkKeOjzvZJk y8L4w4GreV9isZraIkgkuedjEUQWpcRZp49P/2MDLeLDRHd9rbY+0a3pAWsplpsIX5fk A7FnBRVYTmEK7ez88vFEbGVKeJfW6qzupxUarmXu8Pkb7cSyQ1I8YgUVPTVcG5PdFyLk RhLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/KtIEHYVe129q/U6+XWH0X7x8R+UBCCGDZvXUUhmAPA=; b=ydwNCkN0UzcgsS4r7d60o8NUKjfN9klUAYT1aNUAzBP30vzFxpUl5tLpprgkbv8W5t uDJMb1HSXrYWMmK+xJrudob1KFeX2tDlpva/ZEIr4iFiufreLEaQgU4wjug500Io2vCj 6m04iy7O4+twCTbu+UTUIJfAL9+Kvk9782cjfkKk+TQR7ZnmxXOFNTaHYuwE4ZAvGF26 bdYh2Ku1pOPEvV/DZdkQElcB6urRAex/9had0Z3ELsxYMsZM6Ci2wwsSjuaCHMLJJXwb wNjugCrQXzbcuSif1HFkF4cF6GxAJOX/t8gKejzZaXnAo80JfgnXrGjKNZXMSt8p6uNd vpZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=bRh6eYmE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m3-20020a056a00164300b005a8be9b1b56si1705032pfc.217.2023.03.17.00.52.59; Fri, 17 Mar 2023 00:53:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=bRh6eYmE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230373AbjCQHvw (ORCPT + 99 others); Fri, 17 Mar 2023 03:51:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230330AbjCQHvk (ORCPT ); Fri, 17 Mar 2023 03:51:40 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4479D89F02; Fri, 17 Mar 2023 00:51:38 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32H7pSws070609; Fri, 17 Mar 2023 02:51:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1679039488; bh=/KtIEHYVe129q/U6+XWH0X7x8R+UBCCGDZvXUUhmAPA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=bRh6eYmEit+mwxCp8cGHNODTp6uHcwi+AnHVvOYKKKr5XvzV3dCKRmn6tpqyhreBw 0lqKd8LbMyuBE8uxhslO8uZaFUpSJK+AUIbFLpmxems4Y0NhHhk3gLjx1w9XkYpu34 Lv9KN/YO0e/S3E9VBDfaXTHlKHn3oA7d0ssUzs40= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32H7pSm1004747 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 17 Mar 2023 02:51:28 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 17 Mar 2023 02:51:27 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 17 Mar 2023 02:51:27 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32H7pRHp100714; Fri, 17 Mar 2023 02:51:27 -0500 From: Achal Verma To: Lorenzo Pieralisi , Krzysztof Wilczy_ski , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Vignesh Raghavendra , Dhananjay Vilasrao Kangude , Anindita Das , Yuan Zhao , Milind Parab CC: , , , , , Achal Verma Subject: [PATCH v11 4/5] dt-bindings: PCI: ti,j721e-pci-*: add j784s4-pci-* compatible strings Date: Fri, 17 Mar 2023 13:21:19 +0530 Message-ID: <20230317075120.506267-5-a-verma1@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230317075120.506267-1-a-verma1@ti.com> References: <20230317075120.506267-1-a-verma1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760600619555466637?= X-GMAIL-MSGID: =?utf-8?q?1760600619555466637?= From: Matt Ranostay Add definition for j784s4-pci-ep + j784s4-pci-host devices along with schema checks for num-lanes. Signed-off-by: Matt Ranostay Acked-by: Krzysztof Kozlowski Signed-off-by: Achal Verma --- .../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 12 ++++++++++++ .../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 12 ++++++++++++ 2 files changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index 32e0c70ed801..d2fbf1f7aa54 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -14,6 +14,7 @@ properties: compatible: oneOf: - const: ti,j721e-pcie-ep + - const: ti,j784s4-pcie-ep - description: PCIe EP controller in AM64 items: - const: ti,am64-pcie-ep @@ -86,6 +87,17 @@ allOf: minimum: 1 maximum: 2 + - if: + properties: + compatible: + enum: + - ti,j784s4-pcie-ep + then: + properties: + num-lanes: + minimum: 1 + maximum: 4 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 2547088304e5..e41d6f403493 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -14,6 +14,7 @@ properties: compatible: oneOf: - const: ti,j721e-pcie-host + - const: ti,j784s4-pcie-host - description: PCIe controller in AM64 items: - const: ti,am64-pcie-host @@ -115,6 +116,17 @@ allOf: minimum: 1 maximum: 2 + - if: + properties: + compatible: + enum: + - ti,j784s4-pcie-host + then: + properties: + num-lanes: + minimum: 1 + maximum: 4 + required: - compatible - reg From patchwork Fri Mar 17 07:51:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Achal Verma X-Patchwork-Id: 71126 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp207695wrt; Fri, 17 Mar 2023 01:06:19 -0700 (PDT) X-Google-Smtp-Source: AK7set/HZNmPVYAU0rhpo4mkE+evgnFrai7oMl5OMb8RlvRI2dVVXEkBoCEzjz8VOPbwIgM+Yqc7 X-Received: by 2002:a17:90a:4ca4:b0:23d:1bef:8594 with SMTP id k33-20020a17090a4ca400b0023d1bef8594mr5633019pjh.1.1679040378702; Fri, 17 Mar 2023 01:06:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1679040378; cv=none; d=google.com; s=arc-20160816; b=yd1gOD5++SC5zD9SooQwdoXsZ49HWE4i5wjAqs68FQDf2OhFaZEKy9+vlRKJ+P2m/c nxcQKZAyXhY7QqVFYZ4yLFEaVGDByf6HK0bFPNAzOYjort7MgKGHbiT4Ha+8z7wC8c7g GFjNmOLizsOzPximjCfYk3o1IGH3R61EiAh7HkC4aPvn9yhSISoSlmsoGFVgotT/4y0z H8Wr0+8TU5TRmfLBs9cw+p3kIhScIF4blw915Cb6qJZFWpia7x4aup7eZnOaGH+OoMyk gvMJD5GvwjbYHNWXTszO26Bhc/YUcVg7AFcwL8IAe3nMJO9QaK2bNSqSkRP/swr4YCU1 doTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=GGrsVB2NuWgQ/IDsTg782FJLIK98IZjp/7pCe7Mspxs=; b=qies02cUkLzwS/PpgcDA8VkdwMyPdk0juaKHsTG53G+CyALxyS9uGPr0Q1374GIdzy yVSHHIZEm6fqNWLWRoLstPwLYVAOWYJB1sLwpSe36HWhzB27y5uA6eCi2AuOgRdRUGkR pdiVjZ4OSC605XIRCjLVO1S2JlAUt/yONz/5IHIRqQBXq65HHDVxlS7evwUlmwhphoji HKh6HEaC6MqQyREnBecLPzLe/biLPTcC/mMckuCo5RkjyXNiMKirbbBqj/0XL65JgfCZ KlCAcb/W9a97q6NTvQDFQv7t5xXDz9qxHsbvjJigGJEM8x/35jR0jETLyjtlQBfpfI5R MZUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=FXCck0WN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a4-20020a170902ecc400b001a1ab142f93si625581plh.286.2023.03.17.01.06.05; Fri, 17 Mar 2023 01:06:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=FXCck0WN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230325AbjCQHvz (ORCPT + 99 others); Fri, 17 Mar 2023 03:51:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230341AbjCQHvo (ORCPT ); Fri, 17 Mar 2023 03:51:44 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0DC7A0B0C; Fri, 17 Mar 2023 00:51:41 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32H7pTnA080563; Fri, 17 Mar 2023 02:51:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1679039489; bh=GGrsVB2NuWgQ/IDsTg782FJLIK98IZjp/7pCe7Mspxs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=FXCck0WNRTOp1AK+AE0LChA4TqpQ4mIUjrsqHRqyVp3zllhqHXDZxxomeFpclpZvG XFbx0cixfGdyuQpPlsIBHlGScWDGs46nPAwLnpby8tIteW9rIbKNgAzbSwG2004vTv KLGmewHVwhx8bplK2Ar4AXs7eMzAGuKKmwVRkdBM= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32H7pTfV004757 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 17 Mar 2023 02:51:29 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 17 Mar 2023 02:51:29 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 17 Mar 2023 02:51:29 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32H7pSdZ005839; Fri, 17 Mar 2023 02:51:29 -0500 From: Achal Verma To: Lorenzo Pieralisi , Krzysztof Wilczy_ski , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Vignesh Raghavendra , Dhananjay Vilasrao Kangude , Anindita Das , Yuan Zhao , Milind Parab CC: , , , , , Achal Verma Subject: [PATCH v11 5/5] PCI: j721e: add j784s4 PCIe configuration Date: Fri, 17 Mar 2023 13:21:20 +0530 Message-ID: <20230317075120.506267-6-a-verma1@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230317075120.506267-1-a-verma1@ti.com> References: <20230317075120.506267-1-a-verma1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760601444215440573?= X-GMAIL-MSGID: =?utf-8?q?1760601444215440573?= From: Matt Ranostay Add PCIe configuration for j784s4 platform which has 4x lane support. Tested-by: Achal Verma Signed-off-by: Matt Ranostay Reviewed-by: Roger Quadros Signed-off-by: Achal Verma --- drivers/pci/controller/cadence/pci-j721e.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index 58dcac9021e4..cce7b391f931 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -330,6 +330,20 @@ static const struct j721e_pcie_data am64_pcie_ep_data = { .max_lanes = 1, }; +static const struct j721e_pcie_data j784s4_pcie_rc_data = { + .mode = PCI_MODE_RC, + .quirk_retrain_flag = true, + .byte_access_allowed = false, + .linkdown_irq_regfield = LINK_DOWN, + .max_lanes = 4, +}; + +static const struct j721e_pcie_data j784s4_pcie_ep_data = { + .mode = PCI_MODE_EP, + .linkdown_irq_regfield = LINK_DOWN, + .max_lanes = 4, +}; + static const struct of_device_id of_j721e_pcie_match[] = { { .compatible = "ti,j721e-pcie-host", @@ -355,6 +369,14 @@ static const struct of_device_id of_j721e_pcie_match[] = { .compatible = "ti,am64-pcie-ep", .data = &am64_pcie_ep_data, }, + { + .compatible = "ti,j784s4-pcie-host", + .data = &j784s4_pcie_rc_data, + }, + { + .compatible = "ti,j784s4-pcie-ep", + .data = &j784s4_pcie_ep_data, + }, {}, };