From patchwork Wed Oct 19 14:37:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 5670 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp382655wrs; Wed, 19 Oct 2022 08:17:06 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5Rql10FXkkDxOQNzIKFjT7onWXnRXkSS36W9V5nWMmk0Ibv9Ays4GfJyvdk4rOdYA4F9di X-Received: by 2002:a17:907:7618:b0:78d:ad63:2828 with SMTP id jx24-20020a170907761800b0078dad632828mr7492068ejc.27.1666192625976; Wed, 19 Oct 2022 08:17:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666192625; cv=none; d=google.com; s=arc-20160816; b=qNqF/E3TTR4f3ACmxYsWMwP+JB+XbiLXOyeJ+7g+kL3mm7jMOoh7bTQ0yR11fMHWhf BOLGT5EgiDk4IMHVTf5EojLTS63klvBX7w4Vqx7mWHr1LZoBBzp46UHRju4aI26gFRPT F2Q3uRccsiQmVZYrMrqAnEozNenpPFtQn6fyhO7+wse3I5wuWX1giAgQ+gXY04FJHKtR IjDdUWNmw8Oj2MTVXtSVVhQxyYbZPUTXDALH7ruVeVSpN7QWnGEqct3cMb0pmZZzsTx2 57dlzjpuiafRT2KVI3lwkY8+kETKjFZDKWjdwASFHd3G94eKFhXTrYynKQSUCv9qjW2u ve9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-disposition:mime-version:message-id :subject:cc:to:from:date; bh=aSWMexj11dFUHv4EIqD/p73rCxI5Rbm9JP/7r0sLjgg=; b=pIb7ZwL3vStdaYAVp3EJ9YP04hrKdrZPU+LaUE5JSgHHv8/gArlr2LF/gwMhk+zXmT VuQxzqtURUJlRCPs9IgZbhMQXRPs10xsRVd83ZtuemC+DdKqpACKh6sd7EvEFn0LG3oq MXjgfccenlOXoyWX6FxHRLlUMddiLxzByOGAdCatOYIeuumShmBuvlTdRCcWtD096PQ7 7h2qA4pwUGsvhTPpjjFI0MmkP5HGMtjyZrLQcx8NR5jGPV3eWqwQC79UoQvC703DDSX7 roJusOps5ef/WQAI9Qx/Of4CJje1zuToQtWhEKU/woaLFC5m2n6J9OT9thUm9fkTQgtg PGtQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g23-20020a50ec17000000b00459102fa225si12982148edr.137.2022.10.19.08.16.41; Wed, 19 Oct 2022 08:17:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231683AbiJSPP1 (ORCPT + 99 others); Wed, 19 Oct 2022 11:15:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232819AbiJSPOg (ORCPT ); Wed, 19 Oct 2022 11:14:36 -0400 Received: from fudo.makrotopia.org (fudo.makrotopia.org [IPv6:2a07:2ec0:3002::71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D25AD9FDD; Wed, 19 Oct 2022 08:07:19 -0700 (PDT) Received: from local by fudo.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.94.2) (envelope-from ) id 1olACX-0000nH-HZ; Wed, 19 Oct 2022 16:37:45 +0200 Date: Wed, 19 Oct 2022 15:37:35 +0100 From: Daniel Golle To: Jonathan Cameron , Lars-Peter Clausen , Matthias Brugger , linux-iio@vger.kernel.org Cc: David Bauer , Gwendal Grignou , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] iio: adc: mt6577_auxadc: add optional 32k clock Message-ID: MIME-Version: 1.0 Content-Disposition: inline X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747129598758090232?= X-GMAIL-MSGID: =?utf-8?q?1747129598758090232?= MediaTek MT7986 and MT7981 require an additional clock to be brought up for AUXADC. Add support for that in the driver, similar to how it's done in MediaTek's SDK[1]. [1]: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/refs/heads/master/target/linux/mediatek/patches-5.4/500-auxadc-add-auxadc-32k-clk.patch Signed-off-by: Daniel Golle --- drivers/iio/adc/mt6577_auxadc.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c index 0e134777bdd248..e28e9691cae22a 100644 --- a/drivers/iio/adc/mt6577_auxadc.c +++ b/drivers/iio/adc/mt6577_auxadc.c @@ -42,6 +42,7 @@ struct mtk_auxadc_compatible { struct mt6577_auxadc_device { void __iomem *reg_base; struct clk *adc_clk; + struct clk *adc_32k_clk; struct mutex lock; const struct mtk_auxadc_compatible *dev_comp; }; @@ -227,6 +228,12 @@ static int mt6577_auxadc_resume(struct device *dev) return ret; } + ret = clk_prepare_enable(adc_dev->adc_32k_clk); + if (ret) { + pr_err("failed to enable auxadc clock\n"); + return ret; + } + mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC, MT6577_AUXADC_PDN_EN, 0); mdelay(MT6577_AUXADC_POWER_READY_MS); @@ -241,6 +248,8 @@ static int mt6577_auxadc_suspend(struct device *dev) mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC, 0, MT6577_AUXADC_PDN_EN); + + clk_disable_unprepare(adc_dev->adc_32k_clk); clk_disable_unprepare(adc_dev->adc_clk); return 0; @@ -282,6 +291,17 @@ static int mt6577_auxadc_probe(struct platform_device *pdev) return ret; } + adc_dev->adc_32k_clk = devm_clk_get_optional(&pdev->dev, "32k"); + if (IS_ERR(adc_dev->adc_32k_clk)) { + dev_err(&pdev->dev, "failed to get auxadc 32k clock\n"); + return PTR_ERR(adc_dev->adc_32k_clk); + } + ret = clk_prepare_enable(adc_dev->adc_32k_clk); + if (ret) { + dev_err(&pdev->dev, "failed to enable auxadc 32k clock\n"); + return ret; + } + adc_clk_rate = clk_get_rate(adc_dev->adc_clk); if (!adc_clk_rate) { ret = -EINVAL; @@ -311,6 +331,7 @@ static int mt6577_auxadc_probe(struct platform_device *pdev) mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC, 0, MT6577_AUXADC_PDN_EN); err_disable_clk: + clk_disable_unprepare(adc_dev->adc_32k_clk); clk_disable_unprepare(adc_dev->adc_clk); return ret; } @@ -325,6 +346,7 @@ static int mt6577_auxadc_remove(struct platform_device *pdev) mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC, 0, MT6577_AUXADC_PDN_EN); + clk_disable_unprepare(adc_dev->adc_32k_clk); clk_disable_unprepare(adc_dev->adc_clk); return 0; From patchwork Wed Oct 19 14:38:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 5669 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp382420wrs; Wed, 19 Oct 2022 08:16:35 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5LVnKE7iVUW0WLeG8O2SiCIWQaVoukbCapo6D1ZgRCtH9uTP+9k7eiOH2b6hHLVBV0FFXM X-Received: by 2002:a17:906:c08c:b0:78d:b8ce:c28f with SMTP id f12-20020a170906c08c00b0078db8cec28fmr7116947ejz.437.1666192594765; Wed, 19 Oct 2022 08:16:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666192594; cv=none; d=google.com; s=arc-20160816; b=0qWe7UNhyKIKgw5eX1CEUcsLN/SNobh525cw2swBSW4/1tTfkiyz/qK/CgUZ94bKmw Dm+2AkH796AMnPWTRGSkxIRlTTcT3umUCBBRzr4iZOSs9ZvyrIuKkcZlgMV3AS7yG3Z7 znZ2PM670AAr8haj+Rf1VmNLwMXqhDb7NHwOgmgO+zaRccMu/ARhl/oulm+dNxPEfV+2 jvqwCVvbQNo3RSaZlWqwlCFnX7u1hw3FugUNUnWp+jKULBd/1I8lGMOZokvjv9nEo+W0 K67BIdlXisPhQVAc64LdiquXUBngL1l2MNVGSlgAi0dsSV8zgzqYz8p+DCOzMmt3jIRi 0HIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=Jqr7mhmldmosAsnJUhepWkrYvRNHDwT8zl89bERS4z8=; b=i6gDfQjivW0gcCy+QFqPFNwNb4zQVxUdsv/iHrPinmN/gvfV3VKMozvMHEiInbA4W+ X/EJxaM6aTlTiz/h3oPi5PzdHmz4wCRT49nNYfGCdz9QS00FpQ54EFhP27tw0/7MIjST Lba8ZXzZ34OkDAQrO6+8lQcXBqQ4HMg9JHJfMOU7RbkItup3y1UFHlpnuEfglwmQVJf6 16NKF9c1PsjgvkrB7JQPy0qq5pC2L+487lzf3PahsVXRdoXNzRELjPVIPbUaBdhSw9OK pJYWvboB9VZ/aYDyYij9dK2vjkYL8Zot6ZGUkmnt3W06nkfb5wx3aVeoCRTfiH0WJkIx M+lQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ae8-20020a17090725c800b0077fd5b45e18si12564506ejc.929.2022.10.19.08.16.08; Wed, 19 Oct 2022 08:16:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229509AbiJSPNj (ORCPT + 99 others); Wed, 19 Oct 2022 11:13:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232128AbiJSPNP (ORCPT ); Wed, 19 Oct 2022 11:13:15 -0400 X-Greylist: delayed 901 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Wed, 19 Oct 2022 08:05:46 PDT Received: from fudo.makrotopia.org (fudo.makrotopia.org [IPv6:2a07:2ec0:3002::71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F4E72338A; Wed, 19 Oct 2022 08:05:45 -0700 (PDT) Received: from local by fudo.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.94.2) (envelope-from ) id 1olAD8-0000na-7i; Wed, 19 Oct 2022 16:38:22 +0200 Date: Wed, 19 Oct 2022 15:38:15 +0100 From: Daniel Golle To: Jonathan Cameron , Lars-Peter Clausen , Matthias Brugger , linux-iio@vger.kernel.org Cc: Gwendal Grignou , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] dt-bindings: iio: adc: mediatek,mt2701-auxadc: new 32k clock Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747129566404383157?= X-GMAIL-MSGID: =?utf-8?q?1747129566404383157?= Newer MediaTek SoCs need an additional clock to be brought up for AUXADC to work. Add this new optional clock to mediatek,mt2701-auxadc.yaml. Signed-off-by: Daniel Golle --- .../bindings/iio/adc/mediatek,mt2701-auxadc.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml b/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml index 7f79a06e76f596..c2a1813dd54152 100644 --- a/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml @@ -44,10 +44,14 @@ properties: maxItems: 1 clocks: - maxItems: 1 + maxItems: 2 + minItems: 1 clock-names: - const: main + items: + - const: main + - const: 32k + minItems: 1 "#io-channel-cells": const: 1