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[23.90.200.126]) by smtp.googlemail.com with ESMTPSA id n9-20020a05600c3b8900b003b4ff30e566sm2126577wms.3.2022.10.19.07.17.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Oct 2022 07:17:58 -0700 (PDT) From: Amjad Ouled-Ameur Date: Wed, 19 Oct 2022 16:17:54 +0200 Subject: [PATCH v6 1/4] dt-bindings: thermal: mediatek: add binding documentation for MT8365 SoC MIME-Version: 1.0 Message-Id: <20221018-up-i350-thermal-bringup-v6-1-c87b9f75550b@baylibre.com> References: <20221018-up-i350-thermal-bringup-v6-0-c87b9f75550b@baylibre.com> In-Reply-To: <20221018-up-i350-thermal-bringup-v6-0-c87b9f75550b@baylibre.com> To: Krzysztof Kozlowski , Zhang Rui , Amit Kucheria , Rob Herring , "Rafael J. Wysocki" , Daniel Lezcano Cc: Fabien Parent , linux-mediatek@lists.infradead.org, Rob Herring , Markus Schneider-Pargmann , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, AngeloGioacchino Del Regno , Michael Kao , Hsin-Yi Wang , Amjad Ouled-Ameur , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Matthias Brugger X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1666189076; l=1269; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=fY1CncUk6oCKZLxDY+iXmY9IFHJPxuBaTQTmU142aZo=; b=VpCgMgtCTDppg8K0f+sJTcN7+zAUVonGGeuj6re/jwiuSI8UCWEnobcpOClxnqKzEtedrcwYytlg NT5c/aJOAQVmTuTWyPBVC6p0MeUuhkYPArkdPlkRIaipl/4eODXq X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747127755465463333?= X-GMAIL-MSGID: =?utf-8?q?1747127755465463333?= From: Fabien Parent Add the binding documentation for the thermal support on MT8365 SoC. Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring --- Documentation/devicetree/bindings/thermal/mediatek-thermal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt index 5c7e7bdd029a..ba4ebffeade4 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt @@ -14,6 +14,7 @@ Required properties: - "mediatek,mt2712-thermal" : For MT2712 family of SoCs - "mediatek,mt7622-thermal" : For MT7622 SoC - "mediatek,mt8183-thermal" : For MT8183 family of SoCs + - "mediatek,mt8365-thermal" : For MT8365 family of SoCs - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 family of SoCs - reg: Address range of the thermal controller - interrupts: IRQ for the thermal controller From patchwork Wed Oct 19 14:17:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 5597 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp366922wrs; Wed, 19 Oct 2022 07:45:52 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7q//gC1jiaT2nlKJAG4lPbReDMeiweXj20eCCkz0nQNa+O6Gz5EnYECBCMx50hTnbBkAcq X-Received: by 2002:a05:6402:1391:b0:459:cb69:9a2b with SMTP id b17-20020a056402139100b00459cb699a2bmr7844840edv.201.1666190752207; Wed, 19 Oct 2022 07:45:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666190752; cv=none; d=google.com; s=arc-20160816; b=hKhCEQe9h4cg6zvkDNXyPCkLWch0CkB5lro5HebuuVyxGLwOj98IAy4i7LN3vZP5s+ WS6Qz5lpfDA9k/Ruj05yVWZteEP7ywZ6eYOQmGJAbckmajJyG1dWc2ZVGrUf3UjSDzbq C674CWiz1zBHWCYE3WXdF1oHZjjFFw1f256qJJjWeSRT2RPbe2kettdrXB8k5u59flbi nq7lkL3R/l+wlkE7BnO9j/iVzEr2La2Qjvt/WoKfPlB+7Qr7K6liklB4zVm1DovYbbhw 1zTaVQHi2XtoX2fWMakAEUiO7b1U6+L4kUyCXuq1KHPJukq3/RgJ3eOSEbvViu/BdAXC uKqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=fyeoHLNYgE+7jRWrI7Gid0gjC7DyyjDTDuyVioxNv2s=; b=mQMxJUGWWlnxy1MfKb8pSOziH/Y/UzKgDcppSUuhTj0VQI8MiMMekSB5pUkGMOBJgY x3y/rsYz6nsBAt0bM7yq7Fb01psZnmkt9bTo/ctukc/PXt+G/lCR5m71+ZsKMDM5Lb1z UEQc2ZTAB5qY9CilnQ0Bpvl0Y/JtuMXW9MA67hAd3p/uIWIrLLhaN6j554/irI8tYv46 FtwQGZe4ZHPEYWRg464ETOfZqA2bzArOShPxvzi0RvmKvfVcQMuiBPO+ImIdOcebvF1H KPzxYgZADqqz36rtJuaUgwoq7xHdywY5MTYdoomH14Hzu5eeEjxMJ/1nFYw7wKa0IoO5 C0ng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=fd2H3oNq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[23.90.200.126]) by smtp.googlemail.com with ESMTPSA id n9-20020a05600c3b8900b003b4ff30e566sm2126577wms.3.2022.10.19.07.17.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Oct 2022 07:17:58 -0700 (PDT) From: Amjad Ouled-Ameur Date: Wed, 19 Oct 2022 16:17:55 +0200 Subject: [PATCH v6 2/4] thermal: mediatek: control buffer enablement tweaks MIME-Version: 1.0 Message-Id: <20221018-up-i350-thermal-bringup-v6-2-c87b9f75550b@baylibre.com> References: <20221018-up-i350-thermal-bringup-v6-0-c87b9f75550b@baylibre.com> In-Reply-To: <20221018-up-i350-thermal-bringup-v6-0-c87b9f75550b@baylibre.com> To: Krzysztof Kozlowski , Zhang Rui , Amit Kucheria , Rob Herring , "Rafael J. Wysocki" , Daniel Lezcano Cc: Fabien Parent , linux-mediatek@lists.infradead.org, Rob Herring , Markus Schneider-Pargmann , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, AngeloGioacchino Del Regno , Michael Kao , Hsin-Yi Wang , Amjad Ouled-Ameur , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Matthias Brugger X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1666189076; l=2549; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=BUYgiWUyEmLmv5YqBlzSOjPnRULIXZAPNGFdkdhmkOQ=; b=DuTCH2nYQby2Rp3rUYfbKfiiNFfGGwSHOKQAOBeLAf4oWTYlJ5qTJGiqvCQvObkl5s1dpqQ5GpOv 3eK/2IoPDmqAKTAP4GM6xGNbfcEtstHqPfVKPpPJpZh3kiuqEiPL X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747127634069773870?= X-GMAIL-MSGID: =?utf-8?q?1747127634069773870?= From: Markus Schneider-Pargmann Add logic in order to be able to turn on the control buffer on MT8365. This change now allows to have control buffer support for MTK_THERMAL_V1, and it allows to define the register offset, and mask used to enable it. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno --- drivers/thermal/mtk_thermal.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 8440692e3890..d8ddceb75372 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -271,6 +271,9 @@ struct mtk_thermal_data { bool need_switch_bank; struct thermal_bank_cfg bank_data[MAX_NUM_ZONES]; enum mtk_thermal_version version; + u32 apmixed_buffer_ctl_reg; + u32 apmixed_buffer_ctl_mask; + u32 apmixed_buffer_ctl_set; }; struct mtk_thermal { @@ -514,6 +517,9 @@ static const struct mtk_thermal_data mt7622_thermal_data = { .adcpnp = mt7622_adcpnp, .sensor_mux_values = mt7622_mux_values, .version = MTK_THERMAL_V2, + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON1, + .apmixed_buffer_ctl_mask = GENMASK(31, 6) | BIT(3), + .apmixed_buffer_ctl_set = BIT(0), }; /* @@ -963,14 +969,18 @@ static const struct of_device_id mtk_thermal_of_match[] = { }; MODULE_DEVICE_TABLE(of, mtk_thermal_of_match); -static void mtk_thermal_turn_on_buffer(void __iomem *apmixed_base) +static void mtk_thermal_turn_on_buffer(struct mtk_thermal *mt, + void __iomem *apmixed_base) { - int tmp; + u32 tmp; + + if (!mt->conf->apmixed_buffer_ctl_reg) + return; - tmp = readl(apmixed_base + APMIXED_SYS_TS_CON1); - tmp &= ~(0x37); - tmp |= 0x1; - writel(tmp, apmixed_base + APMIXED_SYS_TS_CON1); + tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg); + tmp &= mt->conf->apmixed_buffer_ctl_mask; + tmp |= mt->conf->apmixed_buffer_ctl_set; + writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg); udelay(200); } @@ -1070,8 +1080,9 @@ static int mtk_thermal_probe(struct platform_device *pdev) goto err_disable_clk_auxadc; } + mtk_thermal_turn_on_buffer(mt, apmixed_base); + if (mt->conf->version == MTK_THERMAL_V2) { - mtk_thermal_turn_on_buffer(apmixed_base); mtk_thermal_release_periodic_ts(mt, auxadc_base); } From patchwork Wed Oct 19 14:17:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 5598 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp367131wrs; Wed, 19 Oct 2022 07:46:22 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7XKq5GS4GOVDuQqDDx4V9YRVbH26ln46vJMn990POx6kFtRiVvZzKkI4GaNpPs0uBp0BVi X-Received: by 2002:a17:90a:e7d0:b0:20c:169f:7503 with SMTP id kb16-20020a17090ae7d000b0020c169f7503mr45366462pjb.175.1666190781979; Wed, 19 Oct 2022 07:46:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666190781; cv=none; d=google.com; s=arc-20160816; b=dUy5qI7cGkehzstr0T1hwmY+vPtK6e8YH1R3A19yU8OML6HphXkiY6HEjlPfjL0Bvf //udCv9y1nzyfI2b7KfOA5LRuMOtEbfqVm8dFwrcAUXVkyaXW90RHEB5nGvbAySoQ23i aAJ2NTJDUGN1FIYvG2zZWXluq3h5q5B8IZa5z9HgDi0ygpd8Bg8bjgNFaH79XwS5at6f PJbIoqrF9rul0bF2YU2N0eDFZ72x+DUerRh7bv3T02IKZewFHPwx0azfaaTF+dX9hjyz CAl+fRaBMTQPhhieIUTLikYw+0RXo12Qj9lGQOTBXBZ9wOrbTz5sEgGSyPjIPn/j7tw8 rm5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=JEWwvjO7xGoxwjM+6BZt85KGa3T/LYZTSrJmbqTF3bU=; b=GmSBT3eb6ObueCCjYPkDWI8SnbeL8YF3PRIStiGVBAuuhWLU1H1yY1sx1qTlzfM08R f8yHOWVwbfJ16ae98jL0TuId71E7cgg/e6oZ+QQeYrDUk5VXTYJ6KroKU4xgfy8aHkLP /OOF0Jt7RZYJqEyrR29ISkFUJDlADzoJOuUiGefQOfMp1zx6cQiHw4WLoFaZu5mVQy3P afn2VfjFFQJQCRrd2/Zg2HRbzyNalyGEKHLUm/3OwxazYpLyDHY9qidD2uqhu4MCSFbD mc7vGQZef5D8zIn9Kvb6fLEn5tuRfX9/ouNOhyyGREq+PNtf2TlzUkuw8Hs1m9Qr4+Nt hX+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=JPYoCpWH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[23.90.200.126]) by smtp.googlemail.com with ESMTPSA id n9-20020a05600c3b8900b003b4ff30e566sm2126577wms.3.2022.10.19.07.17.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Oct 2022 07:17:59 -0700 (PDT) From: Amjad Ouled-Ameur Date: Wed, 19 Oct 2022 16:17:56 +0200 Subject: [PATCH v6 3/4] thermal: mediatek: add support for MT8365 SoC MIME-Version: 1.0 Message-Id: <20221018-up-i350-thermal-bringup-v6-3-c87b9f75550b@baylibre.com> References: <20221018-up-i350-thermal-bringup-v6-0-c87b9f75550b@baylibre.com> In-Reply-To: <20221018-up-i350-thermal-bringup-v6-0-c87b9f75550b@baylibre.com> To: Krzysztof Kozlowski , Zhang Rui , Amit Kucheria , Rob Herring , "Rafael J. Wysocki" , Daniel Lezcano Cc: Fabien Parent , linux-mediatek@lists.infradead.org, Rob Herring , Markus Schneider-Pargmann , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, AngeloGioacchino Del Regno , Michael Kao , Hsin-Yi Wang , Amjad Ouled-Ameur , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Matthias Brugger X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1666189076; l=4121; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=HsISGoJEL6++3d6wc/n5aLyLD13GWmaS4gC5p+H31oE=; b=YxmmoJ3iilhYKrbWs3ooRoegnp8DHuD/EV6lt0skoNW4T4dHaUwYO1XYl5pxBoAOU2cY/DlmNHB6 YGLJl+g9C8coG5IOD5N6duZ6gIRFqJlUi6M+UTLoZanjh1jQOlct X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747127665565631259?= X-GMAIL-MSGID: =?utf-8?q?1747127665565631259?= From: Fabien Parent MT8365 is similar to the other SoCs supported by the driver. It has only one bank and 3 actual sensors that can be multiplexed. There is another one sensor that does not have usable data. Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno --- drivers/thermal/mtk_thermal.c | 68 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index d8ddceb75372..3a5df1440822 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -31,6 +31,7 @@ #define AUXADC_CON2_V 0x010 #define AUXADC_DATA(channel) (0x14 + (channel) * 4) +#define APMIXED_SYS_TS_CON0 0x600 #define APMIXED_SYS_TS_CON1 0x604 /* Thermal Controller Registers */ @@ -245,6 +246,17 @@ enum mtk_thermal_version { /* The calibration coefficient of sensor */ #define MT8183_CALIBRATION 153 +/* MT8365 */ +#define MT8365_TEMP_AUXADC_CHANNEL 11 +#define MT8365_CALIBRATION 164 +#define MT8365_NUM_CONTROLLER 1 +#define MT8365_NUM_BANKS 1 +#define MT8365_NUM_SENSORS 3 +#define MT8365_NUM_SENSORS_PER_ZONE 3 +#define MT8365_TS1 0 +#define MT8365_TS2 1 +#define MT8365_TS3 2 + struct mtk_thermal; struct thermal_bank_cfg { @@ -389,6 +401,24 @@ static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, }; static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 }; static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, }; +/* MT8365 thermal sensor data */ +static const int mt8365_bank_data[MT8365_NUM_SENSORS] = { + MT8365_TS1, MT8365_TS2, MT8365_TS3 +}; + +static const int mt8365_msr[MT8365_NUM_SENSORS_PER_ZONE] = { + TEMP_MSR0, TEMP_MSR1, TEMP_MSR2 +}; + +static const int mt8365_adcpnp[MT8365_NUM_SENSORS_PER_ZONE] = { + TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2 +}; + +static const int mt8365_mux_values[MT8365_NUM_SENSORS] = { 0, 1, 2 }; +static const int mt8365_tc_offset[MT8365_NUM_CONTROLLER] = { 0 }; + +static const int mt8365_vts_index[MT8365_NUM_SENSORS] = { VTS1, VTS2, VTS3 }; + /* * The MT8173 thermal controller has four banks. Each bank can read up to * four temperature sensors simultaneously. The MT8173 has a total of 5 @@ -463,6 +493,40 @@ static const struct mtk_thermal_data mt2701_thermal_data = { .version = MTK_THERMAL_V1, }; +/* + * The MT8365 thermal controller has one bank, which can read up to + * four temperature sensors simultaneously. The MT8365 has a total of 3 + * temperature sensors. + * + * The thermal core only gets the maximum temperature of this one bank, + * so the bank concept wouldn't be necessary here. However, the SVS (Smart + * Voltage Scaling) unit makes its decisions based on the same bank + * data. + */ +static const struct mtk_thermal_data mt8365_thermal_data = { + .auxadc_channel = MT8365_TEMP_AUXADC_CHANNEL, + .num_banks = MT8365_NUM_BANKS, + .num_sensors = MT8365_NUM_SENSORS, + .vts_index = mt8365_vts_index, + .cali_val = MT8365_CALIBRATION, + .num_controller = MT8365_NUM_CONTROLLER, + .controller_offset = mt8365_tc_offset, + .need_switch_bank = false, + .bank_data = { + { + .num_sensors = MT8365_NUM_SENSORS, + .sensors = mt8365_bank_data + }, + }, + .msr = mt8365_msr, + .adcpnp = mt8365_adcpnp, + .sensor_mux_values = mt8365_mux_values, + .version = MTK_THERMAL_V1, + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON0, + .apmixed_buffer_ctl_mask = (u32) ~GENMASK(29, 28), + .apmixed_buffer_ctl_set = 0, +}; + /* * The MT2712 thermal controller has one bank, which can read up to * four temperature sensors simultaneously. The MT2712 has a total of 4 @@ -964,6 +1028,10 @@ static const struct of_device_id mtk_thermal_of_match[] = { { .compatible = "mediatek,mt8183-thermal", .data = (void *)&mt8183_thermal_data, + }, + { + .compatible = "mediatek,mt8365-thermal", + .data = (void *)&mt8365_thermal_data, }, { }, }; From patchwork Wed Oct 19 14:17:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 5601 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp367344wrs; Wed, 19 Oct 2022 07:46:51 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7GuBAKw7szGK3OwNpQHOMaOzS++6kV2pp9A4lsUCs5C2lTp79jvfqrcuk6A6CbaoJ3/6bt X-Received: by 2002:a17:907:320a:b0:741:72ee:8f3 with SMTP id xg10-20020a170907320a00b0074172ee08f3mr7154970ejb.168.1666190811584; Wed, 19 Oct 2022 07:46:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666190811; cv=none; d=google.com; s=arc-20160816; b=XtneLsNJktkV78bdLTpdULedO1YUbOT2wtsbXVCyIfkmzeI7XMzp1ax3zvV5DhFfto hSV59fHIffyD0hOC0s1rALaU3xvQ3i9tn2WhSjcG9cm/u7f7Nt4k3uZO9fZWByPN3jZH fx2DzdCmdlWwbEV0DyTqqg2yESJWhCgnh3Yc44dYNxQmwgOMiZp8qn+8XI22ogtr0uDv hjfq+WDcoBSrhyXWijUhugQ+nNfSbDHHncfzBIBy3+2afHu1HK/lXP6xab5Z+4gGppF8 F3P9sgJrjaedkY8sxMmrwcACUQzHZaRn4JxxO5ZkUjd8hzrFKibWUCeTGfBcef5riE5/ xAgw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=r1PrDZfmYougOsxckNxrQ+xzuB0k8iiqOh0Bd1vtSCc=; b=eW3UwZwiIQz99GqAXKH5aEWn5FuYnAWizR0ZWf6ieG7Ogj6AuTejXvQcRjRnv/oxSZ kduaePlNpLXv99x2B0qZGEwFjv4e+hJ6XEPwszs0I1HyKPXykbIoILMcJWURyUK5lOKP 7OLN/h+4DeJFPvlmg8rGPvaka2iyxoIyW900wWYfQ9WLYrPtB3u/s/uetng34Z5j5LHd n84iQiEEJaOpaYor8WP10WPudkUcYfZu/IxLtz//rJLkcaWu21JIPjwf07mo4sT1oM/k 8Cq+ROetKV0GipRFyzaYz/TGfBkQ1mp/PPm3GdUHPasQ/3MDa70QGYCMBFA7rbVK4R7c irew== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=crf2NXyI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[23.90.200.126]) by smtp.googlemail.com with ESMTPSA id n9-20020a05600c3b8900b003b4ff30e566sm2126577wms.3.2022.10.19.07.18.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Oct 2022 07:18:00 -0700 (PDT) From: Amjad Ouled-Ameur Date: Wed, 19 Oct 2022 16:17:57 +0200 Subject: [PATCH v6 4/4] thermal: mediatek: add another get_temp ops for thermal sensors MIME-Version: 1.0 Message-Id: <20221018-up-i350-thermal-bringup-v6-4-c87b9f75550b@baylibre.com> References: <20221018-up-i350-thermal-bringup-v6-0-c87b9f75550b@baylibre.com> In-Reply-To: <20221018-up-i350-thermal-bringup-v6-0-c87b9f75550b@baylibre.com> To: Krzysztof Kozlowski , Zhang Rui , Amit Kucheria , Rob Herring , "Rafael J. Wysocki" , Daniel Lezcano Cc: Fabien Parent , linux-mediatek@lists.infradead.org, Rob Herring , Markus Schneider-Pargmann , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, AngeloGioacchino Del Regno , Michael Kao , Hsin-Yi Wang , Amjad Ouled-Ameur , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Matthias Brugger X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1666189076; l=5964; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=PvZXnHsGezp4LZF6C3Dyxbe0D+0mUeauPzu2u+WwTJc=; b=mN12SgEKRbCMQ8J43HF0rMCxcYPMfYBZmq1IrycQ0tHL/y41ovLGQ3dNTGgXY8s8Q9yZ+3awDmcB 2AdC/id3A6pdrLQwfJbcFda3VLuZY4sTB5+Q7cxgdtso+O8UzYwJ X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747127696067633514?= X-GMAIL-MSGID: =?utf-8?q?1747127696067633514?= Provide thermal zone to read thermal sensor in the SoC. We can read all the thermal sensors value in the SoC by the node /sys/class/thermal/ In mtk_thermal_bank_temperature, return -EAGAIN instead of -EACCESS on the first read of sensor that often are bogus values. This can avoid following warning on boot: thermal thermal_zone6: failed to read out thermal zone (-13) Signed-off-by: Michael Kao Signed-off-by: Hsin-Yi Wang Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno --- drivers/thermal/mtk_thermal.c | 104 ++++++++++++++++++++++++++++++++---------- 1 file changed, 79 insertions(+), 25 deletions(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 3a5df1440822..311ad611fdab 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -259,6 +259,11 @@ enum mtk_thermal_version { struct mtk_thermal; +struct mtk_thermal_zone { + struct mtk_thermal *mt; + int id; +}; + struct thermal_bank_cfg { unsigned int num_sensors; const int *sensors; @@ -307,6 +312,8 @@ struct mtk_thermal { const struct mtk_thermal_data *conf; struct mtk_thermal_bank banks[MAX_NUM_ZONES]; + + int (*raw_to_mcelsius)(struct mtk_thermal *mt, int sensno, s32 raw); }; /* MT8183 thermal sensor data */ @@ -709,6 +716,29 @@ static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank) mutex_unlock(&mt->lock); } +static int _get_sensor_temp(struct mtk_thermal *mt, int id) +{ + u32 raw; + int temp; + + const struct mtk_thermal_data *conf = mt->conf; + + raw = readl(mt->thermal_base + conf->msr[id]); + + temp = mt->raw_to_mcelsius(mt, id, raw); + + /* + * The first read of a sensor often contains very high bogus + * temperature value. Filter these out so that the system does + * not immediately shut down. + */ + + if (temp > 200000) + return -EAGAIN; + else + return temp; +} + /** * mtk_thermal_bank_temperature - get the temperature of a bank * @bank: The bank @@ -721,26 +751,9 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) struct mtk_thermal *mt = bank->mt; const struct mtk_thermal_data *conf = mt->conf; int i, temp = INT_MIN, max = INT_MIN; - u32 raw; for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) { - raw = readl(mt->thermal_base + conf->msr[i]); - - if (mt->conf->version == MTK_THERMAL_V1) { - temp = raw_to_mcelsius_v1( - mt, conf->bank_data[bank->id].sensors[i], raw); - } else { - temp = raw_to_mcelsius_v2( - mt, conf->bank_data[bank->id].sensors[i], raw); - } - - /* - * The first read of a sensor often contains very high bogus - * temperature value. Filter these out so that the system does - * not immediately shut down. - */ - if (temp > 200000) - temp = 0; + temp = _get_sensor_temp(mt, i); if (temp > max) max = temp; @@ -749,9 +762,10 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) return max; } -static int mtk_read_temp(struct thermal_zone_device *tz, int *temperature) +static int mtk_read_temp(struct thermal_zone_device *tzdev, int *temperature) { - struct mtk_thermal *mt = tz->devdata; + struct mtk_thermal_zone *tz = tzdev->devdata; + struct mtk_thermal *mt = tz->mt; int i; int tempmax = INT_MIN; @@ -770,10 +784,28 @@ static int mtk_read_temp(struct thermal_zone_device *tz, int *temperature) return 0; } +static int mtk_read_sensor_temp(struct thermal_zone_device *tzdev, int *temperature) +{ + struct mtk_thermal_zone *tz = tzdev->devdata; + struct mtk_thermal *mt = tz->mt; + int id = tz->id - 1; + + if (id < 0) + return -EACCES; + + *temperature = _get_sensor_temp(mt, id); + + return 0; +} + static const struct thermal_zone_device_ops mtk_thermal_ops = { .get_temp = mtk_read_temp, }; +static const struct thermal_zone_device_ops mtk_thermal_sensor_ops = { + .get_temp = mtk_read_sensor_temp, +}; + static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num, u32 apmixed_phys_base, u32 auxadc_phys_base, int ctrl_id) @@ -1072,6 +1104,7 @@ static int mtk_thermal_probe(struct platform_device *pdev) u64 auxadc_phys_base, apmixed_phys_base; struct thermal_zone_device *tzdev; void __iomem *apmixed_base, *auxadc_base; + struct mtk_thermal_zone *tz; mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL); if (!mt) @@ -1150,6 +1183,9 @@ static int mtk_thermal_probe(struct platform_device *pdev) mtk_thermal_turn_on_buffer(mt, apmixed_base); + mt->raw_to_mcelsius = (mt->conf->version == MTK_THERMAL_V1) ? + raw_to_mcelsius_v1 : raw_to_mcelsius_v2; + if (mt->conf->version == MTK_THERMAL_V2) { mtk_thermal_release_periodic_ts(mt, auxadc_base); } @@ -1161,11 +1197,29 @@ static int mtk_thermal_probe(struct platform_device *pdev) platform_set_drvdata(pdev, mt); - tzdev = devm_thermal_of_zone_register(&pdev->dev, 0, mt, - &mtk_thermal_ops); - if (IS_ERR(tzdev)) { - ret = PTR_ERR(tzdev); - goto err_disable_clk_peri_therm; + for (i = 0; i < mt->conf->num_sensors + 1; i++) { + tz = devm_kmalloc(&pdev->dev, sizeof(*tz), GFP_KERNEL); + if (!tz) + return -ENOMEM; + + tz->mt = mt; + tz->id = i; + + tzdev = devm_thermal_of_zone_register(&pdev->dev, i, tz, (i == 0) ? + &mtk_thermal_ops : + &mtk_thermal_sensor_ops); + + if (IS_ERR(tzdev)) { + if (PTR_ERR(tzdev) == -ENODEV) { + dev_warn(&pdev->dev, + "sensor %d not registered in thermal zone in dt\n", i); + continue; + } + if (PTR_ERR(tzdev) == -EACCES) { + ret = PTR_ERR(tzdev); + goto err_disable_clk_peri_therm; + } + } } ret = devm_thermal_add_hwmon_sysfs(tzdev);