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Thu, 16 Mar 2023 05:34:43 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9CDA520043; Thu, 16 Mar 2023 05:34:42 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 21C2220040; Thu, 16 Mar 2023 05:34:41 +0000 (GMT) Received: from [9.200.144.91] (unknown [9.200.144.91]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 16 Mar 2023 05:34:40 +0000 (GMT) Message-ID: Date: Thu, 16 Mar 2023 13:34:40 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: [PATCH-2, rs6000] Put constant into pseudo at expand when it needs two insns [PR86106] To: gcc-patches Cc: Segher Boessenkool , David , "Kewen.Lin" , Peter Bergner Content-Language: en-US X-TM-AS-GCONF: 00 X-Proofpoint-GUID: gxm1D1eAvciuBYreOM_G11K8S1cYbAPp X-Proofpoint-ORIG-GUID: OPS-RMg7XTn9lVrK80yeo2pXmeICtVoM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-16_02,2023-03-15_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 spamscore=0 adultscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 mlxscore=0 mlxlogscore=999 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303150002 definitions=main-2303160042 X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: HAO CHEN GUI via Gcc-patches From: HAO CHEN GUI Reply-To: HAO CHEN GUI Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760501355700496103?= X-GMAIL-MSGID: =?utf-8?q?1760501416027090954?= Hi, The background and motivation of the patch are listed in the note of PATCH-1. This patch changes the expander of ior/xor and force constant to a pseudo when it needs 2 insn. Also a combine and split pattern for ior/xor is defined. rtx_cost of ior insn is adjusted as now it may have 2 insns for certain constants. We need to check the cost of each operand. Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. Thanks Gui Haochen ChangeLog 2023-03-14 Haochen Gui gcc/ * gcc/config/rs6000/rs6000.cc (rs6000_rtx_costs): Check the cost of each operand for IOR as it may have 2 insn for certain constants. * config/rs6000/rs6000.md (3): Put the second operand into register when it's a constant and need 2 ior/xor insns. (split for ior/xor): Remove. (*_2insn): New insn_and split pattern for 2-insn ior/xor. gcc/testsuite/ * gcc.target/powerpc/pr86106.c: New. patch.diff diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index b3a609f3aa3..f53daff547f 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -22081,10 +22081,6 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, return false; case IOR: - /* FIXME */ - *total = COSTS_N_INSNS (1); - return true; - case CLZ: case XOR: case ZERO_EXTRACT: diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index dba41e3df90..0541f48c42a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -3892,7 +3892,8 @@ (define_expand "3" DONE; } - if (non_logical_cint_operand (operands[2], mode)) + if (non_logical_cint_operand (operands[2], mode) + && !can_create_pseudo_p ()) { rtx tmp = ((!can_create_pseudo_p () || rtx_equal_p (operands[0], operands[1])) @@ -3907,15 +3908,17 @@ (define_expand "3" DONE; } - if (!reg_or_logical_cint_operand (operands[2], mode)) + if (!logical_operand (operands[2], mode)) operands[2] = force_reg (mode, operands[2]); }) -(define_split - [(set (match_operand:GPR 0 "gpc_reg_operand") - (iorxor:GPR (match_operand:GPR 1 "gpc_reg_operand") - (match_operand:GPR 2 "non_logical_cint_operand")))] +(define_insn_and_split "*_2insn" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") + (iorxor:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") + (match_operand:GPR 2 "non_logical_cint_operand" "n")))] "" + "#" + "&& (!reload_completed || rtx_equal_p (operands[0], operands[1]))" [(set (match_dup 3) (iorxor:GPR (match_dup 1) (match_dup 4))) @@ -3933,7 +3936,8 @@ (define_split operands[4] = GEN_INT (hi); operands[5] = GEN_INT (lo); -}) +} + [(set_attr "length" "8")]) (define_insn "*bool3_imm" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") diff --git a/gcc/testsuite/gcc.target/powerpc/pr86106.c b/gcc/testsuite/gcc.target/powerpc/pr86106.c new file mode 100644 index 00000000000..71501476800 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr86106.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-prefixed" } */ + +unsigned int +foo (unsigned int val) +{ + unsigned int mask = 0x7f7f7f7f; + + return ~(((val & mask) + mask) | val | mask); +} + +/* { dg-final { scan-assembler-not {\maddis\M} } } */ +/* { dg-final { scan-assembler-not {\maddi\M} } } */ +/* { dg-final { scan-assembler-not {\moris\M} } } */