From patchwork Wed Mar 15 20:59:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reinette Chatre X-Patchwork-Id: 70451 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp128101wrt; Wed, 15 Mar 2023 14:16:01 -0700 (PDT) X-Google-Smtp-Source: AK7set/rBbRynfZupUd8IVsjYoml5T1VFDiVqlXpJv0R5HaJGjpbdOXz1HZwCjMRX5T0OenjJ+Qy X-Received: by 2002:a62:6545:0:b0:625:6d5b:c019 with SMTP id z66-20020a626545000000b006256d5bc019mr720341pfb.11.1678914960923; Wed, 15 Mar 2023 14:16:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678914960; cv=none; d=google.com; s=arc-20160816; b=SKhTUQBAFRz/LzvUJyb7Z9qiNyaWYvxmaskD1cgOAUxVMPKTLh44lTLNMFooJq6qHt ALKULBX3aKNv2H9BQUnT7RujuFpL4uYghfcu3tR2bDgDed0tifDNkYlVK8YJlFOmF9Zz SjhJQhilj6+YXDho4goLVqTmBbHiIrRgiX4VGdMJ86D0wMWNKSTzFusUZXLELylVcxW9 qkGURDyw6DsJRBkHM/6SHPVJJ/J8Jv7GAx0jtTo+ohO9hPum2l4+b0GKlGfH8IgdJmo4 hwM0yrAX+UNlyrUNqw9RjqngpG+nm8Y6+zBTf59TXrIzCb4S96ynaZHi4/UQtEC1lZvE tn1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rn77HxnFrAS+rKKl2MieNXadcWaxGnJYHHONBhdAegs=; b=tdBb/Mqnf6cL3KxwgMspwZWU75p39z/3UWcSuMLCGrgD1XuTX4qV6da3pAZx3MoCMS c8fEQf8LqOwHjrh4it83+LiJE+bhjqKgLb6M+GxGyXZRONtSRsOz97gHhYomSW++iUqv IAVQKRCO9jf14WU01zlwQVIyjMIxZdPCChZtAxRh4Y4hK5s+KxKCACGhp+u66TVg7ORC nJWXlaCaFYG8xvw4qqEPoE4ziSs56Qn47NuAYvuAAqWPd8UHknM0cX7sZmRywZXTvgoQ a31UvltarVC00BbqAYDE1tFm2ULu6uT65ciCzSmmNKe3CDv3bOTmt0NwgeDTCnG6xkbQ aWIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=C02qq4gr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 6-20020a620606000000b005931febf7c0si5773513pfg.225.2023.03.15.14.15.47; Wed, 15 Mar 2023 14:16:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=C02qq4gr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232574AbjCOVAG (ORCPT + 99 others); Wed, 15 Mar 2023 17:00:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232513AbjCOU7o (ORCPT ); Wed, 15 Mar 2023 16:59:44 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3290E80902; Wed, 15 Mar 2023 13:59:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678913983; x=1710449983; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XbkcLI4n2teEQCC6ULXx558MPH5O1I8KLnT+xl6+hk8=; b=C02qq4gruf8QbbXjO8v1TxzvrvQdFoTdPu+2Jz5BiyP7nekRuH403AGt vpn6uk3Y/weqlDNIpwO1ui5lZm7BWwjB4bA46zFM0v2kpm7T9rFQEMa4a vnTxEvwiG3q29YnDJqGXxU4lrOHvVtjbolP5h8Ayo+ymiQSbGoAll/hP/ sCwDxThJZjqbvc6VMNSCDsXuNgaRiEzuxZH6d1LhGfXxDdbYFZn3bbZul DV8JJl52mEYDoSY83vAOC+haZgJU15dUjQQM0BH+HXYFzdIZ7zNncsG7Z HnVkF6yj5h0X/+HBIShvPaWhbHzIasgquJkFlhY0Rsd83He7HT6ul+eqD g==; X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="326176500" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="326176500" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="853747211" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="853747211" Received: from rchatre-ws.ostc.intel.com ([10.54.69.144]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:38 -0700 From: Reinette Chatre To: jgg@nvidia.com, yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com, alex.williamson@redhat.com Cc: tglx@linutronix.de, darwi@linutronix.de, kvm@vger.kernel.org, dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com, fenghua.yu@intel.com, tom.zanussi@linux.intel.com, reinette.chatre@intel.com, linux-kernel@vger.kernel.org Subject: [RFC PATCH 1/8] vfio/pci: Consolidate irq cleanup on MSI/MSI-X disable Date: Wed, 15 Mar 2023 13:59:21 -0700 Message-Id: <0da0db5b65804bf6ff2c8448e7b9dea9462e5c34.1678911529.git.reinette.chatre@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760469934280802461?= X-GMAIL-MSGID: =?utf-8?q?1760469934280802461?= vfio_msi_disable() releases all previously allocated state associated with each interrupt before disabling MSI/MSI-X. vfio_msi_disable() iterates twice over the interrupt state: first directly with a for loop to do virqfd cleanup, followed by another for loop within vfio_msi_set_block() that releases the interrupt and its state using vfio_msi_set_vector_signal(). Simplify interrupt cleanup by iterating over allocated interrupts once. Signed-off-by: Reinette Chatre --- drivers/vfio/pci/vfio_pci_intrs.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index bffb0741518b..6a9c6a143cc3 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -426,10 +426,9 @@ static void vfio_msi_disable(struct vfio_pci_core_device *vdev, bool msix) for (i = 0; i < vdev->num_ctx; i++) { vfio_virqfd_disable(&vdev->ctx[i].unmask); vfio_virqfd_disable(&vdev->ctx[i].mask); + vfio_msi_set_vector_signal(vdev, i, -1, msix); } - vfio_msi_set_block(vdev, 0, vdev->num_ctx, NULL, msix); - cmd = vfio_pci_memory_lock_and_enable(vdev); pci_free_irq_vectors(pdev); vfio_pci_memory_unlock_and_restore(vdev, cmd); From patchwork Wed Mar 15 20:59:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reinette Chatre X-Patchwork-Id: 70439 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp120187wrt; Wed, 15 Mar 2023 14:00:42 -0700 (PDT) X-Google-Smtp-Source: AK7set+fiSHzS65A3YtpP38t0Yb3kJ5Lg0cahVMb5VPgp9Qd8S5dYoQ7+rDQ/Hi1Rjzt9Qoycpi1 X-Received: by 2002:a17:90a:3ec1:b0:23d:48a9:3400 with SMTP id k59-20020a17090a3ec100b0023d48a93400mr1119373pjc.31.1678914042316; Wed, 15 Mar 2023 14:00:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678914042; cv=none; d=google.com; s=arc-20160816; b=FbdOwULYSDqUaQN5UT//INctAsM/Mf9bxi3m7AkzEu+6+QS/fQNPRZ2Nr0F81pcnBG B3TYekembgMTv9VkpGo0c19L+5OYYPhS5wHpvsgeOMzhy0XZh9n2Ai5ODzDFREvAg5QI GVrenvrogpCCAlwnd83JIP7hCwpkPEOS6Gz98yRrvNSo7tzCGco7kUwuXqb/SG+zrUjK UB0lGXaonKx6H1XzClbtmX4JgC9ubsoB1LoEA+vyyDW4TgD0FuN9qi0/t4euSpVgdrGm C0f4RU/IwRrniq5gfRjjrm/BkrXpx5Ut1PjVJWYYsGcTbPneHwQ2zE8dqW7yp1k6hyDD 3VKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Tx4PrERKb7krmKVRGybdm165r97HWZhP1uHMjIRNa9g=; b=Kg6+RyebA171pIc/lOgq1Yse+Tv9AksdBMQsOq2UIwIJQlqTpu2OxSQoMZsb1rXz7W cAGFXieDElOTR5+sHOWABzApYVbx6LVZFVPhyqX6CNE1BQ6yMUgYw1Wu/9ZJaIhZwSwm GwwhS5G79AZkWHCBzOcMwche4KQ0EZWVs7QXX8yQqUAQICiV7budeKmwb/iK0OlL0S/W t7A6ru257v6hGRI/rs1wwadVCCaf6I59VWUfl35nzJJhqZfhXZYA9kpjFTgjuspwMznw 7Zjn0DHA8uhr9Zzex1mk4/gC5zRCCpcR4CJAUw8fp3p8TtICNjbUiXDgIZEM9ltK3jMJ xZaw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=lARoTfPD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ij5-20020a170902ab4500b001a05a035709si6026538plb.141.2023.03.15.14.00.28; Wed, 15 Mar 2023 14:00:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=lARoTfPD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232406AbjCOU7p (ORCPT + 99 others); Wed, 15 Mar 2023 16:59:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232383AbjCOU7l (ORCPT ); Wed, 15 Mar 2023 16:59:41 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC21D85A4F; Wed, 15 Mar 2023 13:59:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678913979; x=1710449979; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Qbu9sl+61RQBLYcvTOuWSLXfqQGA99BUZPMWL8q3o7A=; b=lARoTfPD6xxYDl6LO3fEqXvXoTLr8sH7fGhOmtELD+/tr0Oy+GuVPvB6 dRqPrCtT4pvIdKxiS+v8wEvnfmK6KlW07Th/DDkvktzs9TVBAXB8a1PlI DtR6AmXk3iLs8ZKbpYhtqNfcQOu8fS+BbN97PCgBstdo9eNxRYwzHu4c8 gWCac5inQEANNnj4vEbnZh8DR5u1MLdnF+89BGfJaDoib+FUfJrHGARcV qWULhASca8gevSzpfkHjASrfWfLoagZzaqhSO6dSRlh61KXmPePxs+Mj6 7sKCHQ8p0XsdHYNbxol/Y1Yko6AH2cwHOh67MKH46FRVxUvfweyMPCwvm g==; X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="326176506" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="326176506" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="853747215" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="853747215" Received: from rchatre-ws.ostc.intel.com ([10.54.69.144]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:38 -0700 From: Reinette Chatre To: jgg@nvidia.com, yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com, alex.williamson@redhat.com Cc: tglx@linutronix.de, darwi@linutronix.de, kvm@vger.kernel.org, dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com, fenghua.yu@intel.com, tom.zanussi@linux.intel.com, reinette.chatre@intel.com, linux-kernel@vger.kernel.org Subject: [RFC PATCH 2/8] vfio/pci: Remove negative check on unsigned vector Date: Wed, 15 Mar 2023 13:59:22 -0700 Message-Id: <97b2809a7d786583233a07b56c42e220d1d6e5a7.1678911529.git.reinette.chatre@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760468970839287121?= X-GMAIL-MSGID: =?utf-8?q?1760468970839287121?= User space provides the vector as an unsigned int that is checked early for validity (vfio_set_irqs_validate_and_prepare()). A later negative check of the provided vector is not necessary. Remove the negative check and ensure the type used for the vector is consistent as an unsigned int. Signed-off-by: Reinette Chatre --- drivers/vfio/pci/vfio_pci_intrs.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index 6a9c6a143cc3..3f64ccdce69f 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -317,14 +317,14 @@ static int vfio_msi_enable(struct vfio_pci_core_device *vdev, int nvec, bool msi } static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, - int vector, int fd, bool msix) + unsigned int vector, int fd, bool msix) { struct pci_dev *pdev = vdev->pdev; struct eventfd_ctx *trigger; int irq, ret; u16 cmd; - if (vector < 0 || vector >= vdev->num_ctx) + if (vector >= vdev->num_ctx) return -EINVAL; irq = pci_irq_vector(pdev, vector); @@ -399,7 +399,8 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, static int vfio_msi_set_block(struct vfio_pci_core_device *vdev, unsigned start, unsigned count, int32_t *fds, bool msix) { - int i, j, ret = 0; + int i, ret = 0; + unsigned int j; if (start >= vdev->num_ctx || start + count > vdev->num_ctx) return -EINVAL; @@ -420,7 +421,7 @@ static int vfio_msi_set_block(struct vfio_pci_core_device *vdev, unsigned start, static void vfio_msi_disable(struct vfio_pci_core_device *vdev, bool msix) { struct pci_dev *pdev = vdev->pdev; - int i; + unsigned int i; u16 cmd; for (i = 0; i < vdev->num_ctx; i++) { @@ -542,7 +543,7 @@ static int vfio_pci_set_msi_trigger(struct vfio_pci_core_device *vdev, unsigned index, unsigned start, unsigned count, uint32_t flags, void *data) { - int i; + unsigned int i; bool msix = (index == VFIO_PCI_MSIX_IRQ_INDEX) ? true : false; if (irq_is(vdev, index) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) { From patchwork Wed Mar 15 20:59:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reinette Chatre X-Patchwork-Id: 70453 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp128220wrt; Wed, 15 Mar 2023 14:16:21 -0700 (PDT) X-Google-Smtp-Source: AK7set8NpYC3bpAri2NRPr/Ykq4yS0ZKYydukD00XM+WYySfmXdw7e7w4TlVixKBdJoTs5Vl19hK X-Received: by 2002:a17:902:f682:b0:1a0:7151:3cd8 with SMTP id l2-20020a170902f68200b001a071513cd8mr1151360plg.2.1678914981237; Wed, 15 Mar 2023 14:16:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678914981; cv=none; d=google.com; s=arc-20160816; b=ugxRomDzmLvjG9DxJuQaqhWQnI4GWNNE0385HzamAym1ME3dgTr4xqWPB3zLCG6p7U 3AD98i1WxXEocRlvF9YPiOAzDBwOvZjeP3BcuDa0Fw7sZgobOxpgZTIoFrM0DnQ16fph gwHhVbu1c5Jrk5WpeH6+KvzbOSeVzB/wVFhExuhK92CTP0tNGUhyqsYdRPlHvL9u+ft+ qo9FTAN7TtYUWeCJq4H3k3ceb9Pv7Z9PMFcBXweja2qvHWrPxQapSjeobUr07JgSG3+W MqSUd5ILJBzOaoik8jhpFi2YbeDgUJAoyC/XUxi/OpWSpkExsTsxvd+kTxi4KKTF//GS qEMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=fWqpSFStiuakn8ppXDWr4NT3MUHNLPGTgIlGwziDaCY=; b=E5iCB6/iHD3XshO2QdQPgWCFYBDd5xzMUqSl1e0Cf22mO+u8WXruKj8sddJgIoyAoZ pnG0/FGgedtPpqvFW4j7GnN+T+KlX5WG0wJ3rkjC6N2umA/q9rDgmHohVBFcp5tf6Jxr Q7qvUrvY3A2RCPmmWofuJzAtzQbRJtmmkNaCPZ/jsIi0VlVGva2/2YFjLmCNtjhjvim7 ebfN+Lim3LBPzRyOs+hH1YBd60khZ4DgX989/JSgaLQSLZX1FDVelR8bOcqT7U9mRRJE O5EnZZEE4iDJwe9hJJNun5CKDTxMGZqmzvs6Uu6VH1Y6ZAS93OsxJ9J/j8WEoaSqENJW 8zYQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=EPK7nRnm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k13-20020a170902d58d00b0019aa67f4a05si6430047plh.484.2023.03.15.14.16.08; Wed, 15 Mar 2023 14:16:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=EPK7nRnm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232580AbjCOU7z (ORCPT + 99 others); Wed, 15 Mar 2023 16:59:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232412AbjCOU7n (ORCPT ); Wed, 15 Mar 2023 16:59:43 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4161E9DE09; Wed, 15 Mar 2023 13:59:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678913981; x=1710449981; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=A+4ZcIQsKSo9aRxa5BQ1AU5NMqG5zxOH2Y36C6NWVys=; b=EPK7nRnmib3Smukwtv5IHyJ6JhVRtEEi7GP0XTjsMGwcsro8vGu7269h njTWd72FxmmkM1Y7qQ4nnx5a1+KelrndF12JMxqEzLiXZavhs1Myd+LkJ LKDkFj4fAfq6Zd0iIY0wUVjIcK7MBzOUrhSm9aihnfG+n2/qspeYWuvpy kUN5PL15anqt//iMx7jE7jYqw7zTKyjJqbK93SL1t0WQ2U6rvbmeO2goa uQpGu7Ijj1FvdP6MPN7Na/MlB+mV7VrT9N3HM1BeM6g7ICvKznFWeBbjb 7pBXaGJwWDKGwzCzXOWMrYP3/mSm+DQq8HwLh7wdgNj2S7D17gbBqw/JK A==; X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="326176513" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="326176513" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="853747217" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="853747217" Received: from rchatre-ws.ostc.intel.com ([10.54.69.144]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:38 -0700 From: Reinette Chatre To: jgg@nvidia.com, yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com, alex.williamson@redhat.com Cc: tglx@linutronix.de, darwi@linutronix.de, kvm@vger.kernel.org, dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com, fenghua.yu@intel.com, tom.zanussi@linux.intel.com, reinette.chatre@intel.com, linux-kernel@vger.kernel.org Subject: [RFC PATCH 3/8] vfio/pci: Prepare for dynamic interrupt context storage Date: Wed, 15 Mar 2023 13:59:23 -0700 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760469955191501693?= X-GMAIL-MSGID: =?utf-8?q?1760469955191501693?= Interrupt context storage is statically allocated at the time interrupts are enabled. Following allocation, the interrupt context is managed by directly accessing the elements of the array using the vector as index. It is possible to allocate additional MSI-X vectors after MSI-X has been enabled. Dynamic storage of interrupt context is needed to support adding new MSI-X vectors after initial enabling. Replace direct access of array elements with pointers to the array elements. Doing so reduces impact of moving to a new data structure. Move interactions with the array to helpers to mostly contain changes needed to transition to a dynamic data structure. No functional change intended. Signed-off-by: Reinette Chatre --- drivers/vfio/pci/vfio_pci_intrs.c | 206 ++++++++++++++++++++---------- 1 file changed, 140 insertions(+), 66 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index 3f64ccdce69f..ece371ebea00 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -48,6 +48,31 @@ static bool is_irq_none(struct vfio_pci_core_device *vdev) vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX); } +static +struct vfio_pci_irq_ctx *vfio_irq_ctx_get(struct vfio_pci_core_device *vdev, + unsigned long index) +{ + if (index >= vdev->num_ctx) + return NULL; + return &vdev->ctx[index]; +} + +static void vfio_irq_ctx_free_all(struct vfio_pci_core_device *vdev) +{ + kfree(vdev->ctx); +} + +static int vfio_irq_ctx_alloc_num(struct vfio_pci_core_device *vdev, + unsigned long num) +{ + vdev->ctx = kcalloc(num, sizeof(struct vfio_pci_irq_ctx), + GFP_KERNEL_ACCOUNT); + if (!vdev->ctx) + return -ENOMEM; + + return 0; +} + /* * INTx */ @@ -55,17 +80,28 @@ static void vfio_send_intx_eventfd(void *opaque, void *unused) { struct vfio_pci_core_device *vdev = opaque; - if (likely(is_intx(vdev) && !vdev->virq_disabled)) - eventfd_signal(vdev->ctx[0].trigger, 1); + if (likely(is_intx(vdev) && !vdev->virq_disabled)) { + struct vfio_pci_irq_ctx *ctx; + + ctx = vfio_irq_ctx_get(vdev, 0); + if (!ctx) + return; + eventfd_signal(ctx->trigger, 1); + } } /* Returns true if the INTx vfio_pci_irq_ctx.masked value is changed. */ bool vfio_pci_intx_mask(struct vfio_pci_core_device *vdev) { struct pci_dev *pdev = vdev->pdev; + struct vfio_pci_irq_ctx *ctx; unsigned long flags; bool masked_changed = false; + ctx = vfio_irq_ctx_get(vdev, 0); + if (!ctx) + return masked_changed; + spin_lock_irqsave(&vdev->irqlock, flags); /* @@ -77,7 +113,7 @@ bool vfio_pci_intx_mask(struct vfio_pci_core_device *vdev) if (unlikely(!is_intx(vdev))) { if (vdev->pci_2_3) pci_intx(pdev, 0); - } else if (!vdev->ctx[0].masked) { + } else if (!ctx->masked) { /* * Can't use check_and_mask here because we always want to * mask, not just when something is pending. @@ -87,7 +123,7 @@ bool vfio_pci_intx_mask(struct vfio_pci_core_device *vdev) else disable_irq_nosync(pdev->irq); - vdev->ctx[0].masked = true; + ctx->masked = true; masked_changed = true; } @@ -105,9 +141,14 @@ static int vfio_pci_intx_unmask_handler(void *opaque, void *unused) { struct vfio_pci_core_device *vdev = opaque; struct pci_dev *pdev = vdev->pdev; + struct vfio_pci_irq_ctx *ctx; unsigned long flags; int ret = 0; + ctx = vfio_irq_ctx_get(vdev, 0); + if (!ctx) + return ret; + spin_lock_irqsave(&vdev->irqlock, flags); /* @@ -117,7 +158,7 @@ static int vfio_pci_intx_unmask_handler(void *opaque, void *unused) if (unlikely(!is_intx(vdev))) { if (vdev->pci_2_3) pci_intx(pdev, 1); - } else if (vdev->ctx[0].masked && !vdev->virq_disabled) { + } else if (ctx->masked && !vdev->virq_disabled) { /* * A pending interrupt here would immediately trigger, * but we can avoid that overhead by just re-sending @@ -129,7 +170,7 @@ static int vfio_pci_intx_unmask_handler(void *opaque, void *unused) } else enable_irq(pdev->irq); - vdev->ctx[0].masked = (ret > 0); + ctx->masked = (ret > 0); } spin_unlock_irqrestore(&vdev->irqlock, flags); @@ -146,18 +187,23 @@ void vfio_pci_intx_unmask(struct vfio_pci_core_device *vdev) static irqreturn_t vfio_intx_handler(int irq, void *dev_id) { struct vfio_pci_core_device *vdev = dev_id; + struct vfio_pci_irq_ctx *ctx; unsigned long flags; int ret = IRQ_NONE; + ctx = vfio_irq_ctx_get(vdev, 0); + if (!ctx) + return ret; + spin_lock_irqsave(&vdev->irqlock, flags); if (!vdev->pci_2_3) { disable_irq_nosync(vdev->pdev->irq); - vdev->ctx[0].masked = true; + ctx->masked = true; ret = IRQ_HANDLED; - } else if (!vdev->ctx[0].masked && /* may be shared */ + } else if (!ctx->masked && /* may be shared */ pci_check_and_mask_intx(vdev->pdev)) { - vdev->ctx[0].masked = true; + ctx->masked = true; ret = IRQ_HANDLED; } @@ -171,15 +217,24 @@ static irqreturn_t vfio_intx_handler(int irq, void *dev_id) static int vfio_intx_enable(struct vfio_pci_core_device *vdev) { + struct vfio_pci_irq_ctx *ctx; + int ret; + if (!is_irq_none(vdev)) return -EINVAL; if (!vdev->pdev->irq) return -ENODEV; - vdev->ctx = kzalloc(sizeof(struct vfio_pci_irq_ctx), GFP_KERNEL_ACCOUNT); - if (!vdev->ctx) - return -ENOMEM; + ret = vfio_irq_ctx_alloc_num(vdev, 1); + if (ret) + return ret; + + ctx = vfio_irq_ctx_get(vdev, 0); + if (!ctx) { + vfio_irq_ctx_free_all(vdev); + return -EINVAL; + } vdev->num_ctx = 1; @@ -189,9 +244,9 @@ static int vfio_intx_enable(struct vfio_pci_core_device *vdev) * here, non-PCI-2.3 devices will have to wait until the * interrupt is enabled. */ - vdev->ctx[0].masked = vdev->virq_disabled; + ctx->masked = vdev->virq_disabled; if (vdev->pci_2_3) - pci_intx(vdev->pdev, !vdev->ctx[0].masked); + pci_intx(vdev->pdev, !ctx->masked); vdev->irq_type = VFIO_PCI_INTX_IRQ_INDEX; @@ -202,41 +257,46 @@ static int vfio_intx_set_signal(struct vfio_pci_core_device *vdev, int fd) { struct pci_dev *pdev = vdev->pdev; unsigned long irqflags = IRQF_SHARED; + struct vfio_pci_irq_ctx *ctx; struct eventfd_ctx *trigger; unsigned long flags; int ret; - if (vdev->ctx[0].trigger) { + ctx = vfio_irq_ctx_get(vdev, 0); + if (!ctx) + return -EINVAL; + + if (ctx->trigger) { free_irq(pdev->irq, vdev); - kfree(vdev->ctx[0].name); - eventfd_ctx_put(vdev->ctx[0].trigger); - vdev->ctx[0].trigger = NULL; + kfree(ctx->name); + eventfd_ctx_put(ctx->trigger); + ctx->trigger = NULL; } if (fd < 0) /* Disable only */ return 0; - vdev->ctx[0].name = kasprintf(GFP_KERNEL_ACCOUNT, "vfio-intx(%s)", - pci_name(pdev)); - if (!vdev->ctx[0].name) + ctx->name = kasprintf(GFP_KERNEL_ACCOUNT, "vfio-intx(%s)", + pci_name(pdev)); + if (!ctx->name) return -ENOMEM; trigger = eventfd_ctx_fdget(fd); if (IS_ERR(trigger)) { - kfree(vdev->ctx[0].name); + kfree(ctx->name); return PTR_ERR(trigger); } - vdev->ctx[0].trigger = trigger; + ctx->trigger = trigger; if (!vdev->pci_2_3) irqflags = 0; ret = request_irq(pdev->irq, vfio_intx_handler, - irqflags, vdev->ctx[0].name, vdev); + irqflags, ctx->name, vdev); if (ret) { - vdev->ctx[0].trigger = NULL; - kfree(vdev->ctx[0].name); + ctx->trigger = NULL; + kfree(ctx->name); eventfd_ctx_put(trigger); return ret; } @@ -246,7 +306,7 @@ static int vfio_intx_set_signal(struct vfio_pci_core_device *vdev, int fd) * disable_irq won't. */ spin_lock_irqsave(&vdev->irqlock, flags); - if (!vdev->pci_2_3 && vdev->ctx[0].masked) + if (!vdev->pci_2_3 && ctx->masked) disable_irq_nosync(pdev->irq); spin_unlock_irqrestore(&vdev->irqlock, flags); @@ -255,12 +315,17 @@ static int vfio_intx_set_signal(struct vfio_pci_core_device *vdev, int fd) static void vfio_intx_disable(struct vfio_pci_core_device *vdev) { - vfio_virqfd_disable(&vdev->ctx[0].unmask); - vfio_virqfd_disable(&vdev->ctx[0].mask); + struct vfio_pci_irq_ctx *ctx; + + ctx = vfio_irq_ctx_get(vdev, 0); + if (ctx) { + vfio_virqfd_disable(&ctx->unmask); + vfio_virqfd_disable(&ctx->mask); + } vfio_intx_set_signal(vdev, -1); vdev->irq_type = VFIO_PCI_NUM_IRQS; vdev->num_ctx = 0; - kfree(vdev->ctx); + vfio_irq_ctx_free_all(vdev); } /* @@ -284,10 +349,9 @@ static int vfio_msi_enable(struct vfio_pci_core_device *vdev, int nvec, bool msi if (!is_irq_none(vdev)) return -EINVAL; - vdev->ctx = kcalloc(nvec, sizeof(struct vfio_pci_irq_ctx), - GFP_KERNEL_ACCOUNT); - if (!vdev->ctx) - return -ENOMEM; + ret = vfio_irq_ctx_alloc_num(vdev, nvec); + if (ret) + return ret; /* return the number of supported vectors if we can't get all: */ cmd = vfio_pci_memory_lock_and_enable(vdev); @@ -296,7 +360,7 @@ static int vfio_msi_enable(struct vfio_pci_core_device *vdev, int nvec, bool msi if (ret > 0) pci_free_irq_vectors(pdev); vfio_pci_memory_unlock_and_restore(vdev, cmd); - kfree(vdev->ctx); + vfio_irq_ctx_free_all(vdev); return ret; } vfio_pci_memory_unlock_and_restore(vdev, cmd); @@ -320,6 +384,7 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, unsigned int vector, int fd, bool msix) { struct pci_dev *pdev = vdev->pdev; + struct vfio_pci_irq_ctx *ctx; struct eventfd_ctx *trigger; int irq, ret; u16 cmd; @@ -327,33 +392,33 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, if (vector >= vdev->num_ctx) return -EINVAL; + ctx = vfio_irq_ctx_get(vdev, vector); + if (!ctx) + return -EINVAL; irq = pci_irq_vector(pdev, vector); - if (vdev->ctx[vector].trigger) { - irq_bypass_unregister_producer(&vdev->ctx[vector].producer); + if (ctx->trigger) { + irq_bypass_unregister_producer(&ctx->producer); cmd = vfio_pci_memory_lock_and_enable(vdev); - free_irq(irq, vdev->ctx[vector].trigger); + free_irq(irq, ctx->trigger); vfio_pci_memory_unlock_and_restore(vdev, cmd); - - kfree(vdev->ctx[vector].name); - eventfd_ctx_put(vdev->ctx[vector].trigger); - vdev->ctx[vector].trigger = NULL; + kfree(ctx->name); + eventfd_ctx_put(ctx->trigger); + ctx->trigger = NULL; } if (fd < 0) return 0; - vdev->ctx[vector].name = kasprintf(GFP_KERNEL_ACCOUNT, - "vfio-msi%s[%d](%s)", - msix ? "x" : "", vector, - pci_name(pdev)); - if (!vdev->ctx[vector].name) + ctx->name = kasprintf(GFP_KERNEL_ACCOUNT, "vfio-msi%s[%d](%s)", + msix ? "x" : "", vector, pci_name(pdev)); + if (!ctx->name) return -ENOMEM; trigger = eventfd_ctx_fdget(fd); if (IS_ERR(trigger)) { - kfree(vdev->ctx[vector].name); + kfree(ctx->name); return PTR_ERR(trigger); } @@ -372,26 +437,25 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, pci_write_msi_msg(irq, &msg); } - ret = request_irq(irq, vfio_msihandler, 0, - vdev->ctx[vector].name, trigger); + ret = request_irq(irq, vfio_msihandler, 0, ctx->name, trigger); vfio_pci_memory_unlock_and_restore(vdev, cmd); if (ret) { - kfree(vdev->ctx[vector].name); + kfree(ctx->name); eventfd_ctx_put(trigger); return ret; } - vdev->ctx[vector].producer.token = trigger; - vdev->ctx[vector].producer.irq = irq; - ret = irq_bypass_register_producer(&vdev->ctx[vector].producer); + ctx->producer.token = trigger; + ctx->producer.irq = irq; + ret = irq_bypass_register_producer(&ctx->producer); if (unlikely(ret)) { dev_info(&pdev->dev, "irq bypass producer (token %p) registration fails: %d\n", - vdev->ctx[vector].producer.token, ret); + ctx->producer.token, ret); - vdev->ctx[vector].producer.token = NULL; + ctx->producer.token = NULL; } - vdev->ctx[vector].trigger = trigger; + ctx->trigger = trigger; return 0; } @@ -421,13 +485,17 @@ static int vfio_msi_set_block(struct vfio_pci_core_device *vdev, unsigned start, static void vfio_msi_disable(struct vfio_pci_core_device *vdev, bool msix) { struct pci_dev *pdev = vdev->pdev; + struct vfio_pci_irq_ctx *ctx; unsigned int i; u16 cmd; for (i = 0; i < vdev->num_ctx; i++) { - vfio_virqfd_disable(&vdev->ctx[i].unmask); - vfio_virqfd_disable(&vdev->ctx[i].mask); - vfio_msi_set_vector_signal(vdev, i, -1, msix); + ctx = vfio_irq_ctx_get(vdev, i); + if (ctx) { + vfio_virqfd_disable(&ctx->unmask); + vfio_virqfd_disable(&ctx->mask); + vfio_msi_set_vector_signal(vdev, i, -1, msix); + } } cmd = vfio_pci_memory_lock_and_enable(vdev); @@ -443,7 +511,7 @@ static void vfio_msi_disable(struct vfio_pci_core_device *vdev, bool msix) vdev->irq_type = VFIO_PCI_NUM_IRQS; vdev->num_ctx = 0; - kfree(vdev->ctx); + vfio_irq_ctx_free_all(vdev); } /* @@ -463,14 +531,18 @@ static int vfio_pci_set_intx_unmask(struct vfio_pci_core_device *vdev, if (unmask) vfio_pci_intx_unmask(vdev); } else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) { + struct vfio_pci_irq_ctx *ctx = vfio_irq_ctx_get(vdev, 0); int32_t fd = *(int32_t *)data; + + if (!ctx) + return -EINVAL; if (fd >= 0) return vfio_virqfd_enable((void *) vdev, vfio_pci_intx_unmask_handler, vfio_send_intx_eventfd, NULL, - &vdev->ctx[0].unmask, fd); + &ctx->unmask, fd); - vfio_virqfd_disable(&vdev->ctx[0].unmask); + vfio_virqfd_disable(&ctx->unmask); } return 0; @@ -543,6 +615,7 @@ static int vfio_pci_set_msi_trigger(struct vfio_pci_core_device *vdev, unsigned index, unsigned start, unsigned count, uint32_t flags, void *data) { + struct vfio_pci_irq_ctx *ctx; unsigned int i; bool msix = (index == VFIO_PCI_MSIX_IRQ_INDEX) ? true : false; @@ -577,14 +650,15 @@ static int vfio_pci_set_msi_trigger(struct vfio_pci_core_device *vdev, return -EINVAL; for (i = start; i < start + count; i++) { - if (!vdev->ctx[i].trigger) + ctx = vfio_irq_ctx_get(vdev, i); + if (!ctx || !ctx->trigger) continue; if (flags & VFIO_IRQ_SET_DATA_NONE) { - eventfd_signal(vdev->ctx[i].trigger, 1); + eventfd_signal(ctx->trigger, 1); } else if (flags & VFIO_IRQ_SET_DATA_BOOL) { uint8_t *bools = data; if (bools[i - start]) - eventfd_signal(vdev->ctx[i].trigger, 1); + eventfd_signal(ctx->trigger, 1); } } return 0; From patchwork Wed Mar 15 20:59:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reinette Chatre X-Patchwork-Id: 70447 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp126631wrt; Wed, 15 Mar 2023 14:12:54 -0700 (PDT) X-Google-Smtp-Source: AK7set8EEueqETgB0ZaJ398FbieexWbBVA8rfJXQ4DTZWmB5hlR6lHx3aWCLTOk8z5gQbP4kpK3k X-Received: by 2002:a17:902:d40d:b0:19f:1871:3dcd with SMTP id b13-20020a170902d40d00b0019f18713dcdmr720784ple.5.1678914773812; Wed, 15 Mar 2023 14:12:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678914773; cv=none; d=google.com; s=arc-20160816; b=ZH2P1ZWQuv+yln4zTLUIsiG5Jl998ESVIol/t5xnpiOydD+R2Hlhii5VvfQbie38QW qVOGjKmA4CA/+1ZTt1i9KQyO3eMtFeEK+12o060yAiOPeth125nEhUzlePfezoSX1CFn ciH70gRUsyIdRUKcs7GalfxNsATJMSoVUR2wLBfL3JXAQyqpW9E4Yb1UznI5EZ5puaat K+9+zmM+ok2yPuW6RS1/Yoclpif+ZXcIK+WNWmo6FqcTCBa8IysDp1KUQcMn/CGVkpmo lSCK5BRBjJtIsXUMQsZAjpeQi0j7CmzIeOeQAV84GwS+3iXKXoeUy8AaVY9LdSR/AHQ4 beVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=L+ddAXzQF7oqcjSICHZ3ZgdoJJcYPOx/7ua00Lmy7jM=; b=gqGlMfPKDtlL7Y/hi+PLV1sMfmDY6KdNHSBX2O5Dzh81vvR2Dcmfx59Erlx3Ptb1HT fAy9jV7pAp+MeywzNsxCImw55A5TAqMH2IClXHuVAAtbE+7qXdrjX7+nd0X/TgeJK1k6 2sL99tMVUfwusAFYodVn48NYLAyyB0fnZme/xKcz+3S8WxKwFuESuXU7KMJ19IvOKN+/ 57b0y//vIs5Z6vlT+M1BozpTohbVfTioQa6i6J3GIn1+qgHE1Xk7MFWAQQ0YtywFzDsX qUOFfhKVgB0va0ydHhhKP8L7xHQng4pSefFrN8IyuejO8Y1o8BBX5I3x2j4qmhMmqE8F qMww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="WyI/uzgX"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id p18-20020a170902ead200b001990520ebccsi6002945pld.587.2023.03.15.14.12.38; Wed, 15 Mar 2023 14:12:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="WyI/uzgX"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232750AbjCOVAA (ORCPT + 99 others); Wed, 15 Mar 2023 17:00:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232409AbjCOU7n (ORCPT ); Wed, 15 Mar 2023 16:59:43 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BDDF9DE22; Wed, 15 Mar 2023 13:59:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678913981; x=1710449981; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7dXez5k4GaMgDvxV5RxbsMB39Tz+QawY3iHxSZvUebU=; b=WyI/uzgXDZScG3ZMTUx/HD5VLUcpb+PM/eTAwji/GRP4ANeUfNEm44WZ A8ypQuQGIRj/SFp2gpFTxioqB4a6y+C3qVo2Z8+fEAqILAxBgmyqikhzW tNpSeqSuqPt5UOcHwXKjJRfjunUSts/wqZjI9VbFBXEHejPsgDsVtRpP0 c6WCriR1LQHbt8Mf+s7Ox9zc3ohSBr2gFHHLkNj5vhhXYv3bK+/ehIYZA /DK2J2ZmslXHzdMy6B/w5IRLGhDf6ZX7qJ89pqfIcQlJk2A/zLiGWs/u3 GWRagScrPgO/vw3LYJBrXl6PsDYB/bmTPM4w4b+mS1KiPGTeJmQdfa59H g==; X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="326176519" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="326176519" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="853747221" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="853747221" Received: from rchatre-ws.ostc.intel.com ([10.54.69.144]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 From: Reinette Chatre To: jgg@nvidia.com, yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com, alex.williamson@redhat.com Cc: tglx@linutronix.de, darwi@linutronix.de, kvm@vger.kernel.org, dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com, fenghua.yu@intel.com, tom.zanussi@linux.intel.com, reinette.chatre@intel.com, linux-kernel@vger.kernel.org Subject: [RFC PATCH 4/8] vfio/pci: Use xarray for interrupt context storage Date: Wed, 15 Mar 2023 13:59:24 -0700 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760469738009061468?= X-GMAIL-MSGID: =?utf-8?q?1760469738009061468?= Interrupt context is statically allocated at the time interrupts are enabled. Following allocation, the context is managed by directly accessing the elements of the array using the vector as index. The storage is released when interrupts are disabled. It is possible to dynamically allocate a single MSI-X index after MSI-X has been enabled. A dynamic storage for interrupt context is needed to support this. Replace the interrupt context array with an xarray (similar to what the core uses as store for MSI descriptors) that can support the dynamic expansion while maintaining the custom that uses the vector as index. Use the new data storage to allocate all elements once and free all elements together. Dynamic usage follows. Create helpers with understanding that it is only possible to (after initial MSI-X enabling) allocate a single MSI-X index at a time. The only time multiple MSI-X are allocated is during initial MSI-X enabling where failure results in no allocations. Signed-off-by: Reinette Chatre --- drivers/vfio/pci/vfio_pci_core.c | 1 + drivers/vfio/pci/vfio_pci_intrs.c | 63 +++++++++++++++++++++++-------- include/linux/vfio_pci_core.h | 2 +- 3 files changed, 49 insertions(+), 17 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index a5ab416cf476..ae0e161c7fc9 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -2102,6 +2102,7 @@ int vfio_pci_core_init_dev(struct vfio_device *core_vdev) INIT_LIST_HEAD(&vdev->vma_list); INIT_LIST_HEAD(&vdev->sriov_pfs_item); init_rwsem(&vdev->memory_lock); + xa_init(&vdev->ctx); return 0; } diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index ece371ebea00..bfcf5cb6b435 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -52,25 +52,59 @@ static struct vfio_pci_irq_ctx *vfio_irq_ctx_get(struct vfio_pci_core_device *vdev, unsigned long index) { - if (index >= vdev->num_ctx) - return NULL; - return &vdev->ctx[index]; + return xa_load(&vdev->ctx, index); } static void vfio_irq_ctx_free_all(struct vfio_pci_core_device *vdev) { - kfree(vdev->ctx); + struct vfio_pci_irq_ctx *ctx; + unsigned long index; + + xa_for_each(&vdev->ctx, index, ctx) { + xa_erase(&vdev->ctx, index); + kfree(ctx); + } } +static int vfio_irq_ctx_alloc_single(struct vfio_pci_core_device *vdev, + unsigned long index) +{ + struct vfio_pci_irq_ctx *ctx; + int ret; + + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL_ACCOUNT); + if (!ctx) + return -ENOMEM; + + ret = xa_insert(&vdev->ctx, index, ctx, GFP_KERNEL_ACCOUNT); + if (ret) { + kfree(ctx); + return ret; + } + + return 0; +} + +/* Only called during initial interrupt enabling. Never after. */ static int vfio_irq_ctx_alloc_num(struct vfio_pci_core_device *vdev, unsigned long num) { - vdev->ctx = kcalloc(num, sizeof(struct vfio_pci_irq_ctx), - GFP_KERNEL_ACCOUNT); - if (!vdev->ctx) - return -ENOMEM; + unsigned long index; + int ret; + + WARN_ON(!xa_empty(&vdev->ctx)); + + for (index = 0; index < num; index++) { + ret = vfio_irq_ctx_alloc_single(vdev, index); + if (ret) + goto err; + } return 0; + +err: + vfio_irq_ctx_free_all(vdev); + return ret; } /* @@ -486,16 +520,13 @@ static void vfio_msi_disable(struct vfio_pci_core_device *vdev, bool msix) { struct pci_dev *pdev = vdev->pdev; struct vfio_pci_irq_ctx *ctx; - unsigned int i; + unsigned long i; u16 cmd; - for (i = 0; i < vdev->num_ctx; i++) { - ctx = vfio_irq_ctx_get(vdev, i); - if (ctx) { - vfio_virqfd_disable(&ctx->unmask); - vfio_virqfd_disable(&ctx->mask); - vfio_msi_set_vector_signal(vdev, i, -1, msix); - } + xa_for_each(&vdev->ctx, i, ctx) { + vfio_virqfd_disable(&ctx->unmask); + vfio_virqfd_disable(&ctx->mask); + vfio_msi_set_vector_signal(vdev, i, -1, msix); } cmd = vfio_pci_memory_lock_and_enable(vdev); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 367fd79226a3..61d7873a3973 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -59,7 +59,7 @@ struct vfio_pci_core_device { struct perm_bits *msi_perm; spinlock_t irqlock; struct mutex igate; - struct vfio_pci_irq_ctx *ctx; + struct xarray ctx; int num_ctx; int irq_type; int num_regions; From patchwork Wed Mar 15 20:59:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reinette Chatre X-Patchwork-Id: 70454 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp128403wrt; Wed, 15 Mar 2023 14:16:47 -0700 (PDT) X-Google-Smtp-Source: AK7set+aqwO3/nvLcULZ21c1a3KD99hSbpK4xadlDse576qo1l0aCjVSovHhqbAsT98JYqsHlddv X-Received: by 2002:a05:6a00:a0e:b0:5a8:c469:e47c with SMTP id p14-20020a056a000a0e00b005a8c469e47cmr1174884pfh.10.1678915007000; Wed, 15 Mar 2023 14:16:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678915006; cv=none; d=google.com; s=arc-20160816; b=Yrt0xPwGVP33vGJesEPwzhtH8fBmGcFbVr0D6oEgtsnHcb4ioeEg3egiYMbZRWxXxw oaI/U5mA8EY8ErP5Ar13A30Pctzxv0yICPzkGDWlEDGmIPI4IKg+HWy8EbUXCwfPh0JX y98t4+CT+PhPUnjFKvbrU/CqstaIb1k+aKXsi8yC5AD1yHpNyNJ1n12kKVFxLsrcHw0L XcZcfOdhZdUe3giIYqed1qLY7oThlO0nLUtR8IkhG/oUn5XeLJhKObK4eJglSskHIoAW P3AruGVr6N2D0MBuI/hbqNFN9qWaSISnT7Xu1pIPjbeyDIB6JxTGi2bdRIvEbaLK9Lm5 EVEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0q+P1dQcn2jlw2uSfy+46KfLby6hHHQJLunPzy+uEII=; b=mZWsNYxwNto8q8GQ5AFaYNqOExL+nNiDz0Bw/zyjqw1V8T8kohfeB8KtH3tAe6C00e TA5wJuxLRvSNL/k3tVK1Q5n8iHc/VDwEr4BLwA9uVRR9tKyTm23iK9fctnO/SYjxDnRl 1O8M+jfK6A7XNufkRs7b9Py7jhuvwLeV9LPoNe2LxVYUsY9Dblpvm09dQQkHBXlEDpeg jnozy24dXugRuL2xywzPMdYfBudZILbRTwcCvChBWgihifhBhBWkpqRqXUCGQ31Rn3dK 3bzN8ORxM2Sh7dzOdEYutZ2tJZj29tGA65PGSY5wdLU1X75sq5V83wOz0fHIc3K0YOed 7P0A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=E3UsmQCi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id n7-20020a6543c7000000b0050bdca1b6dasi2569631pgp.27.2023.03.15.14.16.33; Wed, 15 Mar 2023 14:16:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=E3UsmQCi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232819AbjCOVAO (ORCPT + 99 others); Wed, 15 Mar 2023 17:00:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59190 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232498AbjCOU7o (ORCPT ); Wed, 15 Mar 2023 16:59:44 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E780900B3; Wed, 15 Mar 2023 13:59:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678913983; x=1710449983; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=j7plS9ITT8roz2joqbCS1lpsy17/bXANdR8t6kDnulg=; b=E3UsmQCiMcWdyW1wAxNvUQFxJ8gvF3cBRFkpFljnC3vbIyWaY9clqiiI /lTbNWGpZQSXopz0Is1lvrQz+Mzt8t1pnAO72R7oVDPKBB2GvlAptb+Sk 4haoMhBdjxDjsllTl/KpvYXgcRCGWs30xEapHgqb7MeykJCssHlBYAwqw TC8OTXbE7AWt7bF4F+tiLbHffOxSeDPIDnuVJtVuL+khjdIPOom8GaJ9u TmDsJGVlQ0iLtZbaps3AmAkTl0F/AKMcR2gdegucLzuqeZ1ynPG8hpbSu H1G00pXlKUicpC65vIDsNXph9Uwl8XIv9rveWG+pFVgI5ROaMiGdGHw8a A==; X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="326176524" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="326176524" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="853747225" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="853747225" Received: from rchatre-ws.ostc.intel.com ([10.54.69.144]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 From: Reinette Chatre To: jgg@nvidia.com, yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com, alex.williamson@redhat.com Cc: tglx@linutronix.de, darwi@linutronix.de, kvm@vger.kernel.org, dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com, fenghua.yu@intel.com, tom.zanussi@linux.intel.com, reinette.chatre@intel.com, linux-kernel@vger.kernel.org Subject: [RFC PATCH 5/8] vfio/pci: Remove interrupt context counter Date: Wed, 15 Mar 2023 13:59:25 -0700 Message-Id: <3154c63905481b5747a7457b275e2bce403b6f84.1678911529.git.reinette.chatre@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760469982563072488?= X-GMAIL-MSGID: =?utf-8?q?1760469982563072488?= struct vfio_pci_core_device::num_ctx counts how many interrupt contexts have been allocated. When all interrupt contexts are allocated simultaneously num_ctx provides the upper bound of all vectors that can be used as indices into the interrupt context array. With the upcoming support for dynamic MSI-X the number of interrupt contexts does not necessarily span the range of allocated interrupts. Consequently, num_ctx is no longer a trusted upper bound for valid indices. Stop using num_ctx to determine if a provided vector is valid, use the existence of interrupt context directly. Introduce a helper that ensures a provided interrupt range is allocated before any user requested action is taken. This maintains existing behavior (early exit without modifications) when user space attempts to modify a range of vectors that includes unallocated interrupts. The checks that ensure that user space provides a range of vectors that is valid for the device are untouched. Signed-off-by: Reinette Chatre --- Existing behavior on error paths is not maintained for MSI-X when adding support for dynamic MSI-X. Please see maintainer comments associated with "vfio/pci: Support dynamic MSI-x". drivers/vfio/pci/vfio_pci_intrs.c | 30 ++++++++++++++++++++---------- include/linux/vfio_pci_core.h | 1 - 2 files changed, 20 insertions(+), 11 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index bfcf5cb6b435..187a1ba34a16 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -107,6 +107,21 @@ static int vfio_irq_ctx_alloc_num(struct vfio_pci_core_device *vdev, return ret; } +static bool vfio_irq_ctx_range_allocated(struct vfio_pci_core_device *vdev, + unsigned int start, unsigned int count) +{ + struct vfio_pci_irq_ctx *ctx; + unsigned int i; + + for (i = start; i < start + count; i++) { + ctx = xa_load(&vdev->ctx, i); + if (!ctx) + return false; + } + + return true; +} + /* * INTx */ @@ -270,8 +285,6 @@ static int vfio_intx_enable(struct vfio_pci_core_device *vdev) return -EINVAL; } - vdev->num_ctx = 1; - /* * If the virtual interrupt is masked, restore it. Devices * supporting DisINTx can be masked at the hardware level @@ -358,7 +371,6 @@ static void vfio_intx_disable(struct vfio_pci_core_device *vdev) } vfio_intx_set_signal(vdev, -1); vdev->irq_type = VFIO_PCI_NUM_IRQS; - vdev->num_ctx = 0; vfio_irq_ctx_free_all(vdev); } @@ -399,7 +411,6 @@ static int vfio_msi_enable(struct vfio_pci_core_device *vdev, int nvec, bool msi } vfio_pci_memory_unlock_and_restore(vdev, cmd); - vdev->num_ctx = nvec; vdev->irq_type = msix ? VFIO_PCI_MSIX_IRQ_INDEX : VFIO_PCI_MSI_IRQ_INDEX; @@ -423,9 +434,6 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, int irq, ret; u16 cmd; - if (vector >= vdev->num_ctx) - return -EINVAL; - ctx = vfio_irq_ctx_get(vdev, vector); if (!ctx) return -EINVAL; @@ -500,7 +508,7 @@ static int vfio_msi_set_block(struct vfio_pci_core_device *vdev, unsigned start, int i, ret = 0; unsigned int j; - if (start >= vdev->num_ctx || start + count > vdev->num_ctx) + if (!vfio_irq_ctx_range_allocated(vdev, start, count)) return -EINVAL; for (i = 0, j = start; i < count && !ret; i++, j++) { @@ -541,7 +549,6 @@ static void vfio_msi_disable(struct vfio_pci_core_device *vdev, bool msix) pci_intx(pdev, 0); vdev->irq_type = VFIO_PCI_NUM_IRQS; - vdev->num_ctx = 0; vfio_irq_ctx_free_all(vdev); } @@ -677,7 +684,10 @@ static int vfio_pci_set_msi_trigger(struct vfio_pci_core_device *vdev, return ret; } - if (!irq_is(vdev, index) || start + count > vdev->num_ctx) + if (!irq_is(vdev, index)) + return -EINVAL; + + if (!vfio_irq_ctx_range_allocated(vdev, start, count)) return -EINVAL; for (i = start; i < start + count; i++) { diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 61d7873a3973..148fd1ae6c1c 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -60,7 +60,6 @@ struct vfio_pci_core_device { spinlock_t irqlock; struct mutex igate; struct xarray ctx; - int num_ctx; int irq_type; int num_regions; struct vfio_pci_region *region; From patchwork Wed Mar 15 20:59:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reinette Chatre X-Patchwork-Id: 70440 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp120483wrt; Wed, 15 Mar 2023 14:01:11 -0700 (PDT) X-Google-Smtp-Source: AK7set/uzzI7t9xwjWmCXL1ywNHCITvU3jDPCaY8an+AsCSn4WNGEMV5KVNdW+J0spPsqD/2gpCQ X-Received: by 2002:a17:90b:1b4f:b0:234:b6f5:7ddf with SMTP id nv15-20020a17090b1b4f00b00234b6f57ddfmr1081321pjb.44.1678914071552; Wed, 15 Mar 2023 14:01:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678914071; cv=none; d=google.com; s=arc-20160816; b=PfMm4ydgN3m9bPScmv2ADfwYCyaw8AdFWYtBbuplWwLI/brBXFcpUBr1rdpTtCarpb OPFkRTpGPyEh7lZT8BahnsQrr1QZQ7AIhisTA7mStxmfL+6iTDp8GfU+7ps+GA5LtJNE LLk3gkZyPOQ1V06IbLuHEPCejm/REtnImme0MF/2nqfgfwgxjzbVPdX9MZQqgToPBuRi 3ucnFugN3pgsNHwo8spZJrntDML/Vp0tf0vEjvKlT+VVaOeLzbL30AjoSmvj7iLKAaKb EXtpMMyZlKwTvgqsn3pH8iJ7stTifaXPdhNMPnm+rb+cXrZz0D2nMXZtOYc6Z00EXea0 h4mA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9Qyynil+Pchq3yMNp5cDSFc1x8YQPqiP1XiO4gfFJmU=; b=nXOWQxsbpJhIAcdvcEr1nl9p5y+jn61eIrklTpp+lsrFqCwTYdAjGG1yc6Ty3yBeQw t9LWGS2W9v8tD+RYSVZvxgS6XySvvTX55bvKq2JjAzjEpbiBbOPU8a4EG+L68BIphL5Q 81wo2b0e7RFYO9i7l9cBVHdS+NR89N/s7yK2ZuEahTdKGaaaj6IOT2CK0e+jLFONa12V ZiFmz3U/kDfLRY0vYWFnduSNtUpI4Ro4W/7o+fAz4F7R4+gpRO460i6p44Voy0lXgiVD UPMv7DKJ3O7M90aJMHRNHaI9H30jSG8iawDzvgSaMYkS/F0I0rsBYz53Yyr59UzYsrGo IsbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=T2t6R0Sg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v23-20020a17090abb9700b0023d3ecfb7bfsi2497644pjr.190.2023.03.15.14.00.58; Wed, 15 Mar 2023 14:01:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=T2t6R0Sg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232747AbjCOVAK (ORCPT + 99 others); Wed, 15 Mar 2023 17:00:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59194 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232503AbjCOU7o (ORCPT ); Wed, 15 Mar 2023 16:59:44 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C7F685690; Wed, 15 Mar 2023 13:59:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678913983; x=1710449983; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DMhH90UWDLh3tQDufZrmB4QPEnhvo2J9/K2HdYM+u74=; b=T2t6R0SgUdVaON7L7HUcwc+gdLWWVQEvw3K+//D1Omqh2PtV7U7bM2xV MUTs1j9wrOsXuNc117q0+dn34PEZFX+o+UwCR3KOe5ga+jrUMD+XALWyy tw4TpvKrvrKuBwK3lpOBP/z8AvX/0K4b4iwXHJuW6PnN6i5HA25HwLqr1 DvBO6YH7/hjBdosH9rg4vuOjYJXL+3Rn62Oj8yCfBAJCuAghqwxXumRaj 3OtxjnFypHxFeTAG26a5KE2bBYxk9YMWdNWvIF57zWV6SO+25zFRUTREk PhRsQ54ouPxmv3D4mwOMnUz19P2pG3swuqGYfPPskFfrPW2OkOC9fUHhW g==; X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="326176529" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="326176529" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="853747228" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="853747228" Received: from rchatre-ws.ostc.intel.com ([10.54.69.144]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 From: Reinette Chatre To: jgg@nvidia.com, yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com, alex.williamson@redhat.com Cc: tglx@linutronix.de, darwi@linutronix.de, kvm@vger.kernel.org, dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com, fenghua.yu@intel.com, tom.zanussi@linux.intel.com, reinette.chatre@intel.com, linux-kernel@vger.kernel.org Subject: [RFC PATCH 6/8] vfio/pci: Move to single error path Date: Wed, 15 Mar 2023 13:59:26 -0700 Message-Id: <2589209ff98360947bcbbbc000028bb6adc639ef.1678911529.git.reinette.chatre@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760469001456302260?= X-GMAIL-MSGID: =?utf-8?q?1760469001456302260?= The creation and release of interrupt context involves several steps that can fail. Cleanup after failure is done when the error is encountered, resulting in some repetitive code. Support for dynamic MSI-X will introduce more steps during interrupt context creation and release. Transition to centralized exit path in preparation for dynamic MSI-X to eliminate duplicate error handling code. Ensure no remaining state refers to freed memory. Signed-off-by: Reinette Chatre --- drivers/vfio/pci/vfio_pci_intrs.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index 187a1ba34a16..b375a12885ba 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -460,8 +460,8 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, trigger = eventfd_ctx_fdget(fd); if (IS_ERR(trigger)) { - kfree(ctx->name); - return PTR_ERR(trigger); + ret = PTR_ERR(trigger); + goto out_free_name; } /* @@ -481,11 +481,8 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, ret = request_irq(irq, vfio_msihandler, 0, ctx->name, trigger); vfio_pci_memory_unlock_and_restore(vdev, cmd); - if (ret) { - kfree(ctx->name); - eventfd_ctx_put(trigger); - return ret; - } + if (ret) + goto out_put_eventfd_ctx; ctx->producer.token = trigger; ctx->producer.irq = irq; @@ -500,6 +497,13 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, ctx->trigger = trigger; return 0; + +out_put_eventfd_ctx: + eventfd_ctx_put(trigger); +out_free_name: + kfree(ctx->name); + ctx->name = NULL; + return ret; } static int vfio_msi_set_block(struct vfio_pci_core_device *vdev, unsigned start, From patchwork Wed Mar 15 20:59:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reinette Chatre X-Patchwork-Id: 70441 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp120956wrt; Wed, 15 Mar 2023 14:01:58 -0700 (PDT) X-Google-Smtp-Source: AK7set+3xzGu1iROPP5Bet2fJ9YzM7RkFAShJQ3zLQqo1vPqVz/5ZqNwH52jDSGWMWtzuVwBNG6a X-Received: by 2002:a05:6a21:7892:b0:cd:7fcf:11a6 with SMTP id bf18-20020a056a21789200b000cd7fcf11a6mr1404740pzc.48.1678914118122; Wed, 15 Mar 2023 14:01:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678914118; cv=none; d=google.com; s=arc-20160816; b=cbSX+z1N+HNn809FdVuGT2j8RGOTJ21ARUQ2g8X2lrpKEYejN0P0jUzZHpPm1CAyY0 vKd7yKzOIMQleACOON6Q2sxBPn42tfLves+mgw+7zyaNGsLrebAo835yEfMB78Hz4b7x 2SdbGLfvwJMmrkARYk1Plt7DJAE68gsHmn6dBJeDPppAU6bAJZFD6l2mfNnNsy9SkEk4 5YeAb82wsqZddAw4WIWPynSop5+ikmjgcGha6pslTl1W9CankjZ9iJL7y9K/vSzqvAD5 EiCLR+2yItDOgy1z6OUQT57mknVHLbRk2vdmQGFCW/TdGzJ+6kG33yqKfQwZoKcAyjGx XWPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=GwGA9uqNrOqvI98VlCy+QRz9bL2l64KRbxKw3VaTwIo=; b=aUkp8VtltlpUpB4DTDTNrH7dkWeVE4AWFiOUKZi1oQr9CJJRGwcbVT3ZvSYRb9Ps2w Q+uER/CsSImObhV7AyCiuM0wGfc6vmLSNBorKieYeidxawT5kGtm/QKqPHlDPSa4scRY OElombUAQB31SQqJz5PtbXN0nUVNP4XoioetxKNbMKFnafHc6ihL5sRkAT29bPSVyqbk 9HlEKN8CjsZv6w1RFeZxS63adYloQMHM/z1N2zm1slMou47w6+D1AUK9IqjNYGtbrTV6 5fi6qQUfd3FK39a01D/eruIp6kwz9pRuRpyDg2wIxd0wJpdWTyEU5g18OH1wwK3erV1J YASQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bIqebSfy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j14-20020a63594e000000b004fb11698712si5838548pgm.332.2023.03.15.14.01.44; Wed, 15 Mar 2023 14:01:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bIqebSfy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232729AbjCOVAV (ORCPT + 99 others); Wed, 15 Mar 2023 17:00:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232588AbjCOU7q (ORCPT ); Wed, 15 Mar 2023 16:59:46 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA55F80E0C; Wed, 15 Mar 2023 13:59:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678913985; x=1710449985; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JSa8iDgjg3H/aceoIH3gESDgqHFGMkkzi2yi2ZVLSyY=; b=bIqebSfytjUc45WSje+w3ymKYJixik+vQ/zgMZAJqK5s5qB0kaXV4e5z 56sa0o/EIeAXJm7Et+p/YX/MjSTM4KMAJmobEAtqMUCJOzhowHpr/mYcG gDAFvWESdbOQq0x8VuWo3XjpAf8uEXyhQ/9eA9JDSGrwqYS2j0V2iLwou ZtpnXiHr7oVVroTZJFYGteuYNg3fK6sPKZFEQiZ3NQY6ClPVbZLW+Eavz gYQnd0th10nOBOVtNpvPDCWuB/rVdfx9HJdMaNPg7LqLiTOTtMsjXb3OV 087oph8XIZ1NT9+jUtuBSavcuiAkCydte6L0GZNzDudmaywNg7BYN5sS5 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="326176534" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="326176534" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="853747232" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="853747232" Received: from rchatre-ws.ostc.intel.com ([10.54.69.144]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 From: Reinette Chatre To: jgg@nvidia.com, yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com, alex.williamson@redhat.com Cc: tglx@linutronix.de, darwi@linutronix.de, kvm@vger.kernel.org, dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com, fenghua.yu@intel.com, tom.zanussi@linux.intel.com, reinette.chatre@intel.com, linux-kernel@vger.kernel.org Subject: [RFC PATCH 7/8] vfio/pci: Support dynamic MSI-x Date: Wed, 15 Mar 2023 13:59:27 -0700 Message-Id: <591ce11f4a33e022fc9242324ebdc077202bedaf.1678911529.git.reinette.chatre@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760469049857384977?= X-GMAIL-MSGID: =?utf-8?q?1760469049857384977?= Recently introduced pci_msix_alloc_irq_at() and pci_msix_free_irq() enables an individual MSI-X index to be allocated and freed after MSI-X enabling. Support dynamic MSI-X by keeping the association between allocated interrupt and vfio interrupt context. Allocate new context together with the new interrupt if no interrupt context exist for an MSI-X interrupt. Similarly, release an interrupt with its context. Signed-off-by: Reinette Chatre --- Guidance is appreciated on expectations regarding maintaining existing error behavior. Earlier patch introduced the vfio_irq_ctx_range_allocated() helper to maintain existing error behavior. Now, this helper needs to be disabled for MSI-X. User space not wanting to dynamically allocate MSI-X interrupts, but providing invalid range when providing a new ACTION will now obtain new interrupts or new failures (potentially including freeing of existing interrupts) if the allocation of the new interrupts fail. drivers/vfio/pci/vfio_pci_intrs.c | 101 ++++++++++++++++++++++++------ 1 file changed, 83 insertions(+), 18 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index b375a12885ba..954a70575802 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -55,6 +55,18 @@ struct vfio_pci_irq_ctx *vfio_irq_ctx_get(struct vfio_pci_core_device *vdev, return xa_load(&vdev->ctx, index); } +static void vfio_irq_ctx_free(struct vfio_pci_core_device *vdev, + unsigned long index) +{ + struct vfio_pci_irq_ctx *ctx; + + ctx = xa_load(&vdev->ctx, index); + if (ctx) { + xa_erase(&vdev->ctx, index); + kfree(ctx); + } +} + static void vfio_irq_ctx_free_all(struct vfio_pci_core_device *vdev) { struct vfio_pci_irq_ctx *ctx; @@ -430,33 +442,63 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, { struct pci_dev *pdev = vdev->pdev; struct vfio_pci_irq_ctx *ctx; + struct msi_map msix_map = {}; struct eventfd_ctx *trigger; + bool new_ctx; int irq, ret; u16 cmd; ctx = vfio_irq_ctx_get(vdev, vector); - if (!ctx) + /* Only MSI-X allows dynamic allocation. */ + if (!msix && !ctx) return -EINVAL; + irq = pci_irq_vector(pdev, vector); + /* Context and interrupt are always allocated together. */ + WARN_ON((ctx && irq == -EINVAL) || (!ctx && irq != -EINVAL)); - if (ctx->trigger) { + if (ctx && ctx->trigger) { irq_bypass_unregister_producer(&ctx->producer); cmd = vfio_pci_memory_lock_and_enable(vdev); free_irq(irq, ctx->trigger); + if (msix) { + msix_map.index = vector; + msix_map.virq = irq; + pci_msix_free_irq(pdev, msix_map); + irq = -EINVAL; + } vfio_pci_memory_unlock_and_restore(vdev, cmd); kfree(ctx->name); eventfd_ctx_put(ctx->trigger); ctx->trigger = NULL; + if (msix) { + vfio_irq_ctx_free(vdev, vector); + ctx = NULL; + } } if (fd < 0) return 0; + if (!ctx) { + ret = vfio_irq_ctx_alloc_single(vdev, vector); + if (ret) + return ret; + ctx = vfio_irq_ctx_get(vdev, vector); + if (!ctx) { + ret = -EINVAL; + goto out_free_ctx; + } + new_ctx = true; + } + ctx->name = kasprintf(GFP_KERNEL_ACCOUNT, "vfio-msi%s[%d](%s)", msix ? "x" : "", vector, pci_name(pdev)); - if (!ctx->name) - return -ENOMEM; + if (!ctx->name) { + ret = -ENOMEM; + goto out_free_ctx; + } trigger = eventfd_ctx_fdget(fd); if (IS_ERR(trigger)) { @@ -464,25 +506,38 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, goto out_free_name; } - /* - * The MSIx vector table resides in device memory which may be cleared - * via backdoor resets. We don't allow direct access to the vector - * table so even if a userspace driver attempts to save/restore around - * such a reset it would be unsuccessful. To avoid this, restore the - * cached value of the message prior to enabling. - */ cmd = vfio_pci_memory_lock_and_enable(vdev); if (msix) { - struct msi_msg msg; - - get_cached_msi_msg(irq, &msg); - pci_write_msi_msg(irq, &msg); + if (irq == -EINVAL) { + msix_map = pci_msix_alloc_irq_at(pdev, vector, NULL); + if (msix_map.index < 0) { + vfio_pci_memory_unlock_and_restore(vdev, cmd); + ret = msix_map.index; + goto out_put_eventfd_ctx; + } + irq = msix_map.virq; + } else { + /* + * The MSIx vector table resides in device memory which + * may be cleared via backdoor resets. We don't allow + * direct access to the vector table so even if a + * userspace driver attempts to save/restore around + * such a reset it would be unsuccessful. To avoid + * this, restore the cached value of the message prior + * to enabling. + */ + struct msi_msg msg; + + get_cached_msi_msg(irq, &msg); + pci_write_msi_msg(irq, &msg); + } } ret = request_irq(irq, vfio_msihandler, 0, ctx->name, trigger); - vfio_pci_memory_unlock_and_restore(vdev, cmd); if (ret) - goto out_put_eventfd_ctx; + goto out_free_irq_locked; + + vfio_pci_memory_unlock_and_restore(vdev, cmd); ctx->producer.token = trigger; ctx->producer.irq = irq; @@ -498,11 +553,21 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev, return 0; +out_free_irq_locked: + if (msix && new_ctx) { + msix_map.index = vector; + msix_map.virq = irq; + pci_msix_free_irq(pdev, msix_map); + } + vfio_pci_memory_unlock_and_restore(vdev, cmd); out_put_eventfd_ctx: eventfd_ctx_put(trigger); out_free_name: kfree(ctx->name); ctx->name = NULL; +out_free_ctx: + if (msix && new_ctx) + vfio_irq_ctx_free(vdev, vector); return ret; } @@ -512,7 +577,7 @@ static int vfio_msi_set_block(struct vfio_pci_core_device *vdev, unsigned start, int i, ret = 0; unsigned int j; - if (!vfio_irq_ctx_range_allocated(vdev, start, count)) + if (!msix && !vfio_irq_ctx_range_allocated(vdev, start, count)) return -EINVAL; for (i = 0, j = start; i < count && !ret; i++, j++) { From patchwork Wed Mar 15 20:59:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reinette Chatre X-Patchwork-Id: 70442 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp125949wrt; Wed, 15 Mar 2023 14:11:19 -0700 (PDT) X-Google-Smtp-Source: AK7set8Ovgva3xpumz0N6u7zq+cTYN1Q5Fa2sr3JzY+4qoh6/EV2fMW52CBAJaK/U5pCq5EFWVkw X-Received: by 2002:a05:6a20:699a:b0:cd:71de:e757 with SMTP id t26-20020a056a20699a00b000cd71dee757mr1525071pzk.32.1678914679689; Wed, 15 Mar 2023 14:11:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678914679; cv=none; d=google.com; s=arc-20160816; b=lXmbD2WxfdZhdKyzJd31BvrafZq6x1mJEkbdyQIWDvm348miZeetLIqDp/DzrTe6lO 7ZfEdkeUU390BYZ2ET+sUSwJRWQNgYW3SI4xZiHSKMYsGnD9XyrT+gQYi9joIdCO6dLv gkke9t4qAl4L+U8Q5MEUq3Q5PXw2F6GS5IuFsuTzqEligihdeOECwkuTDJPWcpE6YN0J /GCwpUxYK7Ya4iA5viQDxantedFQi46Iqg3QDL9dStlNBwiPc/3x7/enOGEYzgdCK+nt pjNKVvpkt512qwV6SUZzS69BoJCXsqadrPfTXef1Jkg45s2RjjGuc+o5PxmYGxp7K0T/ 1BnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0YW/W512RTtxPSBcQKJqJ1vZo15y6GVmzC9judIYRsc=; b=iZR6G9wE6r2X6jPiCJ3jubj3xucy0K9ccyNOk7qplyUcg3LoMFeSIw+ZscqeI8EYw0 kY5Q6FJ5A7RPpLwF0VXua1YnfislQklX6fOvs9ZKgqR63sDl6wPNtv0Ma9NmqRCvO94w dqBPrMzgkt9/rz5O9bEsz9BSrFAGa7vhj9ee+quxFxh1wHroSd6LT/S7dxkxqoL/l1YX na8hEHUPwGBK3vN0VGT1b8s2cKbvXSutYx/lfCG17eF1aeDJdlyJolCWpCAtHaZm30gV CjvhCYM8W8Wh27VvTNO8M+jzlotEXrBWwoEevkQQJ9ViDh6zcKNAKRCZs5UF4JIGVtGg NCYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=B2Mj7uSS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x189-20020a6386c6000000b0050bde92f3a3si2222084pgd.283.2023.03.15.14.11.02; Wed, 15 Mar 2023 14:11:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=B2Mj7uSS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232848AbjCOVAQ (ORCPT + 99 others); Wed, 15 Mar 2023 17:00:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232648AbjCOU7s (ORCPT ); Wed, 15 Mar 2023 16:59:48 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EAA5E8C97A; Wed, 15 Mar 2023 13:59:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678913985; x=1710449985; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7B1A/cTDYcTxTgWo5idyY91azCfGJIiJsYGrC8xzLuY=; b=B2Mj7uSSnLuerG/uJoRvgVyLqqQr8Nn27VGpFolzk18MaboTDG16YFDa dYvgIh/OUHfe66UJigazxjPumsipXCihsJVW8d5GJEMqK/M30i/LsEsjh aNZrWAx/z4KJuWH6qdycTf8juXCD+YJFB6g3OUba7F/BHu6vTzsJkqy8f euWWu8Izuo8FT2onugR5oyWQJuWkoPKAuF1a+T9UTCwhplDrICwD2XFmg 41oZp+mfSQNpMVhzoWntQpBHBh0CudsEjLh0eEK2ytT3SiLPpWayivrZy hnpSR7rwyXoOxMeTOwsP4SbPRnI11vRpvlPT20v/6Cv8xeck7egomVhzW g==; X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="326176540" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="326176540" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10650"; a="853747235" X-IronPort-AV: E=Sophos;i="5.98,262,1673942400"; d="scan'208";a="853747235" Received: from rchatre-ws.ostc.intel.com ([10.54.69.144]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2023 13:59:39 -0700 From: Reinette Chatre To: jgg@nvidia.com, yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com, alex.williamson@redhat.com Cc: tglx@linutronix.de, darwi@linutronix.de, kvm@vger.kernel.org, dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com, fenghua.yu@intel.com, tom.zanussi@linux.intel.com, reinette.chatre@intel.com, linux-kernel@vger.kernel.org Subject: [RFC PATCH 8/8] vfio/pci: Clear VFIO_IRQ_INFO_NORESIZE for MSI-X Date: Wed, 15 Mar 2023 13:59:28 -0700 Message-Id: <549e6300c0ea011cdce9a2712d49de4efd3a06b7.1678911529.git.reinette.chatre@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760469639125399485?= X-GMAIL-MSGID: =?utf-8?q?1760469639125399485?= Dynamic MSI-X is supported. Clear VFIO_IRQ_INFO_NORESIZE to provide guidance to user space. Signed-off-by: Reinette Chatre --- drivers/vfio/pci/vfio_pci_core.c | 2 +- include/uapi/linux/vfio.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index ae0e161c7fc9..1d071ee212a7 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -1111,7 +1111,7 @@ static int vfio_pci_ioctl_get_irq_info(struct vfio_pci_core_device *vdev, if (info.index == VFIO_PCI_INTX_IRQ_INDEX) info.flags |= (VFIO_IRQ_INFO_MASKABLE | VFIO_IRQ_INFO_AUTOMASKED); - else + else if (info.index != VFIO_PCI_MSIX_IRQ_INDEX) info.flags |= VFIO_IRQ_INFO_NORESIZE; return copy_to_user(arg, &info, minsz) ? -EFAULT : 0; diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h index 0552e8dcf0cb..1a36134cae5c 100644 --- a/include/uapi/linux/vfio.h +++ b/include/uapi/linux/vfio.h @@ -511,6 +511,9 @@ struct vfio_region_info_cap_nvlink2_lnkspd { * then add and unmask vectors, it's up to userspace to make the decision * whether to allocate the maximum supported number of vectors or tear * down setup and incrementally increase the vectors as each is enabled. + * Absence of the NORESIZE flag indicates that vectors can be enabled + * and disabled dynamically without impacting other vectors within the + * index. */ struct vfio_irq_info { __u32 argsz;