From patchwork Wed Mar 15 15:52:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 70290 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp2407617wrd; Wed, 15 Mar 2023 08:56:47 -0700 (PDT) X-Google-Smtp-Source: AK7set8U7tssndDhin1WnPvu1NJeX3K/8J4Xf1Q7uvv0jNu9S9Ve0EqxCqVz6QDf2//IFNOLh1dv X-Received: by 2002:a17:90b:1e4c:b0:237:99b9:c415 with SMTP id pi12-20020a17090b1e4c00b0023799b9c415mr166447pjb.38.1678895806800; Wed, 15 Mar 2023 08:56:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678895806; cv=none; d=google.com; s=arc-20160816; b=TRSp9kfmcAIluXMPtM9/x14T+HtFKQQk+JR0KhkevLMI6HBoauo6+XhhgQx2pYr1j/ dpjmnLom7r71bDp5fGhuS+rN1Mr9Hlqloe8tPuXVHckkKjnJjvNBS/Q7QBSi7VlGfwgW 1c6/hEGTSsr8+pjuGd0glisuqjzFd+tb+GAUkFTY4j0OdJkje86uC9cT7vU2mS/OxKtp H8mblqxzF4tNvV1cSFY5oF+XKg8t2PDubtvBBvrS38gLFxBxLi3dh4zkhVq1NM8URxwL JyJe9TFTZ9O2HhKffDra/41b4LmYohN0oE8JmSH+PcicC7YwNPq7ZxXSm7vPXtMLX43X kL0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=XCi0sFGU/bZfIGFWcczdfBpZzs0AJQJeF/GJyUhgGhk=; b=iEZhloBrLW8CU+IP9/SZ1r3zg0EUga1GR3kMIflk5dP7ZqgdnZXmm3uDuUyJqELFJa 8GzahaFlPIP/ZJ349633ow0O9856hEOAHU5SAxtisoFP/IxaLq2cPYQXanVlrNJ75nQT fS8wzeKvZ2PGsWe3tdsKV+G04G7k7MCy/Fp9AGop07oOI3goyBfufi2ciiD6vG4+8Slj cmQobISmxOUWnPCn/4yCFnlT+RwQlYgp5TdKqz+qagEpTU83zwyih9B6qwiY9Q5xu0pF ZqJEHQ2Knwyfno0/K4NW4HFdxN/gHWZDLf6bKpaJLzzGTz80WgJN1eCtXVSwP4u2poUf KNFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="I5d/uvPi"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c9-20020a170902d48900b0019638b14613si5746118plg.622.2023.03.15.08.56.31; Wed, 15 Mar 2023 08:56:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="I5d/uvPi"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232727AbjCOPx1 (ORCPT + 99 others); Wed, 15 Mar 2023 11:53:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232721AbjCOPxR (ORCPT ); Wed, 15 Mar 2023 11:53:17 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5804E7F008; Wed, 15 Mar 2023 08:52:43 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32FFqTLd020130; Wed, 15 Mar 2023 10:52:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678895549; bh=XCi0sFGU/bZfIGFWcczdfBpZzs0AJQJeF/GJyUhgGhk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=I5d/uvPihmNbnXaAFBLMRXfzw5nr0Tbe9gCYECYyxLYciOr+pFSe17HfPpMqgQNiL 7wtFrDbJjatEFIXLlRX/RptrfpXju0BVVOkjJN+pidDWkgMTCYv//SD7pbD3n4VHSN SC/SlzQPF3P8ddm8FjPfvbicSFGM4jGp0HnUW/sA= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32FFqTBt051769 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 15 Mar 2023 10:52:29 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 15 Mar 2023 10:52:29 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 15 Mar 2023 10:52:29 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32FFqTPc080258; Wed, 15 Mar 2023 10:52:29 -0500 From: Nishanth Menon To: Linus Walleij , Krzysztof Kozlowski , Rob Herring , Paolo Abeni , Jakub Kicinski , Eric Dumazet , "David S. Miller" CC: Sekhar Nori , , , , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Krzysztof Kozlowski Subject: [PATCH V2 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Drop pinmux header Date: Wed, 15 Mar 2023 10:52:26 -0500 Message-ID: <20230315155228.1566883-2-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230315155228.1566883-1-nm@ti.com> References: <20230315155228.1566883-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760449849297943866?= X-GMAIL-MSGID: =?utf-8?q?1760449849297943866?= Drop the pinmux header reference as it is not used. Examples should just show the node definition. Acked-by: Krzysztof Kozlowski Signed-off-by: Nishanth Menon --- Changes since V1: - Minor update to the commit message to indicate the header reference is not used. V1: https://lore.kernel.org/linux-arm-kernel/20230311131325.9750-2-nm@ti.com/ Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml index 628d63e1eb1f..f456093840ed 100644 --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml @@ -232,7 +232,6 @@ additionalProperties: false examples: - | - #include #include #include #include From patchwork Wed Mar 15 15:52:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 70293 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp2413553wrd; Wed, 15 Mar 2023 09:05:45 -0700 (PDT) X-Google-Smtp-Source: AK7set8UmAFyrOUW7fnZOfrAvfrqgJDU1CjjVH7BFdo3LEIO9SsFYv9ouhxto9PNpYYNyxJJxRV/ X-Received: by 2002:a17:902:ec89:b0:19e:6b50:e220 with SMTP id x9-20020a170902ec8900b0019e6b50e220mr29551plg.53.1678896345191; Wed, 15 Mar 2023 09:05:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678896345; cv=none; d=google.com; s=arc-20160816; b=jH3w55jUI4sQvYiPJ8vjQoP3EaoWObRdDavRQhJOwp0tGtLE6b55x7x0DRrAc9Pdny WlV9XNxsqSP9p9NiICYvckHhQV0XSOycEB7x+ZqgwcsYl19Ly4fNjrLmnu8P6I6SIsau JS3IeiaPMwnYueGLzQvmP62eKRr3YKBnBCcbiz5tG0xq6ppvsTSuut8AGASaLMJiUjzX eF0lm2CVNEuwysiFY9wg6EfuZ3EP9qRrozMGQ1007J4WNu+QcB9U5/lb2KcIMGxqCG5g Y44Ke72Ah4bN8rMpXgHxw9Yz5b9v4CJZs/DKZHpA0IVD6PueqKoQnUK+y0lc/C2ZS3yD lkzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=MJHlEh4SQ4FxeOSayn+5ZdFsEIRqOLoLNPKLzloF+bk=; b=qq8L2fvani5Q8fPsEr+grUoZQGBL6cO168rdafcexi3bcaXj/KE7Vy3jiHHIIpYApr Xz9+VUqQ4FZKFvCraZZF22FTNNXPn8HnfTXzmwHcTvZmOnYqQi7xACF6qRW7i3UeDMLV BBYleBRU5eG9vpFtl+e+nUWM1GMgv/jGW0IgKGDpKbr3Vx5cstleyvSEQLNfVh5hlYEU b8qHbRcAp3kljyQeQfMKfZkmPTu8b64eD0VzFZWa680eiRMTA3qpl5MNffJyEEzcUIYu fBECSpe17D3DQAuD7+bPIhy5WgP+KuRYBEQxhquSZTg85nnxES1G7WnmpRTc90rLV/LV 9fuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=OqBJADOr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id oc16-20020a17090b1c1000b00233773a522esi2025086pjb.49.2023.03.15.09.05.31; Wed, 15 Mar 2023 09:05:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=OqBJADOr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232495AbjCOPxo (ORCPT + 99 others); Wed, 15 Mar 2023 11:53:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232625AbjCOPxS (ORCPT ); Wed, 15 Mar 2023 11:53:18 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05EDB7FD41; Wed, 15 Mar 2023 08:52:44 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32FFqTYY020126; Wed, 15 Mar 2023 10:52:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678895549; bh=MJHlEh4SQ4FxeOSayn+5ZdFsEIRqOLoLNPKLzloF+bk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=OqBJADOr+xj2V2ls9GwTgcFzcMsgHixcIvbqy7frfM+l46AgmTjeEOLvzlygXCDhH SyaHChzSh8334Yr0iUdGimYnq8z+PzspD3tG61JDl4VmD4kehJvlb32kWgke7i9uYt LG7cOss5NvPSaXuN3glM34wVLEdYhyIcrvhNZDGI= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32FFqTF7051766 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 15 Mar 2023 10:52:29 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 15 Mar 2023 10:52:29 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 15 Mar 2023 10:52:29 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32FFqTNI025973; Wed, 15 Mar 2023 10:52:29 -0500 From: Nishanth Menon To: Linus Walleij , Krzysztof Kozlowski , Rob Herring , Paolo Abeni , Jakub Kicinski , Eric Dumazet , "David S. Miller" CC: Sekhar Nori , , , , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Krzysztof Kozlowski Subject: [PATCH V2 2/3] arm64: dts: ti: Use local header for pinctrl register values Date: Wed, 15 Mar 2023 10:52:27 -0500 Message-ID: <20230315155228.1566883-3-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230315155228.1566883-1-nm@ti.com> References: <20230315155228.1566883-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760450414097546460?= X-GMAIL-MSGID: =?utf-8?q?1760450414097546460?= The DTS uses hardware register values directly in pin controller pin configuration and not an abstraction of any form. These definitions were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. Store the constants in a header next to DTS and use them instead of bindings. Suggested-by: Krzysztof Kozlowski Suggested-by: Linus Walleij Link: https://lore.kernel.org/all/c4d53e9c-dac0-8ccc-dc86-faada324beba@linaro.org/ Signed-off-by: Nishanth Menon Acked-by: Krzysztof Kozlowski --- Changes since V1: - Updated $subject and $commit-message - Dropped the deletion of bindings header (instead followon patch provides a deprecation warning) - NOTE: checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, as explained in patches to include/dt-bindings/pinctrl/k3.h, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. V1: https://lore.kernel.org/linux-arm-kernel/20230311131325.9750-3-nm@ti.com/ arch/arm64/boot/dts/ti/k3-am62.dtsi | 3 +- arch/arm64/boot/dts/ti/k3-am62a.dtsi | 3 +- arch/arm64/boot/dts/ti/k3-am64.dtsi | 3 +- arch/arm64/boot/dts/ti/k3-am65.dtsi | 3 +- arch/arm64/boot/dts/ti/k3-j7200.dtsi | 3 +- arch/arm64/boot/dts/ti/k3-j721e.dtsi | 3 +- arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 3 +- arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 3 +- arch/arm64/boot/dts/ti/k3-pinctrl.h | 53 +++++++++++++++++++++++++++ 9 files changed, 69 insertions(+), 8 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-pinctrl.h diff --git a/arch/arm64/boot/dts/ti/k3-am62.dtsi b/arch/arm64/boot/dts/ti/k3-am62.dtsi index 37fcbe7a3c33..a401f5225243 100644 --- a/arch/arm64/boot/dts/ti/k3-am62.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62.dtsi @@ -8,9 +8,10 @@ #include #include #include -#include #include +#include "k3-pinctrl.h" + / { model = "Texas Instruments K3 AM625 SoC"; compatible = "ti,am625"; diff --git a/arch/arm64/boot/dts/ti/k3-am62a.dtsi b/arch/arm64/boot/dts/ti/k3-am62a.dtsi index 6eb87c3f9f3c..fe60c9ce21e3 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a.dtsi @@ -8,9 +8,10 @@ #include #include #include -#include #include +#include "k3-pinctrl.h" + / { model = "Texas Instruments K3 AM62A SoC"; compatible = "ti,am62a7"; diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi index c858725133af..60fe95b48312 100644 --- a/arch/arm64/boot/dts/ti/k3-am64.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi @@ -8,9 +8,10 @@ #include #include #include -#include #include +#include "k3-pinctrl.h" + / { model = "Texas Instruments K3 AM642 SoC"; compatible = "ti,am642"; diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index c538a0bf3cdd..3093ef6b9b23 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -8,9 +8,10 @@ #include #include #include -#include #include +#include "k3-pinctrl.h" + / { model = "Texas Instruments K3 AM654 SoC"; compatible = "ti,am654"; diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi index d74f86b0f622..bbe380c72a7e 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi @@ -7,9 +7,10 @@ #include #include -#include #include +#include "k3-pinctrl.h" + / { model = "Texas Instruments K3 J7200 SoC"; compatible = "ti,j7200"; diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index 6975cae644d9..4c7d5f9d61a8 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -7,9 +7,10 @@ #include #include -#include #include +#include "k3-pinctrl.h" + / { model = "Texas Instruments K3 J721E SoC"; compatible = "ti,j721e"; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi index 78295ee0fee5..376924726f1f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi @@ -10,9 +10,10 @@ #include #include -#include #include +#include "k3-pinctrl.h" + / { model = "Texas Instruments K3 J721S2 SoC"; diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi index 3eb0d0568959..2e03d84da7d2 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi @@ -10,9 +10,10 @@ #include #include -#include #include +#include "k3-pinctrl.h" + / { model = "Texas Instruments K3 J784S4 SoC"; compatible = "ti,j784s4"; diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h new file mode 100644 index 000000000000..c97548a3f42d --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for pinctrl bindings for TI's K3 SoC + * family. + * + * Copyright (C) 2018-2023 Texas Instruments Incorporated - https://www.ti.com/ + */ +#ifndef DTS_ARM64_TI_K3_PINCTRL_H +#define DTS_ARM64_TI_K3_PINCTRL_H + +#define PULLUDEN_SHIFT (16) +#define PULLTYPESEL_SHIFT (17) +#define RXACTIVE_SHIFT (18) + +#define PULL_DISABLE (1 << PULLUDEN_SHIFT) +#define PULL_ENABLE (0 << PULLUDEN_SHIFT) + +#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) +#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) + +#define INPUT_EN (1 << RXACTIVE_SHIFT) +#define INPUT_DISABLE (0 << RXACTIVE_SHIFT) + +/* Only these macros are expected be used directly in device tree files */ +#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) +#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) +#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) +#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN) + +#define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + +#define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + +#define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + +#define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + +#define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + +#define J721S2_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define J721S2_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + +#define J784S4_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define J784S4_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + +#endif From patchwork Wed Mar 15 15:52:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 70291 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp2407664wrd; Wed, 15 Mar 2023 08:56:51 -0700 (PDT) X-Google-Smtp-Source: AK7set9CGSh7AUhFzqfyXrBB8qzs/TbpsSHtwEaNDy3AiZMOGXQqKVU1/TcYv3uP8NhTHfeU+lI2 X-Received: by 2002:a17:902:cec1:b0:19a:723a:81ce with SMTP id d1-20020a170902cec100b0019a723a81cemr56862plg.19.1678895811393; Wed, 15 Mar 2023 08:56:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678895811; cv=none; d=google.com; s=arc-20160816; b=I4yB/D5FadoL9dQ5VvRPtmKrb+7FpHDROwodj1UVIYnG1eKNhdyP+QLmGurpU0Ta3l vfpztv46yqNr91eyf3ifbFvr3BczMDS38nWkL5DJHbSCz1rEwFRFuCcouhKVosjMvgL3 Ho/uMELfGNtCF3wP7W0nZLBTSKiN9yZN1PqR+X2AzJnaiRO8N/1cOi40IwYB2BwIpobf dYD1sqEGsmi25dHx45dgXbX3mB8BvGaf1j/K/GvCX5KL3AcsWlL5WOWiVNlN9gipNVsf yLl3p7mtk3Tisjc1d5vcr6QIROn7gF5VM5Fhq0w81BhlSN9g5ahzeKP9l25IUyVcuy9j Vtyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EPaGXL7WSbD+eR9e7fHd0vVyJfW9zplQ6K25URbSFzc=; b=ocXDOFvtwTfcGtU3YGlg49AwfMwshDv9nsUQc2xFRTJqw9KXmX+Ir0YGMbFMv8K6LT i74QGdQ0BIMlxMHkrzngE5vnBTpfd5IjthJfi4kSKr/buNqKLZhrOC0pGsF1bDjlD/Qv 2SsKwJH79FdBfEQ4TWt/QIu0qzGsTUf9B4W8B/S8Er1S6cQVaVD5QpsRYUro9Ayx8Bzr RMaKR/9whFEADJG9Iku7AUTDX0UlrSe/TySgFkMg5hWZ+WNrBna7qdpiA6XhbTH/1WKy E77dMdA5bOvN4QqafkiUPPneMzFgg7mEA0gpVhnTDG9Y3zIPgs3rlHXbYfFvnI6OBUZk yXVw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=pdWS6JTR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y2-20020a17090322c200b0019e88376e3csi6049705plg.162.2023.03.15.08.56.36; Wed, 15 Mar 2023 08:56:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=pdWS6JTR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232764AbjCOPxa (ORCPT + 99 others); Wed, 15 Mar 2023 11:53:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232739AbjCOPxR (ORCPT ); Wed, 15 Mar 2023 11:53:17 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 582B77F009; Wed, 15 Mar 2023 08:52:43 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32FFqTOI020134; Wed, 15 Mar 2023 10:52:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678895549; bh=EPaGXL7WSbD+eR9e7fHd0vVyJfW9zplQ6K25URbSFzc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pdWS6JTRCRT/PJ7N53qUfp6pGOlz/8K5IsU05cG6Dqdr/QxmnoZqhuC+9VHkJFXoz u+bbiO91kjwM3j5mLRgtcXLMkJtPt0ODPlqQ8Jqyy+Rqjy9TEdGlxrKigqdu6mk3uq homMfAM57CeiCyWOU3nQSEJrY3de9Ykszw925088= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32FFqTED051772 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 15 Mar 2023 10:52:29 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 15 Mar 2023 10:52:29 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 15 Mar 2023 10:52:29 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32FFqToR027876; Wed, 15 Mar 2023 10:52:29 -0500 From: Nishanth Menon To: Linus Walleij , Krzysztof Kozlowski , Rob Herring , Paolo Abeni , Jakub Kicinski , Eric Dumazet , "David S. Miller" CC: Sekhar Nori , , , , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Krzysztof Kozlowski Subject: [PATCH V2 3/3] dt-bindings: pinctrl: k3: Deprecate header with register constants Date: Wed, 15 Mar 2023 10:52:28 -0500 Message-ID: <20230315155228.1566883-4-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230315155228.1566883-1-nm@ti.com> References: <20230315155228.1566883-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760449854272164929?= X-GMAIL-MSGID: =?utf-8?q?1760449854272164929?= For convenience (less code duplication), the pin controller pin configuration register values were defined in the bindings header. These are not some IDs or other abstraction layer but raw numbers used in the registers. These constants do not fit the purpose of bindings. They do not provide any abstraction, any hardware and driver independent ID. In fact, the Linux pinctrl-single driver actually do not use the bindings header at all. All of the constants were moved already to headers local to DTS (residing in DTS directory), so remove any references to the bindings header and add a warning that it is deprecated. Suggested-by: Krzysztof Kozlowski Link: https://lore.kernel.org/linux-arm-kernel/71c7feff-4189-f12f-7353-bce41a61119d@linaro.org/ Signed-off-by: Nishanth Menon Reviewed-by: Krzysztof Kozlowski --- New patch in V2 series and we expect to remove this header after a kernel rev. include/dt-bindings/pinctrl/k3.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h index 6bb9df1a264d..b5aca149664e 100644 --- a/include/dt-bindings/pinctrl/k3.h +++ b/include/dt-bindings/pinctrl/k3.h @@ -8,6 +8,13 @@ #ifndef _DT_BINDINGS_PINCTRL_TI_K3_H #define _DT_BINDINGS_PINCTRL_TI_K3_H +/* + * These bindings are deprecated, because they do not match the actual + * concept of bindings but rather contain pure register values. + * Instead include the header in the DTS source directory. + */ +#warning "These bindings are deprecated. Instead, use the header in the DTS source directory." + #define PULLUDEN_SHIFT (16) #define PULLTYPESEL_SHIFT (17) #define RXACTIVE_SHIFT (18)