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Sun, 12 Mar 2023 07:02:19 -0500 From: Huang Rui To: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Boris Ostrovsky , =?utf-8?q?Roger_Pau_Monn?= =?utf-8?q?=C3=A9?= , , , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC PATCH 1/5] x86/xen: disable swiotlb for xen pvh Date: Sun, 12 Mar 2023 20:01:53 +0800 Message-ID: <20230312120157.452859-2-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312120157.452859-1-ray.huang@amd.com> References: <20230312120157.452859-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT009:EE_|CH0PR12MB8578:EE_ X-MS-Office365-Filtering-Correlation-Id: 4b5d0c5d-0f4e-415e-6dff-08db22f1a3ec X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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It will using the hardware IOMMU support instead of xen-swiotlb, so disable swiotlb if current domain is Xen PVH. Signed-off-by: Huang Rui --- arch/x86/kernel/pci-dma.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index 30bbe4abb5d6..f5c73dd18f2a 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c @@ -74,6 +74,12 @@ static inline void __init pci_swiotlb_detect(void) #ifdef CONFIG_SWIOTLB_XEN static void __init pci_xen_swiotlb_init(void) { + /* Xen PVH domain won't use swiotlb */ + if (xen_pvh_domain()) { + x86_swiotlb_enable = false; + return; + } + if (!xen_initial_domain() && !x86_swiotlb_enable) return; x86_swiotlb_enable = true; @@ -86,7 +92,7 @@ static void __init pci_xen_swiotlb_init(void) int pci_xen_swiotlb_init_late(void) { - if (dma_ops == &xen_swiotlb_dma_ops) + if (xen_pvh_domain() || dma_ops == &xen_swiotlb_dma_ops) return 0; /* we can work with the default swiotlb */ From patchwork Sun Mar 12 12:01:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 68290 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp690356wrd; Sun, 12 Mar 2023 05:14:56 -0700 (PDT) X-Google-Smtp-Source: AK7set+mVJwLAZZG+urTm8L/o6uq+S4HR041HcQz8t1JNPFaGfjO6qSAzY2jC2z8YvKvonsSH1l0 X-Received: by 2002:aa7:9546:0:b0:5d1:bb1a:f579 with SMTP id w6-20020aa79546000000b005d1bb1af579mr24364021pfq.4.1678623295649; Sun, 12 Mar 2023 05:14:55 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1678623295; cv=pass; d=google.com; s=arc-20160816; b=pZlrcB+EB4eOQEr7WAQ2eNfTL8yWdpiqHSD1Kx4L9YGX6elmKPe68S35X4qdXBEk6N CUOe11a/PgRTjpXNd1k+ocz7PoRGZQfosYwCjZ5wudl86aoDENC4Rd+XJruxMBSwJny3 sROiKzXO1DyE0SZuoNbJQ9V1T5fTF6bnv9gSEMe6qAQOnV2aQJjWGWtRKwiR7gFCsEH8 eyIVrNk84X5oZ8mRzh0Hw6jjNrww3yO9k8sxpdKC6NSWM2qDZaOOhadI9qNHvChknnnl 43+Va58QqfKnn8dwNarNqh3HO9lCcn0kCSu/wQypX4KXoJPGJ6+IDs0zb+iFkyflAbmZ IbmA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vERtBQZO4btnLGfti3VSOefpivXiYTBUA9KHiM91onM=; b=U8taOmjVFisIEDn5fJRCVW6QheksIq8QECCH3ADxV2l5PDvNSlWHEzuRrD0DkqIaRv 7pp9AVev1Ay2ll80vhJqgD/cp90pMjUz3uenXbGoBsOC7SSeRqph0BzsLNhifIpSEJN1 HXTKAnWmqVAtV37sMM8GF5+uCOv4RnW9DQlKBi43QIcJYuKEJtYgGyHUj9h30QnC21Fi HO01iQ33LSNfPe8Y6kFCBrSPNX0na3Jf2rwZmOT0WrsQllpAnQNznBT8QZxe7U+rWmwf vVaXTSNuCQHVqkKwdBs7qjTcxGJJpLkCGFyNp1KGvGB/58D2YnZG209qweDbrDQkLdq0 boZw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=N1lgjq+q; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Sun, 12 Mar 2023 07:02:23 -0500 From: Huang Rui To: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Boris Ostrovsky , =?utf-8?q?Roger_Pau_Monn?= =?utf-8?q?=C3=A9?= , , , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC PATCH 2/5] xen/grants: update initialization order of xen grant table Date: Sun, 12 Mar 2023 20:01:54 +0800 Message-ID: <20230312120157.452859-3-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312120157.452859-1-ray.huang@amd.com> References: <20230312120157.452859-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT106:EE_|IA1PR12MB6484:EE_ X-MS-Office365-Filtering-Correlation-Id: 41a5f9d5-9c4d-4d38-5abb-08db22f1a6cb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 12:02:28.2302 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 41a5f9d5-9c4d-4d38-5abb-08db22f1a6cb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT106.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6484 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760164101044321817?= X-GMAIL-MSGID: =?utf-8?q?1760164101044321817?= The xen grant table will be initialied before parsing the PCI resources, so xen_alloc_unpopulated_pages() ends up using a range from the PCI window because Linux hasn't parsed the PCI information yet. So modify the initialization order to make sure the real PCI resources are parsed before. Signed-off-by: Huang Rui --- arch/x86/xen/grant-table.c | 2 +- drivers/xen/grant-table.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/xen/grant-table.c b/arch/x86/xen/grant-table.c index 1e681bf62561..64a04d1e70f5 100644 --- a/arch/x86/xen/grant-table.c +++ b/arch/x86/xen/grant-table.c @@ -165,5 +165,5 @@ static int __init xen_pvh_gnttab_setup(void) } /* Call it _before_ __gnttab_init as we need to initialize the * xen_auto_xlat_grant_frames first. */ -core_initcall(xen_pvh_gnttab_setup); +fs_initcall_sync(xen_pvh_gnttab_setup); #endif diff --git a/drivers/xen/grant-table.c b/drivers/xen/grant-table.c index e1ec725c2819..6382112f3473 100644 --- a/drivers/xen/grant-table.c +++ b/drivers/xen/grant-table.c @@ -1680,4 +1680,4 @@ static int __gnttab_init(void) } /* Starts after core_initcall so that xen_pvh_gnttab_setup can be called * beforehand to initialize xen_auto_xlat_grant_frames. */ -core_initcall_sync(__gnttab_init); +rootfs_initcall(__gnttab_init); From patchwork Sun Mar 12 12:01:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 68292 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp694441wrd; Sun, 12 Mar 2023 05:25:35 -0700 (PDT) X-Google-Smtp-Source: AK7set99d0wazRvdCrIO22/8loPIYwWUvYR4jBcJV27Cx1ik4swTH8ujfw56yAp9afnptvukErKe X-Received: by 2002:a05:6a20:3d0c:b0:cb:6e5d:6ce0 with SMTP id y12-20020a056a203d0c00b000cb6e5d6ce0mr36907832pzi.37.1678623934974; Sun, 12 Mar 2023 05:25:34 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1678623934; cv=pass; d=google.com; s=arc-20160816; b=0Z6LP+RP+s02ymGWN5lbaGBlIgbDzKk7B5b/YXO+6+ErgboG2Y57vsp9q532gbIbtq qgx7n22kIs0SmhDmwyG5rtYnUBBiWDPamQoXbwiqDHCCuTj5O/aaLXK17S0dxc+Lz3lT wPZwg7fzkOhqvygnR2zo3HBtGrXUcG+TO1KHmASN0epP0U1qd9Not01nVOex8Hboav0X 8/vy03ifa0hBnKZZa2Nu0uG5BNOuJvQ4Xp1PErc87VMrHm6ysGU9J1hv5M36EOOcXNMM ZcY/przfss72pVrWdXAsh4b1Iws/xgBK4pbg2lKMS/Wkqv711EBcBsZYyhMhK+9Sn8wa qdRQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Nl4vhpfQhIyJx89i8nuCn4wVTGTo+7VCGWnMBqDbzaw=; b=l5s/xz1LBfBYAPrOkrvjQNctnCGTDS5bWCpX1J6kGL4Fb5Osx9v2EjwlZjCL+2ch7N tHTyvPLKC/hX0vHSdleBaM0IFJXSM8zZamf1Qs4WgttqrSTt9sOLJgfb2Wqs79vXe0KI GKhP/ZFqElEzP8y90Z//JhCuf/8/+NX5R7He6sR1M6fdXO6Cddcwep7eCca2U2Hsuy5V fncWJkRgfGCiaW9HH85aIdPqZ6+KpibiVRCjX9xDq2DsZB9fzQ0gEiyCmweqgwHLgWol DTBInVZKbSRPQusAFmdnvtmXpiVRO/JoAa5i3lCW49slHTielqrPa/nDzFHTjnupobFI j/0A== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=mwWQIZQR; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Sun, 12 Mar 2023 07:02:27 -0500 From: Huang Rui To: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Boris Ostrovsky , =?utf-8?q?Roger_Pau_Monn?= =?utf-8?q?=C3=A9?= , , , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC PATCH 3/5] drm/amdgpu: set passthrough mode for xen pvh/hvm Date: Sun, 12 Mar 2023 20:01:55 +0800 Message-ID: <20230312120157.452859-4-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312120157.452859-1-ray.huang@amd.com> References: <20230312120157.452859-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT018:EE_|BN9PR12MB5210:EE_ X-MS-Office365-Filtering-Correlation-Id: 75556c49-7a07-4c63-bee5-08db22f1aa4c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 12:02:34.0957 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 75556c49-7a07-4c63-bee5-08db22f1aa4c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT018.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5210 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760164770767293818?= X-GMAIL-MSGID: =?utf-8?q?1760164770767293818?= There is an second stage translation between the guest machine address and host machine address in Xen PVH/HVM. The PCI bar address in the xen guest kernel are not translated at the second stage on Xen PVH/HVM, so it's not the real physical address that hardware would like to know, so we need to set passthrough mode for Xen PVH/HVM as well. Signed-off-by: Huang Rui --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c index f2e2cbaa7fde..7b4369eba19d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c @@ -743,7 +743,8 @@ void amdgpu_detect_virtualization(struct amdgpu_device *adev) if (!reg) { /* passthrough mode exclus sriov mod */ - if (is_virtual_machine() && !xen_initial_domain()) + if (is_virtual_machine() && + !(xen_initial_domain() && xen_pv_domain())) adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE; } From patchwork Sun Mar 12 12:01:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 68296 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp710340wrd; Sun, 12 Mar 2023 06:10:56 -0700 (PDT) X-Google-Smtp-Source: AK7set86rABoI3GRn6w5T0Ng7dOWljw3iv4bxkpHbRst099f4qMetqbs/HPNw23bwv3q/4kPTH1B X-Received: by 2002:a05:6a20:1582:b0:cb:c266:3f6b with SMTP id h2-20020a056a20158200b000cbc2663f6bmr32392042pzj.12.1678626656106; Sun, 12 Mar 2023 06:10:56 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1678626656; cv=pass; d=google.com; s=arc-20160816; b=YtW/k/m9ACy8GlJds1jenv5boiSu2ec/aOBD0SUrGC19IwpzH4Jwka2x17qcusJ+Vy eA0WqJ1ivwtfwxsrET0MpB6Dcf3Ss1qSWPoRX2VP9LK1HyxC97D/RVEbzp8OmXFMqU4A Y4jC1tCfNtLpJMrgku1nvyGgi6cX+RYSMtztuR8f6WIbsqRJbO0ur2fsmjJiHAgQsFBc vUUb3Yuk0uyUfW9snL8VsrO46nh80dhoVCvqhkNNc8tREhHMcO50fN0DgiGndNLkY6jI TMwPg/rEAYgoVJ6OCcRcYWtXjBsleg2Nm+IBYUfpqpiQwZ+R2HfvmM5wE6YH2CylAis2 Xhow== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=o1LTPviXnOuA67LUwfQ8VmQyJX+Ek2+mzQI53Xd33fQ=; b=dxUHVSdiVQBtYVnZbN9U75ZYOxSTyC/4TB6i895C6QJj12H7g4n5Fv7G5+bt7ps7fI +d+ffp9EE1Ju/WNKvrreFzgHcAcTrwBzm3J7+6oz9Xyq6exOvjRtnBQN09SjDjJMNY2W C7v8svKVW967+UgM1t2m3wdikUMKxzsptIyby7qYFOisLVJk30K6rFO0ymuPTNsuOk/A 80E6wckEREA62DFALGpmvVZwoBw4pVITKHVQcpavmnzSJeULkVdHols3i8GczAT2uYQZ D1TQZFFpcO+v3Mk2Zia37+CaUy38UqUVNkXczW3W5dvFLq+YPstt3kcD+11MghZ9BSeq J9lA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=apLkSwvl; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Sun, 12 Mar 2023 07:02:31 -0500 From: Huang Rui To: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Boris Ostrovsky , =?utf-8?q?Roger_Pau_Monn?= =?utf-8?q?=C3=A9?= , , , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC PATCH 4/5] x86/xen: acpi registers gsi for xen pvh Date: Sun, 12 Mar 2023 20:01:56 +0800 Message-ID: <20230312120157.452859-5-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312120157.452859-1-ray.huang@amd.com> References: <20230312120157.452859-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT018:EE_|SJ1PR12MB6242:EE_ X-MS-Office365-Filtering-Correlation-Id: 66cf7cd0-10df-4759-3ca8-08db22f1ac78 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 12:02:37.7362 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 66cf7cd0-10df-4759-3ca8-08db22f1ac78 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT018.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6242 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760167624445408247?= X-GMAIL-MSGID: =?utf-8?q?1760167624445408247?= From: Chen Jiqian Add acpi_register_gsi_xen_pvh() to register gsi for PVH mode. In addition to call acpi_register_gsi_ioapic(), it also setup a map between gsi and vector in hypervisor side. So that, when dgpu create an interrupt, hypervisor can correctly find which guest domain to process interrupt by vector. Signed-off-by: Chen Jiqian Signed-off-by: Huang Rui --- arch/x86/include/asm/apic.h | 7 ++++++ arch/x86/include/asm/xen/pci.h | 5 ++++ arch/x86/kernel/acpi/boot.c | 2 +- arch/x86/pci/xen.c | 39 ++++++++++++++++++++++++++++++++ drivers/xen/events/events_base.c | 2 ++ 5 files changed, 54 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 3415321c8240..f3bc5de1f1d4 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -179,6 +179,8 @@ extern bool apic_needs_pit(void); extern void apic_send_IPI_allbutself(unsigned int vector); +extern int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, + int trigger, int polarity); #else /* !CONFIG_X86_LOCAL_APIC */ static inline void lapic_shutdown(void) { } #define local_apic_timer_c2_ok 1 @@ -193,6 +195,11 @@ static inline void apic_intr_mode_init(void) { } static inline void lapic_assign_system_vectors(void) { } static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { } static inline bool apic_needs_pit(void) { return true; } +static inline int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, + int trigger, int polarity) +{ + return (int)gsi; +} #endif /* !CONFIG_X86_LOCAL_APIC */ #ifdef CONFIG_X86_X2APIC diff --git a/arch/x86/include/asm/xen/pci.h b/arch/x86/include/asm/xen/pci.h index 9015b888edd6..aa8ded61fc2d 100644 --- a/arch/x86/include/asm/xen/pci.h +++ b/arch/x86/include/asm/xen/pci.h @@ -5,6 +5,7 @@ #if defined(CONFIG_PCI_XEN) extern int __init pci_xen_init(void); extern int __init pci_xen_hvm_init(void); +extern int __init pci_xen_pvh_init(void); #define pci_xen 1 #else #define pci_xen 0 @@ -13,6 +14,10 @@ static inline int pci_xen_hvm_init(void) { return -1; } +static inline int pci_xen_pvh_init(void) +{ + return -1; +} #endif #ifdef CONFIG_XEN_PV_DOM0 int __init pci_xen_initial_domain(void); diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 907cc98b1938..25ec48dd897e 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -718,7 +718,7 @@ static int acpi_register_gsi_pic(struct device *dev, u32 gsi, } #ifdef CONFIG_X86_LOCAL_APIC -static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, +int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, int trigger, int polarity) { int irq = gsi; diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index b94f727251b6..43b8b6d7147b 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -114,6 +114,38 @@ static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi, false /* no mapping of GSI to PIRQ */); } +static int acpi_register_gsi_xen_pvh(struct device *dev, u32 gsi, + int trigger, int polarity) +{ + int irq; + int rc; + struct physdev_map_pirq map_irq; + struct physdev_setup_gsi setup_gsi; + + irq = acpi_register_gsi_ioapic(dev, gsi, trigger, polarity); + + map_irq.domid = DOMID_SELF; + map_irq.type = MAP_PIRQ_TYPE_GSI; + map_irq.index = gsi; + map_irq.pirq = gsi; + + rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); + if (rc) + printk(KERN_ERR "xen map GSI: %u failed %d\n", gsi, rc); + + setup_gsi.gsi = gsi; + setup_gsi.triggering = (trigger == ACPI_EDGE_SENSITIVE ? 0 : 1); + setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1); + + rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi); + if (rc == -EEXIST) + printk(KERN_INFO "Already setup the GSI :%u\n", gsi); + else if (rc) + printk(KERN_ERR "Failed to setup GSI :%u, err_code:%d\n", gsi, rc); + + return irq; +} + #ifdef CONFIG_XEN_PV_DOM0 static int xen_register_gsi(u32 gsi, int triggering, int polarity) { @@ -554,6 +586,13 @@ int __init pci_xen_hvm_init(void) return 0; } +int __init pci_xen_pvh_init(void) +{ + __acpi_register_gsi = acpi_register_gsi_xen_pvh; + __acpi_unregister_gsi = NULL; + return 0; +} + #ifdef CONFIG_XEN_PV_DOM0 int __init pci_xen_initial_domain(void) { diff --git a/drivers/xen/events/events_base.c b/drivers/xen/events/events_base.c index c443f04aaad7..48dff0ed9acd 100644 --- a/drivers/xen/events/events_base.c +++ b/drivers/xen/events/events_base.c @@ -2317,6 +2317,8 @@ void __init xen_init_IRQ(void) xen_init_setup_upcall_vector(); xen_alloc_callback_vector(); + if (xen_pvh_domain()) + pci_xen_pvh_init(); if (xen_hvm_domain()) { native_init_IRQ(); From patchwork Sun Mar 12 12:01:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 68295 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp709421wrd; Sun, 12 Mar 2023 06:08:30 -0700 (PDT) X-Google-Smtp-Source: AK7set+GX+uK2sTciIUGMsBSwjzXVR/TYhB8gAud8HDfDikrmS+3fRHlf+H96myBU47NynlbiHVo X-Received: by 2002:a05:6a21:999d:b0:cb:a2eb:841f with SMTP id ve29-20020a056a21999d00b000cba2eb841fmr43274106pzb.53.1678626509686; Sun, 12 Mar 2023 06:08:29 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1678626509; cv=pass; d=google.com; s=arc-20160816; b=nWLBqCWE0rhrxWosNIOYKRaAUKv0RuLA9STboYSS1Itr4CADPjqZIp+b8MSnkkbmV7 1Rcr5re1HDXquypzkZj3tH/hmKQ3T7SAM7UwqermvRADkDh4kEJHr+K/00fZXt9f0Mmo 5kNoKNNeX3X/NXu+/gJDgGSHVlyU+/c7lpDrCwKaf2XQeon/sRkBjuQEd3a5K9Gtpuri DTsa/54XWuMOCL4g+pAsHhqCxBwVyDyqKWcasJOWgg615xk8ALwEcUflmvBt53fJImgJ 9rly1Swmiq8WMO1xJmC+rhgPB1+M8XdFQRN2V+JAuLAqetxFV/s5eGGd6jAjJ9zow2eG wXVA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=MS43mNiSDBnUD+5Kh3C9BXVuF+iauADexFTUQZ11670=; b=gxCIiEGB9CAR2FY1cqG6vdu3Fvrd33ND8F7dUfWt53RI3Rk4kYf0kxBsL3knK/c0uN MgRp2L0VOMupfoV4DMGL0yHyRN/GgodvsnOUCgQyfTWxnyKUTH/xQHpZEkhUN8EbnuJX MRtV/znRTMPZ2bC0qoo23N3zW6c8+C0/LqPBfsnNSTi9vWxxq0Ee1qQNJqSAaj4ir2yO p1PdbCABLEHucyRnJpoZB7LKTb3zdV2mUicMKGmXaMcWELDYcZX2l4YbBkcnV8rcoJt2 YkFBneacAm9ni6POvKxcdKZz1RpdMqDMO1peFmlNiPfn5Gq4PRmHNJS7W+io9GjL3JNj L3NA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=Hs2pDP9E; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Sun, 12 Mar 2023 07:02:35 -0500 From: Huang Rui To: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Boris Ostrovsky , =?utf-8?q?Roger_Pau_Monn?= =?utf-8?q?=C3=A9?= , , , , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC PATCH 5/5] xen/privcmd: add IOCTL_PRIVCMD_GSI_FROM_IRQ Date: Sun, 12 Mar 2023 20:01:57 +0800 Message-ID: <20230312120157.452859-6-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312120157.452859-1-ray.huang@amd.com> References: <20230312120157.452859-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT049:EE_|CY8PR12MB7194:EE_ X-MS-Office365-Filtering-Correlation-Id: 16c46202-8a5e-45eb-c067-08db22f1ae6e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 12:02:40.9513 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 16c46202-8a5e-45eb-c067-08db22f1ae6e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT049.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7194 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760167470741182350?= X-GMAIL-MSGID: =?utf-8?q?1760167470741182350?= From: Chen Jiqian When hypervisor get an interrupt, it needs interrupt's gsi number instead of irq number. Gsi number is unique in xen, but irq number is only unique in one domain. So, we need to record the relationship between irq and gsi when dom0 initialized pci devices, and provide syscall IOCTL_PRIVCMD_GSI_FROM_IRQ to translate irq to gsi. So that, we can map pirq successfully in hypervisor side. Signed-off-by: Chen Jiqian Signed-off-by: Huang Rui --- arch/x86/pci/xen.c | 4 ++++ drivers/xen/events/events_base.c | 37 ++++++++++++++++++++++++++++++++ drivers/xen/privcmd.c | 20 +++++++++++++++++ include/uapi/xen/privcmd.h | 7 ++++++ include/xen/events.h | 5 +++++ 5 files changed, 73 insertions(+) diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index 43b8b6d7147b..3237961c7640 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -143,6 +143,10 @@ static int acpi_register_gsi_xen_pvh(struct device *dev, u32 gsi, else if (rc) printk(KERN_ERR "Failed to setup GSI :%u, err_code:%d\n", gsi, rc); + rc = xen_pvh_add_gsi_irq_map(gsi, irq); + if (rc == -EEXIST) + printk(KERN_INFO "Already map the GSI :%u and IRQ: %d\n", gsi, irq); + return irq; } diff --git a/drivers/xen/events/events_base.c b/drivers/xen/events/events_base.c index 48dff0ed9acd..39a57fed2de3 100644 --- a/drivers/xen/events/events_base.c +++ b/drivers/xen/events/events_base.c @@ -967,6 +967,43 @@ int xen_irq_from_gsi(unsigned gsi) } EXPORT_SYMBOL_GPL(xen_irq_from_gsi); +int xen_gsi_from_irq(unsigned irq) +{ + struct irq_info *info; + + list_for_each_entry(info, &xen_irq_list_head, list) { + if (info->type != IRQT_PIRQ) + continue; + + if (info->irq == irq) + return info->u.pirq.gsi; + } + + return -1; +} +EXPORT_SYMBOL_GPL(xen_gsi_from_irq); + +int xen_pvh_add_gsi_irq_map(unsigned gsi, unsigned irq) +{ + int tmp_irq; + struct irq_info *info; + + tmp_irq = xen_irq_from_gsi(gsi); + if (tmp_irq != -1) + return -EEXIST; + + info = kzalloc(sizeof(*info), GFP_KERNEL); + if (info == NULL) + panic("Unable to allocate metadata for GSI%d\n", gsi); + + info->type = IRQT_PIRQ; + info->irq = irq; + info->u.pirq.gsi = gsi; + list_add_tail(&info->list, &xen_irq_list_head); + + return 0; +} + static void __unbind_from_irq(unsigned int irq) { evtchn_port_t evtchn = evtchn_from_irq(irq); diff --git a/drivers/xen/privcmd.c b/drivers/xen/privcmd.c index e88e8f6f0a33..830e84451731 100644 --- a/drivers/xen/privcmd.c +++ b/drivers/xen/privcmd.c @@ -37,6 +37,7 @@ #include #include #include +#include #include "privcmd.h" @@ -833,6 +834,21 @@ static long privcmd_ioctl_mmap_resource(struct file *file, return rc; } +static long privcmd_ioctl_gsi_from_irq(struct file *file, void __user *udata) +{ + struct privcmd_gsi_from_irq kdata; + + if (copy_from_user(&kdata, udata, sizeof(kdata))) + return -EFAULT; + + kdata.gsi = xen_gsi_from_irq(kdata.irq); + + if (copy_to_user(udata, &kdata, sizeof(kdata))) + return -EFAULT; + + return 0; +} + static long privcmd_ioctl(struct file *file, unsigned int cmd, unsigned long data) { @@ -868,6 +884,10 @@ static long privcmd_ioctl(struct file *file, ret = privcmd_ioctl_mmap_resource(file, udata); break; + case IOCTL_PRIVCMD_GSI_FROM_IRQ: + ret = privcmd_ioctl_gsi_from_irq(file, udata); + break; + default: break; } diff --git a/include/uapi/xen/privcmd.h b/include/uapi/xen/privcmd.h index d2029556083e..55fe748bbfd7 100644 --- a/include/uapi/xen/privcmd.h +++ b/include/uapi/xen/privcmd.h @@ -98,6 +98,11 @@ struct privcmd_mmap_resource { __u64 addr; }; +struct privcmd_gsi_from_irq { + __u32 irq; + __u32 gsi; +}; + /* * @cmd: IOCTL_PRIVCMD_HYPERCALL * @arg: &privcmd_hypercall_t @@ -125,5 +130,7 @@ struct privcmd_mmap_resource { _IOC(_IOC_NONE, 'P', 6, sizeof(domid_t)) #define IOCTL_PRIVCMD_MMAP_RESOURCE \ _IOC(_IOC_NONE, 'P', 7, sizeof(struct privcmd_mmap_resource)) +#define IOCTL_PRIVCMD_GSI_FROM_IRQ \ + _IOC(_IOC_NONE, 'P', 8, sizeof(struct privcmd_gsi_from_irq)) #endif /* __LINUX_PUBLIC_PRIVCMD_H__ */ diff --git a/include/xen/events.h b/include/xen/events.h index 344081e71584..8377d8dfaa71 100644 --- a/include/xen/events.h +++ b/include/xen/events.h @@ -133,6 +133,11 @@ int xen_pirq_from_irq(unsigned irq); /* Return the irq allocated to the gsi */ int xen_irq_from_gsi(unsigned gsi); +/* Return the gsi from irq */ +int xen_gsi_from_irq(unsigned irq); + +int xen_pvh_add_gsi_irq_map(unsigned gsi, unsigned irq); + /* Determine whether to ignore this IRQ if it is passed to a guest. */ int xen_test_irq_shared(int irq);