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Sat, 11 Mar 2023 15:17:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=jiaxyga.com; s=mailru; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:From:Subject:Content-Type:Content-Transfer-Encoding:To:Cc; bh=zZT7SzQItSXGsV/KQyC5x/5aIAx9EI9rLbBKcRq43u4=; t=1678576659;x=1678666659; b=RC5Sg2cy2EIFmFMTZDEqdviAQaCOAYfFouUcw8LGTzQhuG2lydgj1g6DrjxXnn+aTBTpqwBqoPEkOukreB1so4UNU9damS1R+6he74hyI2dnjz46atY+u5z8dDy+a2KSnEVD7i7FEU36sp78tW4g+l/ZDTj7ZaxMWXKNxxLgp1o=; Received: by smtp46.i.mail.ru with esmtpa (envelope-from ) id 1pb8T2-00B9aE-QV; Sun, 12 Mar 2023 02:17:37 +0300 From: Danila Tikhonov To: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, vkoul@kernel.org, kishon@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: dmitry.baryshkov@linaro.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, davidwronek@gmail.com, Danila Tikhonov Subject: [PATCH v2 1/2] dt-bindings: phy: Add QMP UFS PHY comptible for SM7150 Date: Sun, 12 Mar 2023 02:17:32 +0300 Message-Id: <20230311231733.141806-2-danila@jiaxyga.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230311231733.141806-1-danila@jiaxyga.com> References: <20230311231733.141806-1-danila@jiaxyga.com> MIME-Version: 1.0 Authentication-Results: smtp46.i.mail.ru; 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Signed-off-by: David Wronek Signed-off-by: Danila Tikhonov Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml index 64ed331880f6..cd0fbbd3593d 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml @@ -18,6 +18,7 @@ properties: enum: - qcom,sc8280xp-qmp-ufs-phy - qcom,sm6125-qmp-ufs-phy + - qcom,sm7150-qmp-ufs-phy - qcom,sm8550-qmp-ufs-phy reg: From patchwork Sat Mar 11 23:17:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Danila Tikhonov X-Patchwork-Id: 68220 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp494818wrd; Sat, 11 Mar 2023 15:34:47 -0800 (PST) X-Google-Smtp-Source: AK7set/FYogsqg2pr7lVkxdJp8W2KQiL4Ogina5ZycEuRLpnXyRtQqz6GrJLEAMNEKJ/YMCub52g X-Received: by 2002:a17:90a:1b6a:b0:23b:55f3:d32e with SMTP id q97-20020a17090a1b6a00b0023b55f3d32emr295824pjq.41.1678577687264; Sat, 11 Mar 2023 15:34:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678577687; cv=none; d=google.com; s=arc-20160816; b=JhjJOY+TtECA38FSwWXk3ETqhHCo86xBueJ4PyRBBR0YgT1Q5Y1hd0VKkAjI/BNkJ7 aZuWlVa3+UffdyMum7ZVjPKk4p2jMHUv9tW1xV/NInMkfca6aFqOo5AMof3g0ZpF0AhC 8gBK+DtX/ZgE2Vz5H0BMSVmT2ByVJGQUiXzQVRIT2M+ezb/HeRL5QpKwxaVkOpxtxyGO D1z5y2qmcE5s1PMFfu3BUOhgRg4otQjBcvxA8oI30yfSv1AqYSj8tFl8TNNp2DPct1ED UuHaLUwYxY4TZ4AEzxBXZfOyvSJnP4yDdvGX/36YmYFrLE8bsR0cwe++hInaGFOC3siw nuFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=QO48h3iyjziRnrrdmGe5KOU6nkeMGcnN3EXvOgAiN+U=; b=zR1qaMRw7j/eh525rOcsPHq1nBCZ1W3p3KFn2BoWvzn2N5/P26T+Kw/Y6E+3yVtEFO eUcDU+/gcISLfH+OXVkbOeCQvy3/BOmguqKqkgpuSuB+CkR2YcYZaGsn5qf/DWeJc45c NCngyqyA3CqniS0Q+3M2HQp/DpoSnVGGd7u4QLeR/X2YG4bdXIQ952hWTgs77FLj2qIG pgtDdbhzNmZefwSUjGf11GNRsYRJtqm7iecLpYZnutSlbINXqfirxnAAb1Le5u4i8QBW LIxEyUBS2UmNxRKKYT1n9sEsA0dfnhzmtPbrprOaHA3c5+2sQYMJQbZz7OexW47Xeika Y0pg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@jiaxyga.com header.s=mailru header.b=mg7xJhEI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Sat, 11 Mar 2023 15:17:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=jiaxyga.com; s=mailru; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:From:Subject:Content-Type:Content-Transfer-Encoding:To:Cc; bh=QO48h3iyjziRnrrdmGe5KOU6nkeMGcnN3EXvOgAiN+U=; t=1678576662;x=1678666662; b=mg7xJhEI9iWa71VEW8M38WpCbJ1DJVTOMFKlKcl/4pgLgQL9+u1LPTH1TusbC55pWvveWA4Yz78qmwC96moWCKBSypahtVgQX4tJhvJBz9+MSjUXYJlhOb/2xEti/rsVFxPMFG7ZidH8xaVRp4/xQCPq4twRerZbNcVOmIBRO8k=; Received: by smtp46.i.mail.ru with esmtpa (envelope-from ) id 1pb8T5-00B9aE-Ed; Sun, 12 Mar 2023 02:17:39 +0300 From: Danila Tikhonov To: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, vkoul@kernel.org, kishon@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: dmitry.baryshkov@linaro.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, davidwronek@gmail.com, Danila Tikhonov Subject: [PATCH v2 2/2] phy: qcom-qmp-ufs: Add SM7150 support Date: Sun, 12 Mar 2023 02:17:33 +0300 Message-Id: <20230311231733.141806-3-danila@jiaxyga.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230311231733.141806-1-danila@jiaxyga.com> References: <20230311231733.141806-1-danila@jiaxyga.com> MIME-Version: 1.0 Authentication-Results: smtp46.i.mail.ru; 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Signed-off-by: David Wronek Signed-off-by: Danila Tikhonov Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 61 +++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c index 994ddd5d4a81..d58822049211 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c @@ -349,6 +349,36 @@ static const struct qmp_phy_init_tbl sdm845_ufsphy_pcs[] = { QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_MULTI_LANE_CTRL1, 0x02), }; +static const struct qmp_phy_init_tbl sm7150_ufsphy_rx[] = { + QMP_PHY_INIT_CFG(QSERDES_V3_RX_SIGDET_LVL, 0x24), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_SIGDET_CNTRL, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_SIGDET_DEGLITCH_CNTRL, 0x1e), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_INTERFACE_MODE, 0x40), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_FASTLOCK_FO_GAIN, 0x0b), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_TERM_BW, 0x5b), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL2, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL3, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL4, 0x1b), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_SVS_SO_GAIN_HALF, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_SVS_SO_GAIN_QUARTER, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_SVS_SO_GAIN, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x5b), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_PI_CONTROLS, 0x81), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_LOW, 0x80), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_MODE_00, 0x59), +}; + +static const struct qmp_phy_init_tbl sm7150_ufsphy_pcs[] = { + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_RX_SIGDET_CTRL2, 0x6f), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_TX_LARGE_AMP_DRV_LVL, 0x0f), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_TX_SMALL_AMP_DRV_LVL, 0x02), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_RX_SYM_RESYNC_CTRL, 0x03), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_TX_MID_TERM_CTRL1, 0x43), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_RX_SIGDET_CTRL1, 0x0f), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_RX_MIN_HIBERN8_TIME, 0xff), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_MULTI_LANE_CTRL1, 0x02), +}; + static const struct qmp_phy_init_tbl sm8150_ufsphy_serdes[] = { QMP_PHY_INIT_CFG(QSERDES_V4_COM_SYSCLK_EN_SEL, 0xd9), QMP_PHY_INIT_CFG(QSERDES_V4_COM_HSCLK_SEL, 0x11), @@ -911,6 +941,34 @@ static const struct qmp_phy_cfg sm6115_ufsphy_cfg = { .no_pcs_sw_reset = true, }; +static const struct qmp_phy_cfg sm7150_ufsphy_cfg = { + .lanes = 1, + + .offsets = &qmp_ufs_offsets, + + .tbls = { + .serdes = sdm845_ufsphy_serdes, + .serdes_num = ARRAY_SIZE(sdm845_ufsphy_serdes), + .tx = sdm845_ufsphy_tx, + .tx_num = ARRAY_SIZE(sdm845_ufsphy_tx), + .rx = sm7150_ufsphy_rx, + .rx_num = ARRAY_SIZE(sm7150_ufsphy_rx), + .pcs = sm7150_ufsphy_pcs, + .pcs_num = ARRAY_SIZE(sm7150_ufsphy_pcs), + }, + .tbls_hs_b = { + .serdes = sdm845_ufsphy_hs_b_serdes, + .serdes_num = ARRAY_SIZE(sdm845_ufsphy_hs_b_serdes), + }, + .clk_list = sdm845_ufs_phy_clk_l, + .num_clks = ARRAY_SIZE(sdm845_ufs_phy_clk_l), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .regs = ufsphy_v3_regs_layout, + + .no_pcs_sw_reset = true, +}; + static const struct qmp_phy_cfg sm8150_ufsphy_cfg = { .lanes = 2, @@ -1560,6 +1618,9 @@ static const struct of_device_id qmp_ufs_of_match_table[] = { }, { .compatible = "qcom,sm6350-qmp-ufs-phy", .data = &sdm845_ufsphy_cfg, + }, { + .compatible = "qcom,sm7150-qmp-ufs-phy", + .data = &sm7150_ufsphy_cfg, }, { .compatible = "qcom,sm8150-qmp-ufs-phy", .data = &sm8150_ufsphy_cfg,