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Signed-off-by: David Wronek Signed-off-by: Danila Tikhonov --- .../devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml index 80a5348dbfde..da223abaa3a2 100644 --- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml @@ -25,6 +25,7 @@ properties: - qcom,sdm845-qmp-ufs-phy - qcom,sm6115-qmp-ufs-phy - qcom,sm6350-qmp-ufs-phy + - qcom,sm7150-qmp-ufs-phy - qcom,sm8150-qmp-ufs-phy - qcom,sm8250-qmp-ufs-phy - qcom,sm8350-qmp-ufs-phy @@ -127,6 +128,7 @@ allOf: - qcom,sdm845-qmp-ufs-phy - qcom,sm6115-qmp-ufs-phy - qcom,sm6350-qmp-ufs-phy + - qcom,sm7150-qmp-ufs-phy - qcom,sm8150-qmp-ufs-phy - qcom,sm8250-qmp-ufs-phy then: @@ -162,6 +164,7 @@ allOf: - qcom,msm8998-qmp-ufs-phy - qcom,sdm845-qmp-ufs-phy - qcom,sm6350-qmp-ufs-phy + - qcom,sm7150-qmp-ufs-phy - qcom,sm8150-qmp-ufs-phy - qcom,sm8250-qmp-ufs-phy - qcom,sm8350-qmp-ufs-phy From patchwork Thu Mar 9 18:50:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Danila Tikhonov X-Patchwork-Id: 67077 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp466249wrd; Thu, 9 Mar 2023 11:07:58 -0800 (PST) X-Google-Smtp-Source: AK7set8ATCW9aTXM2Hn/a0cHb0NVUtnUXfeIcYeXcz23N6iTrEco41uhM3Yn7W4JqYARxZ5Dkd+L X-Received: by 2002:aa7:9508:0:b0:5e0:3038:2300 with SMTP id b8-20020aa79508000000b005e030382300mr22194537pfp.20.1678388878255; Thu, 09 Mar 2023 11:07:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678388878; cv=none; d=google.com; s=arc-20160816; b=HXDNia+X07bHyBESr0LTaBgK0cGIIKvlFF4s6nevujvmhtArLLo7LU5OmguyGqH5Xw 4OylqUuwrk0AhVjaXF8+rX1gGfJSVCC4P6cpZL4Y9AJ9XV/YoxzUW1NkDtr9M4oWxLN/ 9MSZjExD2LBYnQIkYzBRg+ZVM8oSempUM7hjDIiivoxo78Tj5b5a4M2ZDD2XYxBYfE3x Wl2Qaq4auT2UzIndkVTtwG/J3MhLsfGFkIonrHn/WPiIrPvRmCGpBrTYYMlI9kPy6KLW 8eEsPIkIbm0GNFV3nlPP4rYA2uBR+IPs2CNWhvLsaNH82CRm9Rcslq4orCj58Anp0lub QeEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ZUfDqHtn/qb+lqD78o0o+2hZST+sfCQx+/UMKBzTwDY=; b=Zhd2bhGEDhvUDdu21G+tdxjrummcM18zy33w+4jmgab/jb28h3vf92PWNLVVW86GHm VSxkva+M/TOI38XNb3/XK5t9k87QrRGp+VlXd0Spos3DETtuK9NStScFiQHI/3A9U5K4 CW1/VZRw/xUwHj6zJUCIeg1ekxyXyF8EbwfLJpfll6+m7zDCUY2PxV493Jswn3B9URpW B2u0yodwc5OJ+Rl4XWqrJOLnkwh9w8rtLHdpBUdzkbT8rf9RjEW7Szzujp1JRFoUdIjZ 4b9CoWKRZ8x5g63gzR0yGdACep35+IKAqwTl6N3cZ9PHqDzd9clpOBnK9TK6Kh1M+hGz 3osA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@jiaxyga.com header.s=mailru header.b=UOUPczo0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Thu, 9 Mar 2023 10:50:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=jiaxyga.com; s=mailru; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:From:Subject:Content-Type:Content-Transfer-Encoding:To:Cc; bh=ZUfDqHtn/qb+lqD78o0o+2hZST+sfCQx+/UMKBzTwDY=; t=1678387859;x=1678477859; b=UOUPczo0rSvXFVlRp37vZVwgfkGmDHmK0gtUgJHaBNLWAbsoKOgyT+KZGB89QV1XTi4kMRh5lX44D08VO6DT8Eqn/OPysxeTfD+cvgvC5tlR1abgBWSsU9iIOJ2b23XbRfbM+UvgYQKP7v2jZ8cV5QW0AFpioir5ENP1aonI/M0=; Received: by smtp61.i.mail.ru with esmtpa (envelope-from ) id 1paLLs-002rxt-Rk; Thu, 09 Mar 2023 21:50:57 +0300 From: Danila Tikhonov To: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, vkoul@kernel.org, kishon@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, davidwronek@gmail.com, Danila Tikhonov Subject: [PATCH 2/2] phy: qcom-qmp-ufs: Add SM7150 support Date: Thu, 9 Mar 2023 21:50:49 +0300 Message-Id: <20230309185049.170878-3-danila@jiaxyga.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230309185049.170878-1-danila@jiaxyga.com> References: <20230309185049.170878-1-danila@jiaxyga.com> MIME-Version: 1.0 Authentication-Results: smtp61.i.mail.ru; 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Signed-off-by: David Wronek Signed-off-by: Danila Tikhonov Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 57 +++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c index 994ddd5d4a81..b4f2d6c63beb 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c @@ -349,6 +349,36 @@ static const struct qmp_phy_init_tbl sdm845_ufsphy_pcs[] = { QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_MULTI_LANE_CTRL1, 0x02), }; +static const struct qmp_phy_init_tbl sm7150_ufsphy_rx[] = { + QMP_PHY_INIT_CFG(QSERDES_V3_RX_SIGDET_LVL, 0x24), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_SIGDET_CNTRL, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_SIGDET_DEGLITCH_CNTRL, 0x1e), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_INTERFACE_MODE, 0x40), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_FASTLOCK_FO_GAIN, 0x0b), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_TERM_BW, 0x5b), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL2, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL3, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL4, 0x1b), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_SVS_SO_GAIN_HALF, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_SVS_SO_GAIN_QUARTER, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_SVS_SO_GAIN, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x5b), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_PI_CONTROLS, 0x81), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_LOW, 0x80), + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_MODE_00, 0x59), +}; + +static const struct qmp_phy_init_tbl sm7150_ufsphy_pcs[] = { + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_RX_SIGDET_CTRL2, 0x6f), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_TX_LARGE_AMP_DRV_LVL, 0x0f), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_TX_SMALL_AMP_DRV_LVL, 0x02), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_RX_SYM_RESYNC_CTRL, 0x03), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_TX_MID_TERM_CTRL1, 0x43), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_RX_SIGDET_CTRL1, 0x0f), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_RX_MIN_HIBERN8_TIME, 0xFF), + QMP_PHY_INIT_CFG(QPHY_V3_PCS_UFS_MULTI_LANE_CTRL1, 0x02), +};) + static const struct qmp_phy_init_tbl sm8150_ufsphy_serdes[] = { QMP_PHY_INIT_CFG(QSERDES_V4_COM_SYSCLK_EN_SEL, 0xd9), QMP_PHY_INIT_CFG(QSERDES_V4_COM_HSCLK_SEL, 0x11), @@ -911,6 +941,30 @@ static const struct qmp_phy_cfg sm6115_ufsphy_cfg = { .no_pcs_sw_reset = true, }; +static const struct qmp_phy_cfg sm7150_ufsphy_cfg = { + .lanes = 1, + + .tbls = { + .serdes = sdm845_ufsphy_serdes, + .serdes_num = ARRAY_SIZE(sdm845_ufsphy_serdes), + .tx = sdm845_ufsphy_tx, + .tx_num = ARRAY_SIZE(sdm845_ufsphy_tx), + .rx = sm7150_ufsphy_rx, + .rx_num = ARRAY_SIZE(sm7150_ufsphy_rx), + .pcs = sm7150_ufsphy_pcs, + .pcs_num = ARRAY_SIZE(sm7150_ufsphy_pcs), + }, + .tbls_hs_b = { + .serdes = sdm845_ufsphy_hs_b_serdes, + .serdes_num = ARRAY_SIZE(sdm845_ufsphy_hs_b_serdes), + }, + .clk_list = sdm845_ufs_phy_clk_l, + .num_clks = ARRAY_SIZE(sdm845_ufs_phy_clk_l), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .regs = ufsphy_v3_regs_layout, +}; + static const struct qmp_phy_cfg sm8150_ufsphy_cfg = { .lanes = 2, @@ -1560,6 +1614,9 @@ static const struct of_device_id qmp_ufs_of_match_table[] = { }, { .compatible = "qcom,sm6350-qmp-ufs-phy", .data = &sdm845_ufsphy_cfg, + }, { + .compatible = "qcom,sm7150-qmp-ufs-phy", + .data = &sm7150_ufsphy_cfg, }, { .compatible = "qcom,sm8150-qmp-ufs-phy", .data = &sm8150_ufsphy_cfg,