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Miller" , Jakub Kicinski , Paolo Abeni , Alexander Duyck , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Lukasz Majewski Subject: [PATCH 1/7] dsa: marvell: Provide per device information about max frame size Date: Thu, 9 Mar 2023 13:54:15 +0100 Message-Id: <20230309125421.3900962-2-lukma@denx.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230309125421.3900962-1-lukma@denx.de> References: <20230309125421.3900962-1-lukma@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759895856280670887?= X-GMAIL-MSGID: =?utf-8?q?1759895856280670887?= Different Marvell DSA switches support different size of max frame bytes to be sent. This value corresponds to the memory allocated in switch to store single frame. For example mv88e6185 supports max 1632 bytes, which is now in-driver standard value. On the other hand - mv88e6250 supports 2048 bytes. To be more interesting - devices supporting jumbo frames - use yet another value (10240 bytes) As this value is internal and may be different for each switch IC, new entry in struct mv88e6xxx_info has been added to store it. This commit doesn't change the code functionality - it just provides the max frame size value explicitly - up till now it has been assigned depending on the callback provided by the switch driver (e.g. .set_max_frame_size, .port_set_jumbo_size). Signed-off-by: Lukasz Majewski --- Changes for v2: - Define max_frame_size with default value of 1632 bytes, - Set proper value for the mv88e6250 switch SoC (linkstreet) family Changes for v3: - Add default value for 1632B of the max frame size (to avoid problems with not defined values) Changes for v4: - Rework the mv88e6xxx_get_max_mtu() by using per device defined max_frame_size value - Add WARN_ON_ONCE() when max_frame_size is not defined - Add description for the new 'max_frame_size' member of mv88e6xxx_info Changes for v5: - Move some code fragments (like get_mtu callback changes) to separate patches --- drivers/net/dsa/mv88e6xxx/chip.c | 31 +++++++++++++++++++++++++++++++ drivers/net/dsa/mv88e6xxx/chip.h | 6 ++++++ 2 files changed, 37 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 0a5d6c7bb128..c097a0b19ba6 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -5626,6 +5626,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 5, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 1522, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5648,6 +5649,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_ports = 11, .num_internal_phys = 0, .max_vid = 4095, + .max_frame_size = 1632, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5669,6 +5671,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 8, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 1632, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5693,6 +5696,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 5, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 1632, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5716,6 +5720,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_ports = 8, .num_internal_phys = 0, .max_vid = 4095, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5738,6 +5743,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 11, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x10, .global1_addr = 0x1b, @@ -5762,6 +5768,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 5, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 1632, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5787,6 +5794,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 0, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 1632, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5811,6 +5819,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 5, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5836,6 +5845,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 15, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5860,6 +5870,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 5, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5885,6 +5896,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 15, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5908,6 +5920,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_ports = 10, .num_internal_phys = 0, .max_vid = 4095, + .max_frame_size = 1632, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5931,6 +5944,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 16, .max_vid = 8191, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5955,6 +5969,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 16, .max_vid = 8191, .max_sid = 63, + .max_frame_size = 1522, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5978,6 +5993,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 9, .max_vid = 8191, .max_sid = 63, + .max_frame_size = 1522, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6001,6 +6017,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 9, .max_vid = 8191, .max_sid = 63, + .max_frame_size = 1522, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6024,6 +6041,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 9, .max_vid = 8191, .max_sid = 63, + .max_frame_size = 1522, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6051,6 +6069,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 2, .invalid_port_mask = BIT(2) | BIT(3) | BIT(4), .max_vid = 4095, + .max_frame_size = 2048, .port_base_addr = 0x08, .phy_base_addr = 0x00, .global1_addr = 0x0f, @@ -6075,6 +6094,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 15, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6098,6 +6118,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_ports = 7, .num_internal_phys = 5, .max_vid = 4095, + .max_frame_size = 2048, .port_base_addr = 0x08, .phy_base_addr = 0x00, .global1_addr = 0x0f, @@ -6121,6 +6142,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 16, .max_vid = 8191, .max_sid = 63, + .max_frame_size = 1522, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6145,6 +6167,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 5, .num_gpio = 15, .max_vid = 4095, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6170,6 +6193,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 5, .num_gpio = 15, .max_vid = 4095, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6195,6 +6219,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 11, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x10, .global1_addr = 0x1b, @@ -6220,6 +6245,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 5, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6244,6 +6270,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 5, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6269,6 +6296,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 15, .max_vid = 4095, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6294,6 +6322,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 16, .max_vid = 8191, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6319,6 +6348,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 16, .max_vid = 8191, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6343,6 +6373,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 9, .max_vid = 8191, .max_sid = 63, + .max_frame_size = 10240, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index da6e1339f809..e2b88f1f8376 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -132,6 +132,12 @@ struct mv88e6xxx_info { unsigned int num_gpio; unsigned int max_vid; unsigned int max_sid; + + /* Max Frame Size. + * This value corresponds to the memory allocated in switch internal + * memory to store single frame. + */ + unsigned int max_frame_size; unsigned int port_base_addr; unsigned int phy_base_addr; unsigned int global1_addr; From patchwork Thu Mar 9 12:54:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 66837 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp272205wrd; Thu, 9 Mar 2023 04:56:07 -0800 (PST) X-Google-Smtp-Source: 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Miller" , Jakub Kicinski , Paolo Abeni , Alexander Duyck , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Matthias Schiffer , Lukasz Majewski Subject: [PATCH 2/7] net: dsa: mv88e6xxx: add support for MV88E6020 switch Date: Thu, 9 Mar 2023 13:54:16 +0100 Message-Id: <20230309125421.3900962-3-lukma@denx.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230309125421.3900962-1-lukma@denx.de> References: <20230309125421.3900962-1-lukma@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759894902338448998?= X-GMAIL-MSGID: =?utf-8?q?1759894902338448998?= From: Matthias Schiffer A mv88e6250 family (i.e. "LinkStreet") switch with 2 PHY and RMII ports and no PTP support. Signed-off-by: Matthias Schiffer Signed-off-by: Lukasz Majewski --- Changes for v2: - Add S-o-B - Update commit message - Add information about max packet size (2048 B) Changes for v3: - None Changes for v4: - Update the num_ports and num_internal_phys to be in sync with 88e6020 documentation Changes for v5: - None --- drivers/net/dsa/mv88e6xxx/chip.c | 21 +++++++++++++++++++++ drivers/net/dsa/mv88e6xxx/chip.h | 1 + drivers/net/dsa/mv88e6xxx/port.h | 1 + 3 files changed, 23 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index c097a0b19ba6..721bae2e579c 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -5616,6 +5616,27 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = { }; static const struct mv88e6xxx_info mv88e6xxx_table[] = { + [MV88E6020] = { + .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6020, + .family = MV88E6XXX_FAMILY_6250, + .name = "Marvell 88E6020", + .num_databases = 64, + .num_ports = 4, + .num_internal_phys = 2, + .max_vid = 4095, + .max_frame_size = 2048, + .port_base_addr = 0x8, + .phy_base_addr = 0x0, + .global1_addr = 0xf, + .global2_addr = 0x7, + .age_time_coeff = 15000, + .g1_irqs = 9, + .g2_irqs = 5, + .atu_move_port_mask = 0xf, + .dual_chip = true, + .ops = &mv88e6250_ops, + }, + [MV88E6085] = { .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6085, .family = MV88E6XXX_FAMILY_6097, diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index e2b88f1f8376..1690b1a0f2e7 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -54,6 +54,7 @@ enum mv88e6xxx_frame_mode { /* List of supported models */ enum mv88e6xxx_model { + MV88E6020, MV88E6085, MV88E6095, MV88E6097, diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h index aec9d4fd20e3..169ce5b6fa31 100644 --- a/drivers/net/dsa/mv88e6xxx/port.h +++ b/drivers/net/dsa/mv88e6xxx/port.h @@ -111,6 +111,7 @@ /* Offset 0x03: Switch Identifier Register */ #define MV88E6XXX_PORT_SWITCH_ID 0x03 #define MV88E6XXX_PORT_SWITCH_ID_PROD_MASK 0xfff0 +#define MV88E6XXX_PORT_SWITCH_ID_PROD_6020 0x0200 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6085 0x04a0 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6095 0x0950 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6097 0x0990 From patchwork Thu Mar 9 12:54:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 66840 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp277711wrd; Thu, 9 Mar 2023 05:06:26 -0800 (PST) X-Google-Smtp-Source: AK7set+mlc5nQ26hCB8CtUyseUUjYF7H+FuUnBpj0Y7CbKqu+cm8G+qffLj4neGBqfwFEPDj69FY X-Received: by 2002:a05:6e02:1542:b0:319:23c7:5559 with SMTP id j2-20020a056e02154200b0031923c75559mr16783989ilu.3.1678367186021; Thu, 09 Mar 2023 05:06:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678367186; cv=none; d=google.com; s=arc-20160816; b=XJ3UefB2oFLqbOApl4nmzAspTGpH+XjkEgoGBrpOtGl61/tj8Okfo4y7oOI8v0SM8R Vy/jy/abwK1zIE1guWgZwtUABTRpu6xgZC2JiatF3XEe0Huy/MfdNGuvIFXRC8vsnIwU kqmfFTIqq1PoeLIIXqkXnM4MTJiI1CJ2Xa3+n9IPHrx2BnhRe270wVuvTNU4FoC/sAIo fYKg9SfaNKAh8Tm4m9TLTogh6cD7lx0ZrINSGvXA/ZIcptnkhoBYByZAKkai6TJl7DfS 4u01mk+MvmADI1vpK+osmmNaHiliIqf2BZx9YZidV0qd+rYuS1ryQ0taTvNo/FclNjwF Bx8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=CpIOKbE0Y5wx9ksqGQZuGZJ4lPgjM2I//28UAM2Yq7E=; b=PquovOvoVASKsXo/D/rfCXRzUrl5ZXW91e1Z1wWl0poyEBrK3694U4m0+JQyJ/PG4j 0a9tpRQVLXiZg1hFO7uDJzYrUh+2TUkjOy+ew76s+BVTCAK839LHqm4BoUgzN8mx7clp d0KB9elTf8ZXI3l7/O+RoDXNVgVZfufAP3A9Xa30XHHM5noG88RS60KW46yxOTeqSl2C WAUwb1xUcrOUvQMCHGdF79jeiOODGNIZ5L1qxLnG6L7fsRoPPhRGlc3GMiLJS5w1AGC2 xREl5hIosOSJcIdCZfj4spuBn8I+xnw3iVZtb6DlmLt94vW8W3qX5kC4qo34HFNPRLAK bibg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@denx.de header.s=phobos-20191101 header.b="y/9xAC6x"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Miller" , Jakub Kicinski , Paolo Abeni , Alexander Duyck , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Lukasz Majewski Subject: [PATCH 3/7] net: dsa: mv88e6xxx: add support for MV88E6071 switch Date: Thu, 9 Mar 2023 13:54:17 +0100 Message-Id: <20230309125421.3900962-4-lukma@denx.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230309125421.3900962-1-lukma@denx.de> References: <20230309125421.3900962-1-lukma@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759895550377376428?= X-GMAIL-MSGID: =?utf-8?q?1759895550377376428?= A mv88e6250 family (i.e. "LinkStreet") switch with 5 internal PHYs, 2 RMIIs and no PTP support. Signed-off-by: Lukasz Majewski --- Changes for v2: - Update commit message - Add information about max frame size Changes for v3: - None Changes for v4: - None Changes for v5: - None --- drivers/net/dsa/mv88e6xxx/chip.c | 21 +++++++++++++++++++++ drivers/net/dsa/mv88e6xxx/chip.h | 1 + drivers/net/dsa/mv88e6xxx/port.h | 1 + 3 files changed, 23 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 721bae2e579c..26ab4d676615 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -5637,6 +5637,27 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .ops = &mv88e6250_ops, }, + [MV88E6071] = { + .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6071, + .family = MV88E6XXX_FAMILY_6250, + .name = "Marvell 88E6071", + .num_databases = 64, + .num_ports = 7, + .num_internal_phys = 5, + .max_vid = 4095, + .max_frame_size = 2048, + .port_base_addr = 0x08, + .phy_base_addr = 0x00, + .global1_addr = 0x0f, + .global2_addr = 0x07, + .age_time_coeff = 15000, + .g1_irqs = 9, + .g2_irqs = 5, + .atu_move_port_mask = 0xf, + .dual_chip = true, + .ops = &mv88e6250_ops, + }, + [MV88E6085] = { .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6085, .family = MV88E6XXX_FAMILY_6097, diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index 1690b1a0f2e7..af42530da71e 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -55,6 +55,7 @@ enum mv88e6xxx_frame_mode { /* List of supported models */ enum mv88e6xxx_model { MV88E6020, + MV88E6071, MV88E6085, MV88E6095, MV88E6097, diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h index 169ce5b6fa31..494a221c9d9a 100644 --- a/drivers/net/dsa/mv88e6xxx/port.h +++ b/drivers/net/dsa/mv88e6xxx/port.h @@ -112,6 +112,7 @@ #define MV88E6XXX_PORT_SWITCH_ID 0x03 #define MV88E6XXX_PORT_SWITCH_ID_PROD_MASK 0xfff0 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6020 0x0200 +#define MV88E6XXX_PORT_SWITCH_ID_PROD_6071 0x0710 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6085 0x04a0 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6095 0x0950 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6097 0x0990 From patchwork Thu Mar 9 12:54:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 66850 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp285791wrd; Thu, 9 Mar 2023 05:22:31 -0800 (PST) X-Google-Smtp-Source: AK7set/a2HKAFmGO5PjG8NJrHSDS9umySgsWWAa+TPwr2UE1/ZBr93AghjSxqVbUaAkSTYKE+Xrm X-Received: by 2002:a17:90b:1b0e:b0:234:c030:7c7f with SMTP id nu14-20020a17090b1b0e00b00234c0307c7fmr25658095pjb.18.1678368151172; Thu, 09 Mar 2023 05:22:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678368151; cv=none; d=google.com; s=arc-20160816; b=DnT6DGBScYPth04a7AF3ZH1WiKgXGyOJEx/U96ou/KclwD1BpK8Mqs388GKC/U6Pjy MZbMwnRhzLLRSrEQyfXj10kCMnw1orrgO/iGi/jF+8BbocajlyF3zOIB2IjguSr+bwlI GUUff3V3hwzwYrn1936hGMwMR0cs5yRUJFRAD6ch27qUI/k9RxPfvA7A4HAaP3MQ3Orn uQVIwg87DrcYPDzhZajJIOfClIbfXqQDTUxX0h3EwMaTIJlK1k5pjeasjsdIahwaHIsE S+Sn7xk3H2Cd0e9j/t/jY16nrAdS7gOYbzfTd1tu+EYornC1IvK7ffv03QBe5YJOBfsZ fUgw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ZAWUOiGdw0sgMfodR0TUZMQrdR2wpZb4WCLp4NtJrls=; b=OVRjm4HXslb7BOomGQey+Wo7rdN9xZ/W3QMMsEMGY6ZO6g6hsAPPmyNh3USJAi5Nmm +pzGtrLHAKK5blw50hhFntnaMDK8Gg2MWz5bQf5UJsaX11QIfo9GHH/TF6aGj8dF7FPW +pMQGdInQ8lQ3Tq9RKrIl8rueBTf190eTXGKa4hZY/JAbwmsXmxW8m4S9FMr6U7QliGy XAMJu7/we0Se2A1Ag6jb5PtdcCVyj2r1jkjCVbC0eMuucx0BUlyNagkziDutiFslmSiS o9J2BXpdVeBeQdLkX5pUTcauYsKx04eogVNIxECFxSaKpBEbztIIbE3PTDzbzYUzQ6y2 S6mQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@denx.de header.s=phobos-20191101 header.b="nJ/wx9Nr"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Miller" , Jakub Kicinski , Paolo Abeni , Alexander Duyck , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Lukasz Majewski Subject: [PATCH 4/7] dsa: marvell: Define .set_max_frame_size() function for mv88e6250 SoC family Date: Thu, 9 Mar 2023 13:54:18 +0100 Message-Id: <20230309125421.3900962-5-lukma@denx.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230309125421.3900962-1-lukma@denx.de> References: <20230309125421.3900962-1-lukma@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759896562868503188?= X-GMAIL-MSGID: =?utf-8?q?1759896562868503188?= Switches from mv88e6250 family (the marketing name - "Link Street", including mv88e6020 and mv88e6071) need the possibility to setup the maximal frame size, as they support frames up to 2048 bytes. Signed-off-by: Lukasz Majewski --- Changes for v5: - New patch --- drivers/net/dsa/mv88e6xxx/chip.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 26ab4d676615..9695a1af45a9 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -5018,6 +5018,7 @@ static const struct mv88e6xxx_ops mv88e6250_ops = { .avb_ops = &mv88e6352_avb_ops, .ptp_ops = &mv88e6250_ptp_ops, .phylink_get_caps = mv88e6250_phylink_get_caps, + .set_max_frame_size = mv88e6185_g1_set_max_frame_size, }; static const struct mv88e6xxx_ops mv88e6290_ops = { From patchwork Thu Mar 9 12:54:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 66838 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp272643wrd; Thu, 9 Mar 2023 04:57:23 -0800 (PST) X-Google-Smtp-Source: AK7set/wpeCEG9iajzix0AAjAU64iK2GZUlAoJIewvXeqiX2QHXvbnm/5pFXql4arcelnerGmxtb X-Received: by 2002:a05:6a20:69a3:b0:c7:6f26:c99 with SMTP id t35-20020a056a2069a300b000c76f260c99mr35983000pzk.61.1678366643185; Thu, 09 Mar 2023 04:57:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678366643; cv=none; d=google.com; s=arc-20160816; b=UFTBOojfPR0DDFwTlgxEFlsptkFX2o7gf3JBfYUgpCMD2TJyfBEd3DButvPXt1K0yu lRZE3HayY1U5DXLpmN7M8k5DMyjUJKAvrDtl4Ag21tOwhoaTLahSU/8vdnmvdAg7+nFe PY8brcc52wXk7Gafxnw2Z2eZRvzNHqS9M5EDHAot/P+t53XnoyNMZ0KDZbtjnseefEnS lQaSMeeFg0bZVwODfAh6EDlhFz1kAvLI3M6zUG0Zk1UbLZJLMq70G0718KNJ4lWbWgj9 JTTFH5eFNKK2ZphO6VmlZnF3AMj/YeYGQrQKxhKQcUHNb/+j0PqOkKduj9ZD+crXK8Yl hKqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=dVEgBnkSNnuvOZZ/mAHRR8gLntu/ElXZ1r9lih2XJe8=; b=xEo3VSC6lhaHFgxzvQ7eC7jkQwbPcalgcjctD2bUJg4u0QP5H8XPbPKrLxiqJL1P5U HGGA/DtHCoBRhLZkh7jnmQcJU6RYopPSjIx/ZTNYAQcuE2Tw+xZjEHXvHHmu0+B6XInT d6+9EMsd0ql56GaQS/IeEweYIv/QjJuXfHba9vNPC/0WfqDuuKdTO83OXsx1YbezeH8L ktu9jv7KlZGMDxUqTzm+REcg2zkJWOFu6xqpEIJmdEvg56J56b+gTy8qU6tFinTJyj3x NHBhPG1gXDDCkDOFdrl+UvEr+emfpUH1NSIVFJ5yM6U4vnMnp5WSuzwQE3Yj6npgAEBD UZvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@denx.de header.s=phobos-20191101 header.b=bg9mVsKN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Miller" , Jakub Kicinski , Paolo Abeni , Alexander Duyck , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Lukasz Majewski Subject: [PATCH 5/7] dsa: marvell: Add helper function to validate the max_frame_size variable Date: Thu, 9 Mar 2023 13:54:19 +0100 Message-Id: <20230309125421.3900962-6-lukma@denx.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230309125421.3900962-1-lukma@denx.de> References: <20230309125421.3900962-1-lukma@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759894981180582859?= X-GMAIL-MSGID: =?utf-8?q?1759894981180582859?= This commit shall be regarded as a transition one, as this function helps to validate the correctness of max_frame_size variable added to mv88e6xxx_info structure. It is necessary to avoid regressions as manual assessment of this value turned out to be error prone. Signed-off-by: Lukasz Majewski Suggested-by: Russell King (Oracle) --- Changes for v5: - New patch --- drivers/net/dsa/mv88e6xxx/chip.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 9695a1af45a9..af14eb8a1bfd 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -7169,6 +7169,27 @@ static int __maybe_unused mv88e6xxx_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(mv88e6xxx_pm_ops, mv88e6xxx_suspend, mv88e6xxx_resume); +static void mv88e6xxx_validate_frame_size(void) +{ + int max; + int i; + + for (i = 0; i < ARRAY_SIZE(mv88e6xxx_table); i++) { + /* same logic as in mv88e6xxx_get_max_mtu() */ + if (mv88e6xxx_table[i].ops->port_set_jumbo_size) + max = 10240; + else if (mv88e6xxx_table[i].ops->set_max_frame_size) + max = 1632; + else + max = 1522; + + if (mv88e6xxx_table[i].max_frame_size != max) + pr_err("BUG: %s has differing max_frame_size: %d != %d\n", + mv88e6xxx_table[i].name, max, + mv88e6xxx_table[i].max_frame_size); + } +} + static int mv88e6xxx_probe(struct mdio_device *mdiodev) { struct dsa_mv88e6xxx_pdata *pdata = mdiodev->dev.platform_data; @@ -7302,6 +7323,7 @@ static int mv88e6xxx_probe(struct mdio_device *mdiodev) if (err) goto out_mdio; + mv88e6xxx_validate_frame_size(); return 0; out_mdio: From patchwork Thu Mar 9 12:54:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 66849 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp285781wrd; Thu, 9 Mar 2023 05:22:29 -0800 (PST) X-Google-Smtp-Source: AK7set/YkisyJO4oaDFjF4EsofnDuDjMJ7i00KTtv7aoSBqBz85m+dKpL8IZe13nVPJC9aJbhs90 X-Received: by 2002:a62:5386:0:b0:5e3:af7:3bdf with SMTP id h128-20020a625386000000b005e30af73bdfmr21341673pfb.30.1678368149600; Thu, 09 Mar 2023 05:22:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678368149; cv=none; d=google.com; s=arc-20160816; b=S+EPwhj2M6zI1aiAiX1bBBbBH4gJ4NJX5HCeT4rfVUCnFKxBb/JaT5QdRk/HoqBNi/ 474cuPQSZGGJuMOI0gQ4x4m1yOgnZz2hGI9H82KzDUkOorImW+3JbLSnO+gIGF6ipZgF 5LDScOh7gda+g3BT7tB9kNWYcZSz3LmgCLFzIkVTtFuJmLzHADtpZoVoNzb0cqX2KkIY R2IT+qTfk2ofyNvsnMhx4Xvk9O4UYulyN6Sgiq/oJyqR48t45upafk6E85tyt1l4fxri P2q9lAHFLgFiouej/Kwx4tSK4ex3kwVcKFiCnMim9bSg8rj1rmvknr0x21CRaHbOaUrk KNtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LhwqYlLtNlbnyPzhlWpUbhP4oPhGsA1F/iawWH4ZQg8=; b=VxjvLGMX7vdYoQx5aGI2CwxnP87iOcd46w0ZpzG2x7nSqhIoTAmOX6h36B8jDgly35 UkjFXPtJWCV3uejuWTnY6UN5RUYE89/S3hDRIh3aOqU12Tc2WwjZQQv+2Uy1JGR4onl2 sJuDwRXH+ZNaJdDAPO9SdvNoEqD83oS6hWFaIb7EDj6JPBqTxlnrX9brqn0hOddO2Vii iGcKwGBCDnKnUuFb+jxJeZd2Ch+zLdbJzBewyxKewEcB45kqnwOycfo/5TyLqp7l223G z8XFlRlVko65bkn0+2N0tWADhS0w0e1xRulZUKY1NOel9hoyOFmFH23JfLmawhZuwnNF zO9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@denx.de header.s=phobos-20191101 header.b=oLr6iOBN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Miller" , Jakub Kicinski , Paolo Abeni , Alexander Duyck , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Lukasz Majewski Subject: [PATCH 6/7] dsa: marvell: Correct value of max_frame_size variable after validation Date: Thu, 9 Mar 2023 13:54:20 +0100 Message-Id: <20230309125421.3900962-7-lukma@denx.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230309125421.3900962-1-lukma@denx.de> References: <20230309125421.3900962-1-lukma@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759896560809108156?= X-GMAIL-MSGID: =?utf-8?q?1759896560809108156?= Running of the mv88e6xxx_validate_frame_size() function provided following results: [ 1.585565] BUG: Marvell 88E6020 has differing max_frame_size: 1632 != 2048 [ 1.592540] BUG: Marvell 88E6071 has differing max_frame_size: 1632 != 2048 ^------ Correct -> mv88e6250 family max frame size = 2048B [ 1.599507] BUG: Marvell 88E6085 has differing max_frame_size: 1632 != 1522 [ 1.606476] BUG: Marvell 88E6165 has differing max_frame_size: 1522 != 1632 [ 1.613445] BUG: Marvell 88E6190X has differing max_frame_size: 10240 != 1522 [ 1.620590] BUG: Marvell 88E6191X has differing max_frame_size: 10240 != 1522 [ 1.627730] BUG: Marvell 88E6193X has differing max_frame_size: 10240 != 1522 ^------ Needs to be fixed!!! [ 1.634871] BUG: Marvell 88E6220 has differing max_frame_size: 1632 != 2048 [ 1.641842] BUG: Marvell 88E6250 has differing max_frame_size: 1632 != 2048 ^------ Correct -> mv88e6250 family max frame size = 2048B This commit removes the validation function and provides correct values for the max frame size field. Signed-off-by: Lukasz Majewski --- Changes for v5: - New patch --- drivers/net/dsa/mv88e6xxx/chip.c | 32 +++++--------------------------- 1 file changed, 5 insertions(+), 27 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index af14eb8a1bfd..dbb69787f4ef 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -5669,7 +5669,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 5, .max_vid = 4095, .max_sid = 63, - .max_frame_size = 1522, + .max_frame_size = 1632, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -5837,7 +5837,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 0, .max_vid = 4095, .max_sid = 63, - .max_frame_size = 1632, + .max_frame_size = 1522, .port_base_addr = 0x10, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6012,7 +6012,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_gpio = 16, .max_vid = 8191, .max_sid = 63, - .max_frame_size = 1522, + .max_frame_size = 10240, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6060,7 +6060,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 9, .max_vid = 8191, .max_sid = 63, - .max_frame_size = 1522, + .max_frame_size = 10240, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -6084,7 +6084,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .num_internal_phys = 9, .max_vid = 8191, .max_sid = 63, - .max_frame_size = 1522, + .max_frame_size = 10240, .port_base_addr = 0x0, .phy_base_addr = 0x0, .global1_addr = 0x1b, @@ -7169,27 +7169,6 @@ static int __maybe_unused mv88e6xxx_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(mv88e6xxx_pm_ops, mv88e6xxx_suspend, mv88e6xxx_resume); -static void mv88e6xxx_validate_frame_size(void) -{ - int max; - int i; - - for (i = 0; i < ARRAY_SIZE(mv88e6xxx_table); i++) { - /* same logic as in mv88e6xxx_get_max_mtu() */ - if (mv88e6xxx_table[i].ops->port_set_jumbo_size) - max = 10240; - else if (mv88e6xxx_table[i].ops->set_max_frame_size) - max = 1632; - else - max = 1522; - - if (mv88e6xxx_table[i].max_frame_size != max) - pr_err("BUG: %s has differing max_frame_size: %d != %d\n", - mv88e6xxx_table[i].name, max, - mv88e6xxx_table[i].max_frame_size); - } -} - static int mv88e6xxx_probe(struct mdio_device *mdiodev) { struct dsa_mv88e6xxx_pdata *pdata = mdiodev->dev.platform_data; @@ -7323,7 +7302,6 @@ static int mv88e6xxx_probe(struct mdio_device *mdiodev) if (err) goto out_mdio; - mv88e6xxx_validate_frame_size(); return 0; out_mdio: From patchwork Thu Mar 9 12:54:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 66839 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp272953wrd; Thu, 9 Mar 2023 04:58:08 -0800 (PST) X-Google-Smtp-Source: AK7set8veAOYXZkejSbn9IbtKmZitYB8O9KC6FQLo9n8Dnw9Z/L6I44Q9iKaPvGbYO3NJ/atxdfe X-Received: by 2002:a17:902:f7c2:b0:19a:b588:6fe2 with SMTP id h2-20020a170902f7c200b0019ab5886fe2mr20262659plw.13.1678366688515; Thu, 09 Mar 2023 04:58:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678366688; cv=none; d=google.com; s=arc-20160816; b=TwO7wF3J2QY/R+oOlqvK03H7hPhYPIZR+7gLaXFwlT3QBmlDuHDjm7UR/Qya43c+2/ 1Gjq/w2zpOUZrrQ9Qi+f1nEKrb3t+bUnAC4XiiTavbKw3jE5R5SWesojtUoXyQcWSuQQ OiMra3111j0K3XoBsLm+/TjMX08abUdDQ03w2o2WX2tvMDg/JFVlMT8ZbpD81R0TLLJM V8vRC7jx6H7yE4MYBiDm8P0avUMfPLdCzEvTzilPOb5sa2UMnyKhm/8JV/yBcN72rojG 5zuFwXXpb67mNYJYi5NtYxEkJRdcalYs63NkIoZn1M4ZJ+V96VITVemzWEWtVoXAiKcx RuoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=xNmNmjH4DCoGV9RiVPer+i2QQA4k61osHG4pT21zA8w=; b=Q6+kUFqLksxqerGR5tsUZ3B+HihreAypRrYCaQ9mgcaTNCTcF1GTP8/nrL8HxEuWwo BiVs6HsACN0pltdrWBqaHYTKu6P3dbXCkCGtZILFBZFcmq16jnUJS6VK4NJ8duxtPi9u xKxcjfVmr1wOVJi06vUqj7H0A+sB6CTajJnMoM7IFguZMf/A19OPiuSWZIXatEgzmKc+ vgjz0XrjarwwwYlmNtE4gBpiVK07ULuKg2UJDiwaThJhuJVODfxXWIFa+TimEPalzax2 SkSNqd12R/VASVO6D3XsfU5o2gb1ih3j8v6v4KmExNZT2ZfrWdipprn55utZw8gXT1gX gbVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@denx.de header.s=phobos-20191101 header.b=NE05gklU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Miller" , Jakub Kicinski , Paolo Abeni , Alexander Duyck , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Lukasz Majewski Subject: [PATCH 7/7] dsa: marvell: Modify get max MTU callback to use per switch provided value Date: Thu, 9 Mar 2023 13:54:21 +0100 Message-Id: <20230309125421.3900962-8-lukma@denx.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230309125421.3900962-1-lukma@denx.de> References: <20230309125421.3900962-1-lukma@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759895028992720701?= X-GMAIL-MSGID: =?utf-8?q?1759895028992720701?= After this change the value specified in max_frame_size variable is used to provide information regarding the maximal size of frame supported in the switch. This approach replaces the current detection scheme, which extracts information about max frame size depending on set of provided callbacks. This is wrong, as some switch ICs can have max frame size equal to 1632 or 2048 and both would provide set_max_frame_size callback. Signed-off-by: Lukasz Majewski --- Changes for v5: - New patch --- drivers/net/dsa/mv88e6xxx/chip.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index dbb69787f4ef..6a5acbba381e 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -3545,11 +3545,10 @@ static int mv88e6xxx_get_max_mtu(struct dsa_switch *ds, int port) { struct mv88e6xxx_chip *chip = ds->priv; - if (chip->info->ops->port_set_jumbo_size) - return 10240 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN; - else if (chip->info->ops->set_max_frame_size) - return 1632 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN; - return 1522 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN; + WARN_ON_ONCE(!chip->info->max_frame_size); + + return chip->info->max_frame_size - VLAN_ETH_HLEN - EDSA_HLEN + - ETH_FCS_LEN; } static int mv88e6xxx_change_mtu(struct dsa_switch *ds, int port, int new_mtu)