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Thu, 9 Mar 2023 04:12:13 -0600 From: Ravi Bangoria To: CC: , , , , , , , , , , , , , Subject: [PATCH v2 1/3] perf/ibs: Introduce ibs_core_pmu_event() Date: Thu, 9 Mar 2023 15:41:09 +0530 Message-ID: <20230309101111.444-2-ravi.bangoria@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230309101111.444-1-ravi.bangoria@amd.com> References: <20230309101111.444-1-ravi.bangoria@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT109:EE_|BN9PR12MB5100:EE_ X-MS-Office365-Filtering-Correlation-Id: e5b5d358-ab1e-40dc-9394-08db2086c44a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qvX16gSzZ/b6zQESUryK7dMv7MYvKb7TTdiYsF+Se5UoSpi1wcHqjXUMuMayBnWan0HnnlSQ/GoxgILYrwX5TrLgsKNfiadLNROX1ufNDd+9KZ8zdeq8n0UAKAo+nv0W9ill/DE0JQsdA9ICkPDL2nRLPTV+X964+7iAM6OSS0p9BrdLdMC7TQzzd+Ps83xnb4UrRTDPsszMMdj+WP39G7eMAhYj1w7BdGmHxc04Tc8GtsifSysmjDa/z9/iwM5vNWZil1igKUR0TTxKkL0iS0hxY8cx6C1I9x3cxp3dq0g9JlivIWEwxrKmWdGye1tv7LYGOW+FUR1/pOCGy/RpW01e2eyWgEMo8ynICTh7Dd6v3cvL0WiXuuyPGLWRaOC64rfsw41L1O6A5Ynzmg93FF2h6Y5H0V/JruoFuq78bsWIG+QP9rM7evTbO/jFSZ1aLEc3ZiuZ1TcI2uvC2rq7lzCk2CfeixDVRY1m9Qm4/l/B5n/YM163qMRUQ8R0IDA5LyVX69U0JIpYRkxtlxqnP4wgAC/SKAhJVAHZDErjcCMqj1OX/QEiPsoCLLxoWn7pIlusmcn36sxijk5pjCorEYDOd03r3NgDBJu8Zs4G2htkAoV7qwO8zAOxGI5Y8Sh7MghUzLLJ6k/vENHkCdzq4RTLznbesNDV5LGtsgbH5WIoO/Ai6H3H+3P077dUeAQMOROzf2g3sXqUMthUFxgPitZ6iM4ypJvFmWxci53eURE= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(396003)(376002)(346002)(39860400002)(136003)(451199018)(46966006)(40470700004)(36840700001)(8936002)(36756003)(26005)(7416002)(5660300002)(1076003)(8676002)(82740400003)(36860700001)(6666004)(81166007)(47076005)(82310400005)(83380400001)(426003)(336012)(16526019)(186003)(2616005)(40480700001)(54906003)(86362001)(316002)(41300700001)(70206006)(4326008)(40460700003)(6916009)(70586007)(356005)(7696005)(478600001)(2906002)(44832011)(36900700001);DIR:OUT;SFP:1101; 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Signed-off-by: Ravi Bangoria --- arch/x86/events/amd/ibs.c | 52 +++++++++++++++++-------------- arch/x86/include/asm/perf_event.h | 2 ++ 2 files changed, 31 insertions(+), 23 deletions(-) diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c index 64582954b5f6..67eb5b7564e8 100644 --- a/arch/x86/events/amd/ibs.c +++ b/arch/x86/events/amd/ibs.c @@ -218,29 +218,7 @@ static int perf_ibs_precise_event(struct perf_event *event, u64 *config) return -EOPNOTSUPP; } - switch (event->attr.type) { - case PERF_TYPE_HARDWARE: - switch (event->attr.config) { - case PERF_COUNT_HW_CPU_CYCLES: - *config = 0; - return 0; - } - break; - case PERF_TYPE_RAW: - switch (event->attr.config) { - case 0x0076: - *config = 0; - return 0; - case 0x00C1: - *config = IBS_OP_CNT_CTL; - return 0; - } - break; - default: - return -ENOENT; - } - - return -EOPNOTSUPP; + return ibs_core_pmu_event(event, config); } static int perf_ibs_init(struct perf_event *event) @@ -1296,6 +1274,34 @@ u32 get_ibs_caps(void) EXPORT_SYMBOL(get_ibs_caps); +/* Convert core pmu event into IBS event */ +int ibs_core_pmu_event(struct perf_event *event, u64 *config) +{ + switch (event->attr.type) { + case PERF_TYPE_HARDWARE: + switch (event->attr.config) { + case PERF_COUNT_HW_CPU_CYCLES: + *config = 0; + return 0; + } + break; + case PERF_TYPE_RAW: + switch (event->attr.config) { + case 0x0076: + *config = 0; + return 0; + case 0x00C1: + *config = IBS_OP_CNT_CTL; + return 0; + } + break; + default: + return -ENOENT; + } + + return -EOPNOTSUPP; +} + static inline int get_eilvt(int offset) { return !setup_APIC_eilvt(offset, 0, APIC_EILVT_MSG_NMI, 1); diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index 8fc15ed5e60b..1ad9d504ae71 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -475,8 +475,10 @@ struct pebs_xmm { #ifdef CONFIG_X86_LOCAL_APIC extern u32 get_ibs_caps(void); +extern int ibs_core_pmu_event(struct perf_event *event, u64 *config); #else static inline u32 get_ibs_caps(void) { return 0; } +static inline int ibs_core_pmu_event(struct perf_event *event, u64 *config) { return -ENOENT; } #endif #ifdef CONFIG_PERF_EVENTS From patchwork Thu Mar 9 10:11:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ravi Bangoria X-Patchwork-Id: 66748 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp206955wrd; Thu, 9 Mar 2023 02:17:00 -0800 (PST) X-Google-Smtp-Source: AK7set+UhRXdZcti3qXP/wWjxJAAnOXQ78A4YZqsTXwVsBPFw+w4Nbz4YMxtArTWh7H49+tRsYqn X-Received: by 2002:a62:6541:0:b0:5a8:d97d:c346 with SMTP id z62-20020a626541000000b005a8d97dc346mr17719276pfb.12.1678357020159; Thu, 09 Mar 2023 02:17:00 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1678357020; cv=pass; d=google.com; s=arc-20160816; b=XnU9Rkgmre1YhLvDGR4r5rQYfyf7tlXdBC6AQ+oL5T/2uvscaNwV867PtUDv1ywg4Q llDiLn3BmWjKA3h4ABkSFeUMDgqFqquytSn9U+InxuCG1hXaubai/hJYW+lN4HxmPeKp iKmryPc2G78uQlXkVosMlLOvHiL/IznoJeKrIyg+drbjlixXKqBrvqQes0cGFilgWFlf DuLVSRGPtfNaYeTJ0m8U4lFa4AD4vbXpT6UmBtZeXTVx+lixSKewbEYFAOl/RD9FvuyR ciKpgJIupuCc+sFV7sJv67fHeJ+tth+yHzFDs51xQsujYxWLAKTgr6/LTfUDaAIBrtEC QtKw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mXFNOHaSqp2WhZvg3ozwniSBg72BBUMaMUTA+Aikp5Y=; b=OrJVeMMv+7m0A9JO6++CYH3zsy9kcILZeMRFMPHrAEoOWyV01IYcVjO9whcATk7OUp tET93UzRi9sljsCyzGEHfzOL4xyTApFD9Fz5peA82V2sgnp/bVCAZgBHi7t1pXbrbeAJ 6HxRSPGoWaT9PVmVFjIJ+OxguwAmRftMkbTlGTZiKMDel9YGPW5r3MQcADk0nCrDhoKH Za5SfKZJHPYpkyU7bCszWPsAan9SOHttzAzLBSzMKtNSohwbxMQPm7i+IuJFLihioMTo YwyalOh4lDR2VeCmtQPNVR287nnVLDshUWMMGqe+PoDIuLta0d1n451/FbsJ8VUj3GRc 8Crg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=ZN4q0ayE; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 9 Mar 2023 04:12:19 -0600 From: Ravi Bangoria To: CC: , , , , , , , , , , , , , Subject: [PATCH v2 2/3] perf/ibs: Fix interface via core pmu events Date: Thu, 9 Mar 2023 15:41:10 +0530 Message-ID: <20230309101111.444-3-ravi.bangoria@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230309101111.444-1-ravi.bangoria@amd.com> References: <20230309101111.444-1-ravi.bangoria@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT029:EE_|MN0PR12MB6200:EE_ X-MS-Office365-Filtering-Correlation-Id: 021cb43f-fd76-43cf-4f73-08db2086c81d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 4r6qcVczdc8RfER9wfmBd0/UNaNQg7FXBPSpT8WiVr4gtzkLfqME0FLXE4dsNWi9EOMaZodotrHsWC82Ff/fbVTA5iJMEObHAS//lsxTIZcc7bJq/PieI+GByHXTZvNQFkk7BzNGXT6dN9tmpmd5wFjfNef/vHPAyTqz5CHceCeAw5mUOkA1qmfhBPQZZ03K4U0wDVAO2W8Xic+Q+XKaSRBOK78HSuu3OPJE7B7fwhT18kLXR4BJIz1zIyj1jTWzkzDe8b8mUz9ba/E+BvIS7+/m80+Wi90S9cNzFEVV/Kst5C53sjkbBfU0a+wrIDPEI0r5MQLcYm60i9I+QR4iYOGRgzbnNw86hguNMC4gn1J4XKH9yYdOz61XzOhoF5VB6poBEXfEw0ryEqFTFtwmuJvS1xhB7BDd8k4nCf8xfEK0ubaZSy4/YU9PGxLMRDjS65xMJLXZsPg4egGnT2ShKka+tVbHKOua2//s/241QrBzA9uE2rISZxz/VvwwWQC+JZvkNjsd81Hav8JrSMhBJpmQ4daq6zwcM7hkAiyNH6CJSL/3U6yfUvQvxl1b4t4dtjfxGbQf6Fu/VeSi0Ikw4LsVgw9pJE2IwsgrlvsaHYEprsBTdVbNiOKfsgogBm2npT2i7JsAe7tXmU4PWV8F3KqGJTb8nbDGOgLSoHyobqLyTl3svXGbPSWKBDq740xcrx+STNnkOiMPXQ8Cu7ensYBhemK3HB128io2NoK/5SQ= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(396003)(346002)(39860400002)(136003)(376002)(451199018)(40470700004)(46966006)(36840700001)(8676002)(4326008)(70586007)(70206006)(6916009)(83380400001)(2616005)(16526019)(186003)(82310400005)(47076005)(40480700001)(336012)(81166007)(356005)(36756003)(36860700001)(82740400003)(54906003)(478600001)(40460700003)(6666004)(7696005)(86362001)(316002)(426003)(1076003)(26005)(2906002)(8936002)(5660300002)(7416002)(44832011)(41300700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Mar 2023 10:12:25.7346 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 021cb43f-fd76-43cf-4f73-08db2086c81d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT029.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6200 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759884890683040927?= X-GMAIL-MSGID: =?utf-8?q?1759884890683040927?= Although, IBS pmu can be invoked via it's own interface, indirect IBS invocation via core pmu event is also supported with fixed set of events: cpu-cycles:p, r076:p (same as cpu-cycles:p) and r0C1:p (micro-ops) for user convenience. This indirect IBS invocation is broken since commit 66d258c5b048 ("perf/core: Optimize perf_init_event()"), which added RAW pmu under pmu_idr list and thus if event_init() fails with RAW pmu, it started returning error instead of trying other pmus. Fix it by trying to open event on all pmus if event_init() on user requested pmu returns -ESRCH. Without patch: $ sudo ./perf record -C 0 -e r076:p -- sleep 1 Error: The r076:p event is not supported. With patch: $ sudo ./perf record -C 0 -e r076:p -- sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.341 MB perf.data (37 samples) ] Note that there is no notion of forward pmu mapping. i.e. kernel doesn't know which specific pmu(or a set of pmus) the event should be forwarded to. As of now, only AMD core pmu forwards a set of events to IBS pmu when precise_ip attribute is set and thus trying with all pmus works. But if more pmus starts returning -ESRCH, some sort of forward pmu mapping needs to be introduced through which the event can directly get forwarded to only mapped pmus. Otherwise, trying all pmus can inadvertently open event on wrong pmu. Fixes: 66d258c5b048 ("perf/core: Optimize perf_init_event()") Reported-by: Stephane Eranian Signed-off-by: Ravi Bangoria --- arch/x86/events/amd/core.c | 11 ++++++++--- kernel/events/core.c | 10 +++++++++- 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c index 8c45b198b62f..81d67b899371 100644 --- a/arch/x86/events/amd/core.c +++ b/arch/x86/events/amd/core.c @@ -371,10 +371,15 @@ static inline int amd_has_nb(struct cpu_hw_events *cpuc) static int amd_pmu_hw_config(struct perf_event *event) { int ret; + u64 dummy; - /* pass precise event sampling to ibs: */ - if (event->attr.precise_ip && get_ibs_caps()) - return -ENOENT; + if (event->attr.precise_ip) { + /* pass precise event sampling to ibs by returning -ESRCH */ + if (get_ibs_caps() && !ibs_core_pmu_event(event, &dummy)) + return -ESRCH; + else + return -ENOENT; + } if (has_branch_stack(event) && !x86_pmu.lbr_nr) return -EOPNOTSUPP; diff --git a/kernel/events/core.c b/kernel/events/core.c index f79fd8b87f75..e990c71ba34a 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -11639,18 +11639,26 @@ static struct pmu *perf_init_event(struct perf_event *event) goto again; } + /* + * pmu->event_init() should return -ESRCH only when it + * wants to forward the event to other pmu. + */ + if (ret == -ESRCH) + goto try_all; + if (ret) pmu = ERR_PTR(ret); goto unlock; } +try_all: list_for_each_entry_rcu(pmu, &pmus, entry, lockdep_is_held(&pmus_srcu)) { ret = perf_try_init_event(pmu, event); if (!ret) goto unlock; - if (ret != -ENOENT) { + if (ret != -ENOENT && ret != -ESRCH) { pmu = ERR_PTR(ret); goto unlock; } From patchwork Thu Mar 9 10:11:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ravi Bangoria X-Patchwork-Id: 66751 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp211175wrd; Thu, 9 Mar 2023 02:28:56 -0800 (PST) X-Google-Smtp-Source: AK7set/9SdcEPHgVwR/yOgw+Tfj2Lcm1nc41tHmDyxjFQQFArvcCsouTe9TmR7tpV4OprkClVvpv X-Received: by 2002:a05:6a20:430c:b0:d0:15c9:4e64 with SMTP id h12-20020a056a20430c00b000d015c94e64mr12317562pzk.31.1678357735890; Thu, 09 Mar 2023 02:28:55 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1678357735; cv=pass; d=google.com; s=arc-20160816; b=syleRPsaVmorFyEs5BKj6oY7CR+t2VZ9roWRrcUSVw3SMIzsjqjJUmHdU8qFYDrzBC 9+1dSPp+q7ZCIz6s1yIGEJjqwd4ENOX8tJ6VDGYsgcDtNzP6vB9SK2g688xhmpsxsV4P 76efOf1SnHpLoMrkLjTMkki0ye5l3FwqBGoD/UHxGCBqK0oufqjxXCAM8c7Q7fsWjoOa L2YNFWBnyRFmfJ8P/6eRzphgEE8nCrUhsndmYG6szRQt1auMKbY9HpzVb97bQn08tx9a 5mRPS/onnKSfxxLSuRBnLZ6o09vUIhGzur6WUMlMWxzrI/A7wyBmPrkaF5V9WZQJEixW /1sA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7YFGamy51KwjAnD1EwQNXRknuXM19EugsdsE//yNK7E=; b=cFFhsyBVoPsN+OnYlfD/U54rH2/9VCW/JZsAPTaN/PVYD/I4fHevonAG2GOP06MCA7 b1ClXYyImapn1ytlmlnfivEGUbMR4AjYjEIL0vKuonFx6J/BXhyYN6Ai8mLXT8arem46 HnxzVFGj/n9fyu+39mxtiOitf9QO73csfG5gAQTeQI1Ms1ykiYStrn9RWh1pddulX8MH JXqiW8rIU/bUFQr6CQF7u1RjCqdqOBDnjVGcB+ufK77nI4ahP/aMnq8lk5y4mBxDIgaB zWnyj6qCBiqSLZMcyLXTKviuA3AaESwE6ZQfQhpM5FXXfm87eoyP85hwT92VYFFZ5wIH nyBw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=GkluZA77; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Thu, 9 Mar 2023 04:12:25 -0600 From: Ravi Bangoria To: CC: , , , , , , , , , , , , , Subject: [PATCH v2 3/3] perf test: Add selftest to test IBS invocation via core pmu events Date: Thu, 9 Mar 2023 15:41:11 +0530 Message-ID: <20230309101111.444-4-ravi.bangoria@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230309101111.444-1-ravi.bangoria@amd.com> References: <20230309101111.444-1-ravi.bangoria@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT034:EE_|SJ1PR12MB6027:EE_ X-MS-Office365-Filtering-Correlation-Id: 9853715b-d2c4-483b-4323-08db2086cbff X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: CP6MpImZle+NiLDqfPc56DvreMjx57jK25NYEoB/IgwwU7IrABRdvXlFoU7iu9J2FfgMZVoxgXPVRfxsSm8zDCttWYgQnpW9YEebKL4qJOJ2J8w2kbzzsbqkjuLoS0g01Oalla1P3ZGSpmUZvIeF5WJYx8RN/fFSDstjs5iE8MH5hMcZE20GSXUF4mWzE4XCPj0Fy3zj5thGB+D90uzxu88IYB4skECwzzH7PU7EozwCUOdRu9gxIZPIXyrTBPxj+VqWCVu28C9K8qBTfbBisR0X6CsKKIf0oAVU3FzJMWcOJhYAAt/I3ATVAZqXfeFoTARo37+wzEPHfhQCwWh0Et4ooirdYwd0UXbtk426b+FmOHSmgjBIi9rDIK/b9mOUBNSat5Fxye0qhQWznbTe1qpqQKmpVOh5Fqs8UiOvPZ/KhK1vHaNp+dkAfjvuwuByMs9vCyAkGqvQ14lW+OYOi94uVSYkBfVMn5+PZyp0XmKj5NlKDtfGGixVnpeplcS3rb9p2hm0M2aNjIUshkgiDbYGgy+C8kjtcoypJey9sJ6ska/yb9CvA/BqlP73r3kAdw1EKqoXsn4/p2dhH2inQtFQzeFfOnUgcc/Zc0kGUEU69r/V4opCBITE63nUUJcXq+rgkLq67NMH4txmbBdFDbQFibP0UrL8L5ehR0jevLlGThsqJkZGa3BzxJxQ+WM/95vs3ZGsuR4+mk4qY0g6p6DqioUJv+2j/pJcklpJDh4= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(376002)(136003)(396003)(39860400002)(346002)(451199018)(46966006)(40470700004)(36840700001)(36756003)(40460700003)(356005)(54906003)(7696005)(7416002)(5660300002)(316002)(8936002)(70586007)(2906002)(8676002)(70206006)(4326008)(6916009)(6666004)(41300700001)(44832011)(186003)(36860700001)(86362001)(81166007)(478600001)(40480700001)(26005)(82740400003)(2616005)(16526019)(1076003)(83380400001)(82310400005)(336012)(47076005)(426003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Mar 2023 10:12:32.2486 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9853715b-d2c4-483b-4323-08db2086cbff X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT034.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6027 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759885640883038703?= X-GMAIL-MSGID: =?utf-8?q?1759885640883038703?= IBS pmu can be invoked via fixed set of core pmu events. Add a simple event open test for all these events. Without kernel fix: $ sudo ./perf test -vv 76 76: IBS via core pmu : --- start --- test child forked, pid 6553 Using CPUID AuthenticAMD-25-1-1 type: 0x0, config: 0x0, fd: 3 - Pass type: 0x0, config: 0x1, fd: -1 - Pass type: 0x4, config: 0x76, fd: -1 - Fail type: 0x4, config: 0xc1, fd: -1 - Fail type: 0x4, config: 0x12, fd: -1 - Pass test child finished with -1 ---- end ---- IBS via core pmu: FAILED! With kernel fix: $ sudo ./perf test -vv 76 76: IBS via core pmu : --- start --- test child forked, pid 7526 Using CPUID AuthenticAMD-25-1-1 type: 0x0, config: 0x0, fd: 3 - Pass type: 0x0, config: 0x1, fd: -1 - Pass type: 0x4, config: 0x76, fd: 3 - Pass type: 0x4, config: 0xc1, fd: 3 - Pass type: 0x4, config: 0x12, fd: -1 - Pass test child finished with 0 ---- end ---- IBS via core pmu: Ok Signed-off-by: Ravi Bangoria --- tools/perf/tests/Build | 1 + tools/perf/tests/builtin-test.c | 1 + tools/perf/tests/ibs-via-core-pmu.c | 70 +++++++++++++++++++++++++++++ tools/perf/tests/tests.h | 1 + 4 files changed, 73 insertions(+) create mode 100644 tools/perf/tests/ibs-via-core-pmu.c diff --git a/tools/perf/tests/Build b/tools/perf/tests/Build index fb9ac5dc4079..1a232cf13c33 100644 --- a/tools/perf/tests/Build +++ b/tools/perf/tests/Build @@ -69,6 +69,7 @@ perf-y += dlfilter-test.o perf-y += sigtrap.o perf-y += event_groups.o perf-y += symbols.o +perf-y += ibs-via-core-pmu.o $(OUTPUT)tests/llvm-src-base.c: tests/bpf-script-example.c tests/Build $(call rule_mkdir) diff --git a/tools/perf/tests/builtin-test.c b/tools/perf/tests/builtin-test.c index 35cc3807cc9e..aed887234500 100644 --- a/tools/perf/tests/builtin-test.c +++ b/tools/perf/tests/builtin-test.c @@ -119,6 +119,7 @@ static struct test_suite *generic_tests[] = { &suite__sigtrap, &suite__event_groups, &suite__symbols, + &suite__ibs_via_core_pmu, NULL, }; diff --git a/tools/perf/tests/ibs-via-core-pmu.c b/tools/perf/tests/ibs-via-core-pmu.c new file mode 100644 index 000000000000..6ac539509791 --- /dev/null +++ b/tools/perf/tests/ibs-via-core-pmu.c @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "linux/perf_event.h" +#include "tests.h" +#include "pmu.h" +#include "pmus.h" +#include "../perf-sys.h" +#include "debug.h" + +#define NR_SUB_TESTS 5 + +static struct sub_tests { + int type; + unsigned long config; + bool valid; +} sub_tests[NR_SUB_TESTS] = { + { PERF_TYPE_HARDWARE, PERF_COUNT_HW_CPU_CYCLES, true }, + { PERF_TYPE_HARDWARE, PERF_COUNT_HW_INSTRUCTIONS, false }, + { PERF_TYPE_RAW, 0x076, true }, + { PERF_TYPE_RAW, 0x0C1, true }, + { PERF_TYPE_RAW, 0x012, false }, +}; + +static int event_open(int type, unsigned long config) +{ + struct perf_event_attr attr; + + memset(&attr, 0, sizeof(struct perf_event_attr)); + attr.type = type; + attr.size = sizeof(struct perf_event_attr); + attr.config = config; + attr.disabled = 1; + attr.precise_ip = 1; + attr.sample_type = PERF_SAMPLE_IP | PERF_SAMPLE_TID; + attr.sample_period = 100000; + + return sys_perf_event_open(&attr, -1, 0, -1, 0); +} + +static int test__ibs_via_core_pmu(struct test_suite *text __maybe_unused, + int subtest __maybe_unused) +{ + struct perf_pmu *ibs_pmu; + int ret = TEST_OK; + int fd, i; + + if (list_empty(&pmus)) + perf_pmu__scan(NULL); + + ibs_pmu = perf_pmu__find("ibs_op"); + if (!ibs_pmu) + return TEST_SKIP; + + for (i = 0; i < NR_SUB_TESTS; i++) { + fd = event_open(sub_tests[i].type, sub_tests[i].config); + pr_debug("type: 0x%x, config: 0x%lx, fd: %d - ", sub_tests[i].type, + sub_tests[i].config, fd); + if ((sub_tests[i].valid && fd == -1) || + (!sub_tests[i].valid && fd > 0)) { + pr_debug("Fail\n"); + ret = TEST_FAIL; + } else { + pr_debug("Pass\n"); + close(fd); + } + } + + return ret; +} + +DEFINE_SUITE("IBS via core pmu", ibs_via_core_pmu); diff --git a/tools/perf/tests/tests.h b/tools/perf/tests/tests.h index 9a0f3904e53d..36339fdf9c36 100644 --- a/tools/perf/tests/tests.h +++ b/tools/perf/tests/tests.h @@ -149,6 +149,7 @@ DECLARE_SUITE(dlfilter); DECLARE_SUITE(sigtrap); DECLARE_SUITE(event_groups); DECLARE_SUITE(symbols); +DECLARE_SUITE(ibs_via_core_pmu); /* * PowerPC and S390 do not support creation of instruction breakpoints using the