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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id a6-20020a2e8606000000b00295a2a608e9sm2688844lji.111.2023.03.08.13.40.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 13:40:11 -0800 (PST) From: Konrad Dybcio Date: Wed, 08 Mar 2023 22:40:07 +0100 Subject: [PATCH v7 1/9] interconnect: qcom: rpm: make QoS INVALID default MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v7-1-815606092fff@linaro.org> References: <20230228-topic-qos-v7-0-815606092fff@linaro.org> In-Reply-To: <20230228-topic-qos-v7-0-815606092fff@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678311609; l=3885; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=LVE+/4VEPlESfpraQPOmUutEh9JBL8Wa+LXrVkmoSRk=; b=gJMwz8piyTMvm2V36mHRd1dkdTSh+p4qkELYhIGdbDREHPK7I6YqfPxrqS/NhkZp/dmG8Wb4cqXM bZkKQiAPDqYbOwiy1yMXt4nmmqvHVaquYbkEmYNc/TMAk3w6d2LG X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_HTTP,RCVD_IN_SORBS_SOCKS,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759837395362038077?= X-GMAIL-MSGID: =?utf-8?q?1759837395362038077?= Currently NOC_QOS_MODE_FIXED is defined as 0x0 which makes it the default option (partial struct initialization). The default option however should be NOC_QOS_MODE_INVALID. That results in bogus QoS configurations being sent for port 0 (which is used for the DRAM endpoint on BIMC, for example) coming from all nodes with .qos.ap_owned = true and uninitialized .qos.qos_mode. It's also an issue for newer SoCs where all nodes are treated as if they were ap_owned, but not all of them have QoS configuration. The NOC_QOS_MODEs are defined as preprocessor constants and are not used anywhere outside qcom_icc_set_noc_qos(), which is easily worked around. Separate the desc->type values from the values sent to msmbus in the aforementioned function. Make the former an enum for better mainainability. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/icc-rpm.c | 24 +++++++++++++----------- drivers/interconnect/qcom/icc-rpm.h | 10 ++++++---- 2 files changed, 19 insertions(+), 15 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 4d0997b210f7..35fd75ae70e3 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -48,6 +48,9 @@ #define NOC_QOS_MODEn_ADDR(n) (0xc + (n * 0x1000)) #define NOC_QOS_MODEn_MASK 0x3 +#define NOC_QOS_MODE_FIXED_VAL 0x0 +#define NOC_QOS_MODE_BYPASS_VAL 0x2 + static int qcom_icc_set_qnoc_qos(struct icc_node *src, u64 max_bw) { struct icc_provider *provider = src->provider; @@ -153,7 +156,7 @@ static int qcom_icc_set_noc_qos(struct icc_node *src, u64 max_bw) struct qcom_icc_provider *qp; struct qcom_icc_node *qn; struct icc_provider *provider; - u32 mode = NOC_QOS_MODE_BYPASS; + u32 mode = NOC_QOS_MODE_BYPASS_VAL; int rc = 0; qn = src->data; @@ -167,18 +170,17 @@ static int qcom_icc_set_noc_qos(struct icc_node *src, u64 max_bw) return 0; } - if (qn->qos.qos_mode != NOC_QOS_MODE_INVALID) - mode = qn->qos.qos_mode; - - if (mode == NOC_QOS_MODE_FIXED) { - dev_dbg(src->provider->dev, "NoC QoS: %s: Set Fixed mode\n", - qn->name); + if (qn->qos.qos_mode == NOC_QOS_MODE_FIXED) { + dev_dbg(src->provider->dev, "NoC QoS: %s: Set Fixed mode\n", qn->name); + mode = NOC_QOS_MODE_FIXED_VAL; rc = qcom_icc_noc_set_qos_priority(qp, &qn->qos); if (rc) return rc; - } else if (mode == NOC_QOS_MODE_BYPASS) { - dev_dbg(src->provider->dev, "NoC QoS: %s: Set Bypass mode\n", - qn->name); + } else if (qn->qos.qos_mode == NOC_QOS_MODE_BYPASS) { + dev_dbg(src->provider->dev, "NoC QoS: %s: Set Bypass mode\n", qn->name); + mode = NOC_QOS_MODE_BYPASS_VAL; + } else { + /* How did we get here? */ } return regmap_update_bits(qp->regmap, @@ -244,7 +246,7 @@ static int __qcom_icc_set(struct icc_node *n, struct qcom_icc_node *qn, ret = qcom_icc_rpm_set(qn->mas_rpm_id, qn->slv_rpm_id, sum_bw); if (ret) return ret; - } else if (qn->qos.qos_mode != -1) { + } else if (qn->qos.qos_mode != NOC_QOS_MODE_INVALID) { /* set bandwidth directly from the AP */ ret = qcom_icc_qos_set(n, sum_bw); if (ret) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index a49af844ab13..8ba1918d7997 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -97,10 +97,12 @@ struct qcom_icc_desc { unsigned int qos_offset; }; -/* Valid for both NoC and BIMC */ -#define NOC_QOS_MODE_INVALID -1 -#define NOC_QOS_MODE_FIXED 0x0 -#define NOC_QOS_MODE_BYPASS 0x2 +/* Valid for all bus types */ +enum qos_mode { + NOC_QOS_MODE_INVALID = 0, + NOC_QOS_MODE_FIXED, + NOC_QOS_MODE_BYPASS, +}; int qnoc_probe(struct platform_device *pdev); int qnoc_remove(struct platform_device *pdev); From patchwork Wed Mar 8 21:40:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 66469 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp591287wrd; Wed, 8 Mar 2023 13:51:12 -0800 (PST) X-Google-Smtp-Source: AK7set9PkbFRiD5L+uFQvzM2h4VXev9MDwQi0lUDLKdLD4rPNtNqF847MZ9GC/MPk2L+HL+n3Blz X-Received: by 2002:a05:6a20:7a9c:b0:cc:dd86:ca06 with SMTP id u28-20020a056a207a9c00b000ccdd86ca06mr15182995pzh.60.1678312272671; Wed, 08 Mar 2023 13:51:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678312272; cv=none; d=google.com; s=arc-20160816; b=xpyVKoJI/rk/mBFARW2K2EllZVbzr0x97I9jmn4R6V9XFDtAc8lITJ58Ltoysrk2nj H/REw+GPCMFnNIx+us/yw5UOJKPMh8vFNjXQn1+EyxhR/Je5LIG4MX4+EK487pgMscSt bKedB/bdev7UFtCCpPe0h6s/7jwKzQkVO8DUWLEOfdwV4DQaXGdhU5kvwrrGTCVR4+Ws QMlLRQO6lcRjHgFh9H+XFTvFs+Hb/LKEG2nyv4cXSloffWoWtK7SSMptHhlsSXh9pxxu UFa1C1GSoVYaLpNsMEddogn6PcruxfZ4FJ5j/luyn9EomHL3V1DytbmJJoJOji/Uoxk9 JlnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=ZWvxJATtCZZKMC5qHkete+t4P5fdMAJTPULnzyt/6uA=; b=WJa6So+vy5Y8OVSu0NxZxb2yJiVhoxosKSvz2DubJvF8GpEiyur7Qm9x2lTwsWRufU 9BQvceKqFC8SKCqj538NVz1eyNzMUnjcclgXIsdZjAtiwVQJ+hDXudLsxQ/l5AjvK0QG RTkVOSN0BGCYhiPbUsl2zT192+LYwLva5DhPxdf32pYY4SeEPT0GW59QfsoITVMkdCYf 2UhN0zSJHjAAFRNw7Jh1XdJVr1RAnyjdijHo9zUOWTNpeMNCaj7XtmBi0AuE2bXI6zL9 cfxHSJkAx2ecMiUbAhMCmRH0GfBfP+L6Gou6ruYbxQCaNkDvf75lfFrzcqe4rclytOht ZMbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="W9PP/8O9"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id a6-20020a2e8606000000b00295a2a608e9sm2688844lji.111.2023.03.08.13.40.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 13:40:13 -0800 (PST) From: Konrad Dybcio Date: Wed, 08 Mar 2023 22:40:08 +0100 Subject: [PATCH v7 2/9] interconnect: qcom: rpm: Add support for specifying channel num MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v7-2-815606092fff@linaro.org> References: <20230228-topic-qos-v7-0-815606092fff@linaro.org> In-Reply-To: <20230228-topic-qos-v7-0-815606092fff@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678311609; l=2390; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=mgGX39iPtIfm1zsmEzmtm3Z/menbT73VBLNzExJPqt4=; b=lQrFaeMU78TFU1DAP//yDiIt4f1Jg5NB7EcRVWfLHFISeAPTGj7MD3IOj8B9GG7Fx/5Vn21g1NTm D3VP+W1eATugu0NF9GHr9lF59gigQKAexO/bHDQyT8vS/P4MBSGv X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_HTTP,RCVD_IN_SORBS_SOCKS,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759837969455793511?= X-GMAIL-MSGID: =?utf-8?q?1759837969455793511?= Some nodes, like EBI0 (DDR) or L3/LLCC, may be connected over more than one channel. This should be taken into account in bandwidth calcualtion, as we're supposed to feed msmbus with the per-channel bandwidth. Add support for specifying that and use it during bandwidth aggregation. Reviewed-by: Bryan O'Donoghue Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/icc-rpm.c | 7 ++++++- drivers/interconnect/qcom/icc-rpm.h | 2 ++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 35fd75ae70e3..27c4c6497994 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -317,6 +317,7 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, { struct icc_node *node; struct qcom_icc_node *qn; + u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; int i; /* Initialise aggregate values */ @@ -334,7 +335,11 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, list_for_each_entry(node, &provider->nodes, node_list) { qn = node->data; for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { - agg_avg[i] += qn->sum_avg[i]; + if (qn->channels) + sum_avg[i] = div_u64(qn->sum_avg[i], qn->channels); + else + sum_avg[i] = qn->sum_avg[i]; + agg_avg[i] += sum_avg[i]; agg_peak[i] = max_t(u64, agg_peak[i], qn->max_peak[i]); } } diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 8ba1918d7997..8aed5400afda 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -66,6 +66,7 @@ struct qcom_icc_qos { * @id: a unique node identifier * @links: an array of nodes where we can go next while traversing * @num_links: the total number of @links + * @channels: number of channels at this node (e.g. DDR channels) * @buswidth: width of the interconnect between a node and the bus (bytes) * @sum_avg: current sum aggregate value of all avg bw requests * @max_peak: current max aggregate value of all peak bw requests @@ -78,6 +79,7 @@ struct qcom_icc_node { u16 id; const u16 *links; u16 num_links; + u16 channels; u16 buswidth; u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; u64 max_peak[QCOM_ICC_NUM_BUCKETS]; From patchwork Wed Mar 8 21:40:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 66464 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp589420wrd; Wed, 8 Mar 2023 13:46:05 -0800 (PST) X-Google-Smtp-Source: AK7set/C6fWc7TtpjRexLvFAY6dlD5ItwCEuvvyNlq0MC6CjWI56DD/SEkuYlVLB7fUl8+4lT5wE X-Received: by 2002:a05:6a20:5483:b0:c7:b65:cb3b with SMTP id i3-20020a056a20548300b000c70b65cb3bmr27774802pzk.10.1678311964776; Wed, 08 Mar 2023 13:46:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678311964; cv=none; d=google.com; s=arc-20160816; b=FJSekF9+SRe3kJYbpCBjgy0f386So2uzAGtV3O+/09Ul4SXg4zo6qBJgyaL87iv8j4 nd3e3I9hMzniQ79j9iwa3bPS/IcpVGg/MfcHEZuxnBEmBJzVcSghaCZ+i2OtKTOHpyc6 7AcFYi7cm8ARfGQsXK03YSu9epFuNkUTGs2lMtymp5BSCj1FjB/28XJhfTPL37qxK7+f wjAn0IxMK9un8Q9QDSlr9rkunasvx/dfouGmwKJzbSL29nW1xved8gfSVTZR9fiiCd43 DFmFQgj5Wt6ivSveThYPEQLVG0QObrmaK1AAFYrGIalr0IcwWFMfhM3pX2HdeU98yH2o sL2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=rV1fhlo3d+5jqHbCH3aEpZYk1ZijM8P8h8hsb2YwO9c=; b=C47paY5IdgU2ctsh4gtp+o4C6NcvXoHwt3ncZA0oDppNdc5jNEqLkNXc9BFcTfN20o 9tHTKBoIAVTU/L7AT7De6q57Z+j2ta3N+WAkuMO/Sve6zUSQCtIBeU41qu5yhHrW81vn 3XG8w5X8lappLliWfREv5IXGSEF+NfaRf3ewnPMoesRgKO92j2p/bAEpS5DydWY3kQ9J wboPOGH5alMavkbSEzy7UgxU72UjibP4OI0J/2JjB/13yp+cwIn6LDCpabZd+6WkaB66 ODjyuN93Domv+IfJpe3DRwktfdw56PGU77g4zK5c3pye8OOtiU4vKj6FJbWf90vxIbhS udeA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ezT8WuYy; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/icc-rpm.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 8aed5400afda..21f440beda86 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -23,12 +23,12 @@ enum qcom_icc_type { /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider - * @bus_clks: the clk_bulk_data table of bus clocks * @num_clks: the total number of clk_bulk_data entries * @type: the ICC provider type - * @qos_offset: offset to QoS registers * @regmap: regmap for QoS registers read/write access + * @qos_offset: offset to QoS registers * @bus_clk_rate: bus clock rate in Hz + * @bus_clks: the clk_bulk_data table of bus clocks */ struct qcom_icc_provider { struct icc_provider provider; From patchwork Wed Mar 8 21:40:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 66467 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp590652wrd; Wed, 8 Mar 2023 13:49:15 -0800 (PST) X-Google-Smtp-Source: AK7set93ttcSCjQe9/nyid/xtJYSipCPjXuOOMIHuxE6JIFk+NgF1tYgQpFFVnu3f5jR9Wvk07FD X-Received: by 2002:a17:902:ab8b:b0:196:11b1:101d with SMTP id f11-20020a170902ab8b00b0019611b1101dmr16431926plr.28.1678312155288; Wed, 08 Mar 2023 13:49:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678312155; cv=none; d=google.com; s=arc-20160816; b=eL+1udx6z9ruEAGHg6Wb3uUHuY+X+4w7iK3/Tu+b/qlHtHCuT6yRZuAG1a65NdjB6c skVmofRA36MSGoiAxLmNb3fbyvEpkqFfNzf4WQoMkN33ZISsXV0gqvnip1p0BpNXJv7g SDJ059VLsNjWkcLUe1bV/plcfCNUCsBkI5TDKSLoOD1bFGwA9vTaGRsMFILUcbev7RIs ZX2exF5x/OuKwHb/xCjjAt3Gdqn0bJcsQtWqFjF92VMIiQD7CVErPiIxIOS+/J3NmBk6 259+xCsttQvSA2u0WnMRk/Wc5pIyHr0QyLyr9x1ToJsvA2vza3AAq9+XU23YgY3fDeG4 26HA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=H5GHYEIjbrYKh7epw0Tc9uZ+ildQxs6YuaDANyPv2Xw=; b=K+z/lJoidg+6fu75MvJaNYOlPX6f/LpojfPAUvz6+/CnGjcuOnkhEJuVcn10pJwAYE bYzMvBfVU9je+KKFcEmGz7DQCGovMG+6hc+2ZBukSgHhDCZ0ZrksG6H7blSmBNkA38IS B9g+g3uglHQkv+APsUWIMPGwS+U5nCyPTyMJHI+VxANfsRc1Tbake53nkTnVcrZozMUw tHEuLNwfQWqK377iMunzCEojPj7GwYy6k7ux0ZHrDo7y4IWPAaYQ/0pigpEQVuFin3Dh HUFeSk8lfaQFhwb6sYhMw28v+EiBHZFVYaRU9GLxgun5oT/Q5654BqQYhU2PGsH46RUA CuTw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=te6pIPbu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id a6-20020a2e8606000000b00295a2a608e9sm2688844lji.111.2023.03.08.13.40.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 13:40:16 -0800 (PST) From: Konrad Dybcio Date: Wed, 08 Mar 2023 22:40:10 +0100 Subject: [PATCH v7 4/9] interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v7-4-815606092fff@linaro.org> References: <20230228-topic-qos-v7-0-815606092fff@linaro.org> In-Reply-To: <20230228-topic-qos-v7-0-815606092fff@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678311609; l=4029; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=RNV6KgXNPCBz86BXWRqH9BOu/RV7oznRcNML/Qwy+fw=; b=waSFnWD/jVNkapAVGoVS+voXZyU+mcBxYGGg6JCvbqm0jnmy/CWpsAbfKPtZShB+oFRbTXhgqSAQ 70/kQa/GBDSvEvq18szdU+zwvxDXLlD63azArMPcMniKciOOPGGM X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_HTTP,RCVD_IN_SORBS_SOCKS,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759837846713329448?= X-GMAIL-MSGID: =?utf-8?q?1759837846713329448?= Rename the "clocks" (and _names) fields of qcom_icc_desc to "bus_clocks" in preparation for introducing handling of clocks that need to be enabled but not voted on with aggregate frequency. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 6 +++--- drivers/interconnect/qcom/icc-rpm.h | 4 ++-- drivers/interconnect/qcom/msm8996.c | 12 ++++++------ drivers/interconnect/qcom/sdm660.c | 8 ++++---- 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 27c4c6497994..62c48fb13fbf 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -441,9 +441,9 @@ int qnoc_probe(struct platform_device *pdev) qnodes = desc->nodes; num_nodes = desc->num_nodes; - if (desc->num_clocks) { - cds = desc->clocks; - cd_num = desc->num_clocks; + if (desc->num_bus_clocks) { + cds = desc->bus_clocks; + cd_num = desc->num_bus_clocks; } else { cds = bus_clocks; cd_num = ARRAY_SIZE(bus_clocks); diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 21f440beda86..d6b4c56bf02c 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -91,8 +91,8 @@ struct qcom_icc_node { struct qcom_icc_desc { struct qcom_icc_node * const *nodes; size_t num_nodes; - const char * const *clocks; - size_t num_clocks; + const char * const *bus_clocks; + size_t num_bus_clocks; bool has_bus_pd; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 25a1a32bc611..69fc50a6fa5c 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -1821,8 +1821,8 @@ static const struct qcom_icc_desc msm8996_a0noc = { .type = QCOM_ICC_NOC, .nodes = a0noc_nodes, .num_nodes = ARRAY_SIZE(a0noc_nodes), - .clocks = bus_a0noc_clocks, - .num_clocks = ARRAY_SIZE(bus_a0noc_clocks), + .bus_clocks = bus_a0noc_clocks, + .num_bus_clocks = ARRAY_SIZE(bus_a0noc_clocks), .has_bus_pd = true, .regmap_cfg = &msm8996_a0noc_regmap_config }; @@ -1866,8 +1866,8 @@ static const struct qcom_icc_desc msm8996_a2noc = { .type = QCOM_ICC_NOC, .nodes = a2noc_nodes, .num_nodes = ARRAY_SIZE(a2noc_nodes), - .clocks = bus_a2noc_clocks, - .num_clocks = ARRAY_SIZE(bus_a2noc_clocks), + .bus_clocks = bus_a2noc_clocks, + .num_bus_clocks = ARRAY_SIZE(bus_a2noc_clocks), .regmap_cfg = &msm8996_a2noc_regmap_config }; @@ -2005,8 +2005,8 @@ static const struct qcom_icc_desc msm8996_mnoc = { .type = QCOM_ICC_NOC, .nodes = mnoc_nodes, .num_nodes = ARRAY_SIZE(mnoc_nodes), - .clocks = bus_mm_clocks, - .num_clocks = ARRAY_SIZE(bus_mm_clocks), + .bus_clocks = bus_mm_clocks, + .num_bus_clocks = ARRAY_SIZE(bus_mm_clocks), .regmap_cfg = &msm8996_mnoc_regmap_config }; diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 8d879b0bcabc..a22ba821efbf 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -1516,8 +1516,8 @@ static const struct qcom_icc_desc sdm660_a2noc = { .type = QCOM_ICC_NOC, .nodes = sdm660_a2noc_nodes, .num_nodes = ARRAY_SIZE(sdm660_a2noc_nodes), - .clocks = bus_a2noc_clocks, - .num_clocks = ARRAY_SIZE(bus_a2noc_clocks), + .bus_clocks = bus_a2noc_clocks, + .num_bus_clocks = ARRAY_SIZE(bus_a2noc_clocks), .regmap_cfg = &sdm660_a2noc_regmap_config, }; @@ -1659,8 +1659,8 @@ static const struct qcom_icc_desc sdm660_mnoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_mnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_mnoc_nodes), - .clocks = bus_mm_clocks, - .num_clocks = ARRAY_SIZE(bus_mm_clocks), + .bus_clocks = bus_mm_clocks, + .num_bus_clocks = ARRAY_SIZE(bus_mm_clocks), .regmap_cfg = &sdm660_mnoc_regmap_config, }; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id a6-20020a2e8606000000b00295a2a608e9sm2688844lji.111.2023.03.08.13.40.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 13:40:29 -0800 (PST) From: Konrad Dybcio Date: Wed, 08 Mar 2023 22:40:11 +0100 Subject: [PATCH v7 5/9] interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v7-5-815606092fff@linaro.org> References: <20230228-topic-qos-v7-0-815606092fff@linaro.org> In-Reply-To: <20230228-topic-qos-v7-0-815606092fff@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678311609; l=3046; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=PzS93QUtZWZrTNDO3Fwk1Lsu/LMOgfbQTOZsMendxfs=; b=++Ge49gGRG0A2V4Md9NFW09tXmZAdsbP6qY0yPTPPRZ9ktAZweO1wv/wafbiEpZnH56yVKx/OLCa yx81tNjqDs3wPjy4maTnxs7XO0czV2ldVvMTfOwv8l9WodlduZkl X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_HTTP,RCVD_IN_SORBS_SOCKS,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759837935303182865?= X-GMAIL-MSGID: =?utf-8?q?1759837935303182865?= In preparation for handling non-scaling clocks that we still have to enable, rename num_clocks to more descriptive num_bus_clocks. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 12 ++++++------ drivers/interconnect/qcom/icc-rpm.h | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 62c48fb13fbf..b52f788d8f3d 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -380,7 +380,7 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) return ret; } - for (i = 0; i < qp->num_clks; i++) { + for (i = 0; i < qp->num_bus_clks; i++) { /* * Use WAKE bucket for active clock, otherwise, use SLEEP bucket * for other clocks. If a platform doesn't set interconnect @@ -465,7 +465,7 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < cd_num; i++) qp->bus_clks[i].id = cds[i]; - qp->num_clks = cd_num; + qp->num_bus_clks = cd_num; qp->type = desc->type; qp->qos_offset = desc->qos_offset; @@ -495,11 +495,11 @@ int qnoc_probe(struct platform_device *pdev) } regmap_done: - ret = devm_clk_bulk_get_optional(dev, qp->num_clks, qp->bus_clks); + ret = devm_clk_bulk_get_optional(dev, qp->num_bus_clks, qp->bus_clks); if (ret) return ret; - ret = clk_bulk_prepare_enable(qp->num_clks, qp->bus_clks); + ret = clk_bulk_prepare_enable(qp->num_bus_clks, qp->bus_clks); if (ret) return ret; @@ -558,7 +558,7 @@ int qnoc_probe(struct platform_device *pdev) err_remove_nodes: icc_nodes_remove(provider); err_disable_clks: - clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); + clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); return ret; } @@ -570,7 +570,7 @@ int qnoc_remove(struct platform_device *pdev) icc_provider_deregister(&qp->provider); icc_nodes_remove(&qp->provider); - clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); + clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); return 0; } diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index d6b4c56bf02c..d4401f35f6d2 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -23,7 +23,7 @@ enum qcom_icc_type { /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider - * @num_clks: the total number of clk_bulk_data entries + * @num_bus_clks: the total number of bus_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access * @qos_offset: offset to QoS registers @@ -32,7 +32,7 @@ enum qcom_icc_type { */ struct qcom_icc_provider { struct icc_provider provider; - int num_clks; + int num_bus_clks; enum qcom_icc_type type; struct regmap *regmap; unsigned int qos_offset; From patchwork Wed Mar 8 21:40:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 66470 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp592488wrd; Wed, 8 Mar 2023 13:54:24 -0800 (PST) X-Google-Smtp-Source: AK7set8l0ZWkaSuZIQ6vhM6IkpiruwJQPL+xg4si/aB9DSBUzc6QwEsVWrxXeHrXoYi9Rrged0cZ X-Received: by 2002:a17:902:e884:b0:19e:845d:d898 with SMTP id w4-20020a170902e88400b0019e845dd898mr21386220plg.14.1678312464316; Wed, 08 Mar 2023 13:54:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678312464; cv=none; d=google.com; s=arc-20160816; b=nWt9SVonTen4YMoEUcbmLPQfdgJLO2GyAGxIL8hocMNcUn3S0DQTf17+4Xot+8T8bM a5cJ0qaaK2kmUZWxjL32clsiqZ4/ytpFa7VbCiO7eIPQrB32TFEGOjL+6zffCv41m1Xo zAG9SmxDp/23YrnCbx56qTkzAxmFlz92ZDsjQv2cs5T3ICY20VmfDL8hdByQhBOCdp/V 8Bi60U26L1x2eL+0i1gvsBKAD1fsD2qDYxsuIp02zWX5KnDBR4/HMLJnq4M0aAoROhZd gouYnldXyOuwjK7leBB1jffGs+c6b/rrc8CAnXIiKYoEEvbWIQ2VA27kE/JTO5tOEHYZ lZCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=zAhLMOlOq8f0+6Y4C/vkVQURcQ846rkCvSSk/ic0CAg=; b=Ou2a0hyGfGnLXxePaY877SDp3WquNNcsXQ+aP9W1HG934XEEogDu43BxSea5Bz2fdo tg6L3RKp4wec4cliWAuzl63yrYHxyRVvgxMqTqmtN8gO2f5N/WqMZODtNpsY1OrVAJ0K u0Dykm4Pz6o8DoXZfbkz89COU/HuV7GqcITd6/H8mLrqyJz8nkZ0UcRGhQy8O8lsEFQA Kve/wR7zbcZV9Ddc932QPBNQRh1t080iRlse4D4T6NwbeoiAeRibjandb5fQLB8SntRs 0ZZmcGfwwVbBpJNdIVJ8uOlUamRLgKSc5O2sQEFiTM9fm+V+7QIdLzqxmGPx1/Jh9EqO 6bcw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="jL/mRiln"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id a6-20020a2e8606000000b00295a2a608e9sm2688844lji.111.2023.03.08.13.40.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 13:40:32 -0800 (PST) From: Konrad Dybcio Date: Wed, 08 Mar 2023 22:40:12 +0100 Subject: [PATCH v7 6/9] interconnect: qcom: rpm: Handle interface clocks MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v7-6-815606092fff@linaro.org> References: <20230228-topic-qos-v7-0-815606092fff@linaro.org> In-Reply-To: <20230228-topic-qos-v7-0-815606092fff@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678311609; l=8939; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=zxoyRaDjRCEGCD17MC1LW/4OmB7mruBwQv24D0PVHh0=; b=j9B0Ya0yuP6y3htkWsWdiIW21nuhIgBqFbFetRb1sh37wKwgJmnooiCqm2QoH1ZMKFv2I9AqLMpR kpeMkiZYDHrgZ1ZqYApiPh+tjgqXPHTrHmGkDUUIQd2yxQmTLJhO X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_HTTP,RCVD_IN_SORBS_SOCKS,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759838170236430283?= X-GMAIL-MSGID: =?utf-8?q?1759838170236430283?= Some (but not all) providers (or their specific nodes) require specific clocks to be turned on before they can be accessed. Failure to ensure that results in a seemingly random system crash (which would usually happen at boot with the interconnect driver built-in), resulting in the platform not booting up properly. Limit the number of bus_clocks to 2 (which is the maximum that SMD RPM interconnect supports anyway) and handle non-scaling clocks separately. Update MSM8996 and SDM660 drivers to make sure they do not regress with this change. This unfortunately has to be done in one patch to prevent either compile errors or broken bisect. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 52 ++++++++++++++++++++++++++++++------- drivers/interconnect/qcom/icc-rpm.h | 14 ++++++++-- drivers/interconnect/qcom/msm8996.c | 22 +++++++--------- drivers/interconnect/qcom/sdm660.c | 16 +++++------- 4 files changed, 70 insertions(+), 34 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index b52f788d8f3d..ca932ed720fb 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -369,6 +369,17 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) qcom_icc_bus_aggregate(provider, agg_avg, agg_peak, &max_agg_avg); + /* If we're powering on the bus, ensure the necessary clocks are on */ + if (unlikely(!qp->is_on)) { + if (agg_peak[0] || agg_peak[1] || max_agg_avg) { + /* If this fails, bus accesses will crash the platform! */ + ret = clk_bulk_prepare_enable(qp->num_intf_clks, qp->intf_clks); + if (ret) + return ret; + qp->is_on = true; + } + } + sum_bw = icc_units_to_bps(max_agg_avg); ret = __qcom_icc_set(src, src_qn, sum_bw); @@ -409,6 +420,14 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) qp->bus_clk_rate[i] = rate; } + /* Turn off the interface clocks if the bus was shut down so as not to leak power */ + if (!qp->bus_clk_rate[0] && !qp->bus_clk_rate[1]) { + if (!agg_peak[0] && !agg_peak[1] && !max_agg_avg) { + clk_bulk_disable_unprepare(qp->num_intf_clks, qp->intf_clks); + qp->is_on = false; + } + } + return 0; } @@ -441,21 +460,20 @@ int qnoc_probe(struct platform_device *pdev) qnodes = desc->nodes; num_nodes = desc->num_nodes; - if (desc->num_bus_clocks) { - cds = desc->bus_clocks; - cd_num = desc->num_bus_clocks; + if (desc->num_intf_clocks) { + cds = desc->intf_clocks; + cd_num = desc->num_intf_clocks; } else { - cds = bus_clocks; - cd_num = ARRAY_SIZE(bus_clocks); + /* 0 intf clocks is perfectly fine */ + cd_num = 0; } - qp = devm_kzalloc(dev, struct_size(qp, bus_clks, cd_num), GFP_KERNEL); + qp = devm_kzalloc(dev, sizeof(*qp), GFP_KERNEL); if (!qp) return -ENOMEM; - qp->bus_clk_rate = devm_kcalloc(dev, cd_num, sizeof(*qp->bus_clk_rate), - GFP_KERNEL); - if (!qp->bus_clk_rate) + qp->intf_clks = devm_kzalloc(dev, sizeof(qp->intf_clks), GFP_KERNEL); + if (!qp->intf_clks) return -ENOMEM; data = devm_kzalloc(dev, struct_size(data, nodes, num_nodes), @@ -463,6 +481,18 @@ int qnoc_probe(struct platform_device *pdev) if (!data) return -ENOMEM; + qp->num_intf_clks = cd_num; + for (i = 0; i < cd_num; i++) + qp->intf_clks[i].id = cds[i]; + + if (desc->num_bus_clocks) { + cds = desc->bus_clocks; + cd_num = desc->num_bus_clocks; + } else { + cds = bus_clocks; + cd_num = ARRAY_SIZE(bus_clocks); + } + for (i = 0; i < cd_num; i++) qp->bus_clks[i].id = cds[i]; qp->num_bus_clks = cd_num; @@ -503,6 +533,10 @@ int qnoc_probe(struct platform_device *pdev) if (ret) return ret; + ret = devm_clk_bulk_get(dev, qp->num_intf_clks, qp->intf_clks); + if (ret) + return ret; + if (desc->has_bus_pd) { ret = dev_pm_domain_attach(dev, true); goto err_disable_clks; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index d4401f35f6d2..a4ef45b4a9e0 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -20,24 +20,32 @@ enum qcom_icc_type { QCOM_ICC_QNOC, }; +#define NUM_BUS_CLKS 2 + /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider * @num_bus_clks: the total number of bus_clks clk_bulk_data entries + * @num_intf_clks: the total number of intf_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access * @qos_offset: offset to QoS registers * @bus_clk_rate: bus clock rate in Hz * @bus_clks: the clk_bulk_data table of bus clocks + * @intf_clks: a clk_bulk_data array of interface clocks + * @is_on: whether the bus is powered on */ struct qcom_icc_provider { struct icc_provider provider; int num_bus_clks; + int num_intf_clks; enum qcom_icc_type type; struct regmap *regmap; unsigned int qos_offset; - u64 *bus_clk_rate; - struct clk_bulk_data bus_clks[]; + u64 bus_clk_rate[NUM_BUS_CLKS]; + struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; + struct clk_bulk_data *intf_clks; + bool is_on; }; /** @@ -93,6 +101,8 @@ struct qcom_icc_desc { size_t num_nodes; const char * const *bus_clocks; size_t num_bus_clocks; + const char * const *intf_clocks; + size_t num_intf_clocks; bool has_bus_pd; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 69fc50a6fa5c..1a5e0ad36cc4 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -21,21 +21,17 @@ #include "smd-rpm.h" #include "msm8996.h" -static const char * const bus_mm_clocks[] = { - "bus", - "bus_a", +static const char * const mm_intf_clocks[] = { "iface" }; -static const char * const bus_a0noc_clocks[] = { +static const char * const a0noc_intf_clocks[] = { "aggre0_snoc_axi", "aggre0_cnoc_ahb", "aggre0_noc_mpu_cfg" }; -static const char * const bus_a2noc_clocks[] = { - "bus", - "bus_a", +static const char * const a2noc_intf_clocks[] = { "aggre2_ufs_axi", "ufs_axi" }; @@ -1821,8 +1817,8 @@ static const struct qcom_icc_desc msm8996_a0noc = { .type = QCOM_ICC_NOC, .nodes = a0noc_nodes, .num_nodes = ARRAY_SIZE(a0noc_nodes), - .bus_clocks = bus_a0noc_clocks, - .num_bus_clocks = ARRAY_SIZE(bus_a0noc_clocks), + .intf_clocks = a0noc_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(a0noc_intf_clocks), .has_bus_pd = true, .regmap_cfg = &msm8996_a0noc_regmap_config }; @@ -1866,8 +1862,8 @@ static const struct qcom_icc_desc msm8996_a2noc = { .type = QCOM_ICC_NOC, .nodes = a2noc_nodes, .num_nodes = ARRAY_SIZE(a2noc_nodes), - .bus_clocks = bus_a2noc_clocks, - .num_bus_clocks = ARRAY_SIZE(bus_a2noc_clocks), + .intf_clocks = a2noc_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks), .regmap_cfg = &msm8996_a2noc_regmap_config }; @@ -2005,8 +2001,8 @@ static const struct qcom_icc_desc msm8996_mnoc = { .type = QCOM_ICC_NOC, .nodes = mnoc_nodes, .num_nodes = ARRAY_SIZE(mnoc_nodes), - .bus_clocks = bus_mm_clocks, - .num_bus_clocks = ARRAY_SIZE(bus_mm_clocks), + .intf_clocks = mm_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), .regmap_cfg = &msm8996_mnoc_regmap_config }; diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index a22ba821efbf..0e8a96f4ce90 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -127,15 +127,11 @@ enum { SDM660_SNOC, }; -static const char * const bus_mm_clocks[] = { - "bus", - "bus_a", +static const char * const mm_intf_clocks[] = { "iface", }; -static const char * const bus_a2noc_clocks[] = { - "bus", - "bus_a", +static const char * const a2noc_intf_clocks[] = { "ipa", "ufs_axi", "aggre2_ufs_axi", @@ -1516,8 +1512,8 @@ static const struct qcom_icc_desc sdm660_a2noc = { .type = QCOM_ICC_NOC, .nodes = sdm660_a2noc_nodes, .num_nodes = ARRAY_SIZE(sdm660_a2noc_nodes), - .bus_clocks = bus_a2noc_clocks, - .num_bus_clocks = ARRAY_SIZE(bus_a2noc_clocks), + .intf_clocks = a2noc_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks), .regmap_cfg = &sdm660_a2noc_regmap_config, }; @@ -1659,8 +1655,8 @@ static const struct qcom_icc_desc sdm660_mnoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_mnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_mnoc_nodes), - .bus_clocks = bus_mm_clocks, - .num_bus_clocks = ARRAY_SIZE(bus_mm_clocks), + .intf_clocks = mm_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), .regmap_cfg = &sdm660_mnoc_regmap_config, }; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id a6-20020a2e8606000000b00295a2a608e9sm2688844lji.111.2023.03.08.13.40.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 13:40:33 -0800 (PST) From: Konrad Dybcio Date: Wed, 08 Mar 2023 22:40:13 +0100 Subject: [PATCH v7 7/9] interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v7-7-815606092fff@linaro.org> References: <20230228-topic-qos-v7-0-815606092fff@linaro.org> In-Reply-To: <20230228-topic-qos-v7-0-815606092fff@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678311609; l=3956; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=nj1ikMGVO7EgZAVkHUb/GU8vQaA6emWCF0oysxBXbt0=; b=eSJQ+LMTzaVG8udxqxqS8GpeeEcSj1itclMCXe3BxIfDOdo90YFfck3aG2FUrisriVEHbEL4b2zN 4UP//YJpBzpK8qK+nk0mSg4QkqtxpaWBph2rf2dtVgXnbUE4RD3t X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_HTTP,RCVD_IN_SORBS_SOCKS,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759839891110607353?= X-GMAIL-MSGID: =?utf-8?q?1759839891110607353?= For SMD RPM bus scaling to work, we need a pair of sleep-wake clocks. The variable number of them we previously supported was only a hack to keep the clocks required for QoS register access, but now that these are separated, we can leave bus_clks to the actual bus clocks. In cases where there is no actual bus scaling (such as A0NoC on MSM8996 and GNoC on SDM660 where the HLOS is only supposed to program the QoS registers and the bus is either static or controlled remotely), allow for no clock scaling with a boolean property. Remove all the code related to allowing an arbitrary number of bus_clks, replace the number by BUS_CLK_MAX (= 2) and guard the bus clock paths to ensure they are not taken on non-scaling buses. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 14 +++----------- drivers/interconnect/qcom/icc-rpm.h | 4 ++-- drivers/interconnect/qcom/msm8996.c | 1 + drivers/interconnect/qcom/sdm660.c | 1 + 4 files changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index ca932ed720fb..31d069433343 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -485,17 +485,9 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < cd_num; i++) qp->intf_clks[i].id = cds[i]; - if (desc->num_bus_clocks) { - cds = desc->bus_clocks; - cd_num = desc->num_bus_clocks; - } else { - cds = bus_clocks; - cd_num = ARRAY_SIZE(bus_clocks); - } - - for (i = 0; i < cd_num; i++) - qp->bus_clks[i].id = cds[i]; - qp->num_bus_clks = cd_num; + qp->num_bus_clks = desc->no_clk_scaling ? 0 : NUM_BUS_CLKS; + for (i = 0; i < qp->num_bus_clks; i++) + qp->bus_clks[i].id = bus_clocks[i]; qp->type = desc->type; qp->qos_offset = desc->qos_offset; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index a4ef45b4a9e0..3cddff44b4ef 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -25,7 +25,7 @@ enum qcom_icc_type { /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider - * @num_bus_clks: the total number of bus_clks clk_bulk_data entries + * @num_bus_clks: the total number of bus_clks clk_bulk_data entries (0 or 2) * @num_intf_clks: the total number of intf_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access @@ -100,10 +100,10 @@ struct qcom_icc_desc { struct qcom_icc_node * const *nodes; size_t num_nodes; const char * const *bus_clocks; - size_t num_bus_clocks; const char * const *intf_clocks; size_t num_intf_clocks; bool has_bus_pd; + bool no_clk_scaling; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; unsigned int qos_offset; diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 1a5e0ad36cc4..347fe59ec293 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -1820,6 +1820,7 @@ static const struct qcom_icc_desc msm8996_a0noc = { .intf_clocks = a0noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a0noc_intf_clocks), .has_bus_pd = true, + .no_clk_scaling = true, .regmap_cfg = &msm8996_a0noc_regmap_config }; diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 0e8a96f4ce90..7ffaf70d62d3 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -1616,6 +1616,7 @@ static const struct qcom_icc_desc sdm660_gnoc = { .nodes = sdm660_gnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_gnoc_nodes), .regmap_cfg = &sdm660_gnoc_regmap_config, + .no_clk_scaling = true, }; static struct qcom_icc_node * const sdm660_mnoc_nodes[] = { From patchwork Wed Mar 8 21:40:14 2023 Content-Type: text/plain; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id a6-20020a2e8606000000b00295a2a608e9sm2688844lji.111.2023.03.08.13.40.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 13:40:35 -0800 (PST) From: Konrad Dybcio Date: Wed, 08 Mar 2023 22:40:14 +0100 Subject: [PATCH v7 8/9] interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v7-8-815606092fff@linaro.org> References: <20230228-topic-qos-v7-0-815606092fff@linaro.org> In-Reply-To: <20230228-topic-qos-v7-0-815606092fff@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678311609; l=1105; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=OSAfkyJvvvDXJf5AHSbe23m5GiOxqbkKHaYbUhLD+NM=; b=WcebsguplvEedMiICVRR6tw9G2J6b6JAwcRKpsP4b34niNN0zXH9BVKa/397gk1X23wuzK2glT2l VdbLkx8IDYVGrujDys55r/L6UPn7hO/t8shQhzvNMx60x2tjXSve X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_HTTP,RCVD_IN_SORBS_SOCKS,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759839634408912232?= X-GMAIL-MSGID: =?utf-8?q?1759839634408912232?= Commit dd42ec8ea5b9 ("interconnect: qcom: rpm: Use _optional func for provider clocks") relaxed the requirements around probing bus clocks. This was a decent solution for making sure MSM8996 would still boot with old DTs, but now that there's a proper fix in place that both old and new DTs will be happy about, revert back to the safer variant of the function. Fixes: dd42ec8ea5b9 ("interconnect: qcom: rpm: Use _optional func for provider clocks") Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 31d069433343..554fb27de4be 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -517,7 +517,7 @@ int qnoc_probe(struct platform_device *pdev) } regmap_done: - ret = devm_clk_bulk_get_optional(dev, qp->num_bus_clks, qp->bus_clks); + ret = devm_clk_bulk_get(dev, qp->num_bus_clks, qp->bus_clks); if (ret) return ret; From patchwork Wed Mar 8 21:40:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 66474 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp596647wrd; Wed, 8 Mar 2023 14:04:06 -0800 (PST) X-Google-Smtp-Source: AK7set+a2xZoT5pEm4FBOK436I6sTl0G8rFJWvbfYnNFLy9ee1UH3K2rKEE7VH+3J5hMIQgp5gxY X-Received: by 2002:a05:6a20:748b:b0:cd:83b1:4236 with SMTP id p11-20020a056a20748b00b000cd83b14236mr18058621pzd.36.1678313046009; Wed, 08 Mar 2023 14:04:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678313045; cv=none; d=google.com; s=arc-20160816; b=vHsGT6OJl8QCdIeClBqBDudTaMilld+gl4rIx57xjHHXiv9/aUA/IX+4UlxRBvyGKb TW8WJJ9gYGW9wCtYdPIP2SeqoZbC97LBRwyLrko/pVfb5vn948ahCFoZAge/9+263fTi OvHw+MtQiHHAwGmy/BI9beNHeVF7oOD6xlsSJ8G4hsAmasWnLNkx2HGclma//LvZxwSI CkscJyjn7ZS59r3Alj86KcyMlw0qIsT8XXYFNgbmApZD5qvGA+KhgYaJ7a4nx+r5Fob5 cc6ulr657XIoHBQ9LMFotyInuHAPddJOhMvqed5RyBukikf9GpahIYCIVZClUcllg680 +ydg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=vveGd9sf9fGz7xfjIX4ynPRPTvQaFdGwhHtakqOTRYg=; b=GCe7tNAqbcT/4WlyXK1P+pocbFBlh5FyCwvoosUGPu1JH0eJLliVNsjRt1+5pAnPwQ RjFLVjWI0BKpMAlTn5MceBEHbXFXAfPx5HeL1a/R4sxN9Ai3v3Oq5RfeAoHEaI0/CVwX EMXRyeEH1Tztcy+86AQfbjrx8jku0wjBNfdCp/KCKt388SkOOQihMIKvxvfHmddMRJZ/ 0MxnpCHG1wwok1w5W10JsWncgX+ZtZohhViAb++tKWf1JXc6aWWd/XZ15BxjATlgI39u MCe6BoXMzcVOgFim6xvTmnKjS2h6WHDOFZfoCGIY+Id2g+4n5TN85FZKcf8Sd9Ic5V17 SHyw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MDAy6R+j; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id a6-20020a2e8606000000b00295a2a608e9sm2688844lji.111.2023.03.08.13.40.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 13:40:36 -0800 (PST) From: Konrad Dybcio Date: Wed, 08 Mar 2023 22:40:15 +0100 Subject: [PATCH v7 9/9] interconnect: qcom: msm8996: Promote to core_initcall MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v7-9-815606092fff@linaro.org> References: <20230228-topic-qos-v7-0-815606092fff@linaro.org> In-Reply-To: <20230228-topic-qos-v7-0-815606092fff@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678311609; l=1279; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=5H1KJ2r/pG170nOV3v3bsq3JNwWcNEZN04iD5DDB2kw=; b=mA+CUaUze95pv7UwCHyxJG284m7hyf7mpYPzfRrzl/yoikhuSf999ZWFXM2KiHMv5jr/d5NJq0Lb GnYlQwesD62E+SECS98WGgXTUqKbxD8cKwtBkI2a+l3MTLs+7Q4u X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_HTTP,RCVD_IN_SORBS_SOCKS,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759838780309260656?= X-GMAIL-MSGID: =?utf-8?q?1759838780309260656?= The interconnect driver is (or soon will be) vital to many other devices, as it's not a given that the bootloader will set up enough bandwidth for us or that the values we come into are reasonable. Promote the driver to core_initcall to ensure the consumers (i.e. most "meaningful" parts of the SoC) can probe without deferrals. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/msm8996.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 347fe59ec293..1eb51ed18b0b 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -2109,7 +2109,17 @@ static struct platform_driver qnoc_driver = { .sync_state = icc_sync_state, } }; -module_platform_driver(qnoc_driver); +static int __init qnoc_driver_init(void) +{ + return platform_driver_register(&qnoc_driver); +} +core_initcall(qnoc_driver_init); + +static void __exit qnoc_driver_exit(void) +{ + platform_driver_unregister(&qnoc_driver); +} +module_exit(qnoc_driver_exit); MODULE_AUTHOR("Yassine Oudjana "); MODULE_DESCRIPTION("Qualcomm MSM8996 NoC driver");