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When multiple entries are added to the "struct pci_epf_device_id" table, the probe function needs to identify the correct one. And the only way to do so is by storing the correct device ID in "struct pci_epf" during "pci_epf_match_id()" and passing that to probe(). Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-ntb.c | 3 ++- drivers/pci/endpoint/functions/pci-epf-test.c | 2 +- drivers/pci/endpoint/pci-epf-core.c | 8 +++++--- include/linux/pci-epf.h | 4 +++- 4 files changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-ntb.c b/drivers/pci/endpoint/functions/pci-epf-ntb.c index 9a00448c7e61..980b4ecf19a2 100644 --- a/drivers/pci/endpoint/functions/pci-epf-ntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-ntb.c @@ -2075,11 +2075,12 @@ static struct config_group *epf_ntb_add_cfs(struct pci_epf *epf, /** * epf_ntb_probe() - Probe NTB function driver * @epf: NTB endpoint function device + * @id: NTB endpoint function device ID * * Probe NTB function driver when endpoint function bus detects a NTB * endpoint function. */ -static int epf_ntb_probe(struct pci_epf *epf) +static int epf_ntb_probe(struct pci_epf *epf, const struct pci_epf_device_id *id) { struct epf_ntb *ntb; struct device *dev; diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 0f9d2ec822ac..d5fcc78a5b73 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -980,7 +980,7 @@ static const struct pci_epf_device_id pci_epf_test_ids[] = { {}, }; -static int pci_epf_test_probe(struct pci_epf *epf) +static int pci_epf_test_probe(struct pci_epf *epf, const struct pci_epf_device_id *id) { struct pci_epf_test *epf_test; struct device *dev = &epf->dev; diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci-epf-core.c index 2036e38be093..924564288c9a 100644 --- a/drivers/pci/endpoint/pci-epf-core.c +++ b/drivers/pci/endpoint/pci-epf-core.c @@ -494,11 +494,13 @@ static const struct device_type pci_epf_type = { }; static int -pci_epf_match_id(const struct pci_epf_device_id *id, const struct pci_epf *epf) +pci_epf_match_id(const struct pci_epf_device_id *id, struct pci_epf *epf) { while (id->name[0]) { - if (strcmp(epf->name, id->name) == 0) + if (strcmp(epf->name, id->name) == 0) { + epf->id = id; return true; + } id++; } @@ -526,7 +528,7 @@ static int pci_epf_device_probe(struct device *dev) epf->driver = driver; - return driver->probe(epf); + return driver->probe(epf, epf->id); } static void pci_epf_device_remove(struct device *dev) diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index a215dc8ce693..bc613f0df7e3 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -89,7 +89,7 @@ struct pci_epc_event_ops { * @id_table: identifies EPF devices for probing */ struct pci_epf_driver { - int (*probe)(struct pci_epf *epf); + int (*probe)(struct pci_epf *epf, const struct pci_epf_device_id *id); void (*remove)(struct pci_epf *epf); struct device_driver driver; @@ -131,6 +131,7 @@ struct pci_epf_bar { * @epc: the EPC device to which this EPF device is bound * @epf_pf: the physical EPF device to which this virtual EPF device is bound * @driver: the EPF driver to which this EPF device is bound + * @id: Pointer to the EPF device ID * @list: to add pci_epf as a list of PCI endpoint functions to pci_epc * @lock: mutex to protect pci_epf_ops * @sec_epc: the secondary EPC device to which this EPF device is bound @@ -158,6 +159,7 @@ struct pci_epf { struct pci_epc *epc; struct pci_epf *epf_pf; struct pci_epf_driver *driver; + const struct pci_epf_device_id *id; struct list_head list; /* mutex to protect against concurrent access of pci_epf_ops */ struct mutex lock; From patchwork Tue Mar 7 15:14:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 65629 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp2496615wrd; Tue, 7 Mar 2023 07:33:02 -0800 (PST) X-Google-Smtp-Source: AK7set8kJQWUTBfaUl4V0ApoN6hzM+L1AkNSyN0Sd/1JayykwIe1bLymNWdgAmGXXERRVj6blvO0 X-Received: by 2002:a17:902:e801:b0:19a:b4a9:9df7 with SMTP id u1-20020a170902e80100b0019ab4a99df7mr18111354plg.53.1678203182063; Tue, 07 Mar 2023 07:33:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678203182; cv=none; d=google.com; s=arc-20160816; b=f/ba1+/feRE7BMGZTZ8ZMoxBNBoJA4xOkSBQGMwKXAYhrY7Lsedm0yspWPqsq6jqah hmoLxlZlw0Ctdv5svVTOEImWAMsev4Zf2P7YqBBoNao0lS+a09fRqr4ukWMQWfIKlLoS zf+FJ/Hi/PyngAO/85MTfmlxnRjQMiiZY3pY5VdjN9/nse6cLukDcdsRORy/YQIdMCNZ LFGmjqxBkaAdBrrbbe1u2gHXB/fxJPKnDIImrCQPONHJsDNmaIX/qJhWIW4O9DR8tIbB cHdXJkZL0rJXg6I5rXf9MWkfdlO4acuivYfenfSF7RdIu6c6YS34B1HQO0d7csC7Cat2 MBgg== ARC-Message-Signature: i=1; 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There is no need to call the EPC start/stop functions in those cases. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-ep-cfs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/endpoint/pci-ep-cfs.c b/drivers/pci/endpoint/pci-ep-cfs.c index 4b8ac0ac84d5..62c8e09c59f4 100644 --- a/drivers/pci/endpoint/pci-ep-cfs.c +++ b/drivers/pci/endpoint/pci-ep-cfs.c @@ -178,6 +178,9 @@ static ssize_t pci_epc_start_store(struct config_item *item, const char *page, if (kstrtobool(page, &start) < 0) return -EINVAL; + if (WARN_ON_ONCE(start == epc_group->start)) + return 0; + if (!start) { pci_epc_stop(epc); epc_group->start = 0; From patchwork Tue Mar 7 15:14:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 65634 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:570d:b0:a1:2e52:cf23 with SMTP id h13csp1967797dyk; Tue, 7 Mar 2023 07:37:21 -0800 (PST) X-Google-Smtp-Source: AK7set9K7UW3JrVCJ0yE3wxBFBictiCCffGVVw5ca5UGeHQ+o451uCuyNXer7hm9ktBlc8EXBcEW X-Received: by 2002:a17:902:eb8f:b0:19d:c9f:44f0 with SMTP id q15-20020a170902eb8f00b0019d0c9f44f0mr15709703plg.32.1678203441496; Tue, 07 Mar 2023 07:37:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678203441; cv=none; d=google.com; s=arc-20160816; b=M3zOjGpMMeWX887f2iYudbSj2UOcKto2nY/QGc/xY9bCr6ChexG9cLvDCaN4kQA/5A 90u6rRj4zGr1M4kBnHKApkfkLr9plammwKwro5B9vQxyhqzuDlcARFwe3GMJgwXMsy9d ipPTndbjsEdJWDyhTaE0XgtEG9O/NYxJvluwnJBu86UIVKVY5ceV4qXnR2ECki1oqpxe DOpP5Q6c0gPpc/3A0hAfjxpH0/114opgu8NVua/2Iug6bHlGPWloNLHnelLswvN3F+YA 6g9irQWQ7kDaoXbx03dP0rtn8keS5WCFvGPAQLUSqDme8gOci2a0rikU3SCTgomgzTmR +BIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5CebAT6G7pMdHj4gkjeeBHR/+GUK4hl9hBpqAKTE774=; b=NRgpkG0sQjjoA+FdMOyi7LmR+HxvvK964XRea6xJevCZTMNuPN9yC9ar4rWNLR7pD5 7z8yT5DUPTMwtSeUkHOz49sBBf7X6ZJxzhXIuR5cnzUjYQCQotvDDm3zyBBDra7Ucpzo founKlUwyDfVNB+L7ezB4FtJBu74D8ySivCz37qp9Qt+6J+laLGF53uUQPN5nFMNT543 MLjrXhj5ZEYlFaLlzAo1/al9HAxUhqp7ORkyhb59oqyOIuSL4/5xPlqxvQUK09VykYTp 1TdQJqHdz9/hEcxW1URKd/lkAWNYcH/l8eummqLFKcr6UezjAhhav4x2GFXgwujOW8MB GjIQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zyYTr4lb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-epc-core.c | 26 ++++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 9440d9811eea..e3a6b5554c1c 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -706,6 +706,32 @@ void pci_epc_linkup(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_linkup); +/** + * pci_epc_linkdown() - Notify the EPF device that EPC device has dropped the + * connection with the Root Complex. + * @epc: the EPC device which has dropped the link with the host + * + * Invoke to Notify the EPF device that the EPC device has dropped the + * connection with the Root Complex. + */ +void pci_epc_linkdown(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (!epc || IS_ERR(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->link_down) + epf->event_ops->link_down(epf); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_linkdown); + /** * pci_epc_init_notify() - Notify the EPF device that EPC device's core * initialization is completed. diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 301bb0e53707..63a6cc5e5282 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -203,6 +203,7 @@ void pci_epc_destroy(struct pci_epc *epc); int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); void pci_epc_linkup(struct pci_epc *epc); +void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index bc613f0df7e3..f8e5a63d0c83 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -71,10 +71,12 @@ struct pci_epf_ops { * struct pci_epf_event_ops - Callbacks for capturing the EPC events * @core_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event + * @link_down: Callback for the EPC link down event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); + int (*link_down)(struct pci_epf *epf); }; /** From patchwork Tue Mar 7 15:14:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 65624 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp2491369wrd; Tue, 7 Mar 2023 07:23:19 -0800 (PST) X-Google-Smtp-Source: AK7set9rAuZ1Nb37IFxDJODrMkqElgTCVwAta9/wN5+S5HZbi4sGsOsCEafhSerm21NimyIVWDWq X-Received: by 2002:a17:906:7148:b0:90d:5f56:b109 with SMTP id z8-20020a170906714800b0090d5f56b109mr9409992ejj.2.1678202599555; Tue, 07 Mar 2023 07:23:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678202599; cv=none; d=google.com; s=arc-20160816; b=e/vMlujRm5J0WrOXIcAj5RBxruZGPeC+Jr3krO26XBc/DEeF5zmv8KHnY7nAAbI//H i9nD6d1/KRNcapjbmNntBsM+vHbUe0qZ5Dpdwv6HcIiXjYyRVIae/jiTG14aRdjtYlaC EM0M97FobroKBlmf0BoQE8c767dPqlRZsL22ogjog8pcfqUD67z5Q50trhQj98d3mmBK OJ/nNa3t8lBNIN79a/7Yx0tsXeGpQgyIusRxeuhDNh+rPcjwqa4yCAc9JajZzLStxchL VFGWPXuqRTfz+VsP2CTrwNMgPXaWnq5i9e8NV6RR+KqYrfWUCdUyiAHtXgseqxedbX4b 1nyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=MJgDTGPG3O7w69/b8j6+Tmk/A5SbbomMgk7rRHGZCSE=; b=UeD4KHb/h2HyBgHffghWcgn28lE2GX+NkMpmPM9VJraEKN5DVHP6+VmvbbEcHdiBct feFmadwYcwLkJb29hSrAwZ+Dnkfn9xQjBoJ5s6cnXme89muLd+uLMyqjzUgP4cyNx/JN /YGpO9Qh/56DOAVm/zTlHb9oM79jyzCe5v7AJxipJ9Ak9Iwejwi+Nb/ixNXYxjXuRIRX scbSI5+ym2rtj3ly0oIuR3tsQxP73+iyHOXXNtONjczuDLOExlH/ifGVUJ3+LCpQQSxM doiwSbWWysuUouvE7NqZu0lqlyM2/IPTjAq+a2YUpNF07Gal3H2aIvf6DUaPRkUpLk4i 1LFg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LAjfp0U2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-epc-core.c | 26 ++++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index e3a6b5554c1c..11bd873a7997 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -758,6 +758,32 @@ void pci_epc_init_notify(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_init_notify); +/** + * pci_epc_bme_notify() - Notify the EPF device that the EPC device has received + * the BME event from the Root complex + * @epc: the EPC device that received the BME event + * + * Invoke to Notify the EPF device that the EPC device has received the Bus + * Master Enable (BME) event from the Root complex + */ +void pci_epc_bme_notify(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (!epc || IS_ERR(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->bme) + epf->event_ops->bme(epf); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_bme_notify); + /** * pci_epc_destroy() - destroy the EPC device * @epc: the EPC device that has to be destroyed diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 63a6cc5e5282..5cb694031072 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -205,6 +205,7 @@ int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf, void pci_epc_linkup(struct pci_epc *epc); void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); +void pci_epc_bme_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no, diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index f8e5a63d0c83..f34b3b32a0e7 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -72,11 +72,13 @@ struct pci_epf_ops { * @core_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event + * @bme: Callback for the EPC BME (Bus Master Enable) event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); + int (*bme)(struct pci_epf *epf); }; /** From patchwork Tue Mar 7 15:14:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 65626 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp2492666wrd; Tue, 7 Mar 2023 07:25:51 -0800 (PST) X-Google-Smtp-Source: AK7set8kX++udvWBqrhFjvEHgQ7A+0KzL3Wpub2qZgUcDuRIQ0R9H8S0Z7TYiRWAPbZrSVDV4skU X-Received: by 2002:a17:906:1846:b0:888:1f21:4429 with SMTP id w6-20020a170906184600b008881f214429mr14359405eje.19.1678202751541; Tue, 07 Mar 2023 07:25:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678202751; cv=none; d=google.com; s=arc-20160816; b=wTVOyUu7j7F2H5ksadSO2I9mG+EHSsKvjKM6rgI6W6Tj6u5PZqgEJpijMRc7URxkdH ZpBaWUyKGetJO4Wwtsi5dqvodoWY+o7Ns2rEaCWIbS4cCh+SGVBJym6c8t9LrE65WJKI RFfqMOA0dJXVG1dT5gunHGmO+NDUfLAHJh1eLCOKRKCnZXGufLRJDUBUxoEOLQDiNnb1 FVb6vmH895nw1JxY3iQ/QRq+JxbIai970sPmk3fpw0s0PXd7uqlQAW18aOzTBJ0fxV+C oR5m+RP9Jj5O7TtDeshxPG3AQ1Cl3721/1zUJM6QDBCyBm+Ra2BMOgIhuexsb7cTAQJk ekfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=VAvWJkbCnkvCCrjEbntOUm0v01njPW2wZQKEuX5KGW0=; b=oiH4W1OgG/zWkNVlkT8WzIZYhRIlaWHc/oazfsBVX9TRhQu9bYHcYJl+UuyzA/s50v GkYZdMZU3q4zOnGpqRVM47ZgSS585EsH9P7pphxlKAwOsspBvVkriwPtQeQAR3gNDSOZ DM7udlHsRBVcim0Ya8Z1aEDjUQP6XVoGCV+OJlJngORCTFgvqTzklX9zn1vsC5+vDr5A KFFF1xa9SF2+nd95GOGnFVHwMDcGdYeDpYJbkwSkbWvCQylXp7/EOR2zNsU2WV7BwdZR dCSA2oaXbnouPyj5M3RiGqHwDvs6SW6BKKrnE+J59ri97dwy1Pdai5vDrhf1B+FuWt37 3iog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HNUPtFiv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 19b32839ea26..4ce01ff7527c 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -569,6 +569,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) if (FIELD_GET(PARF_INT_ALL_LINK_DOWN, status)) { dev_dbg(dev, "Received Linkdown event\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_DOWN; + pci_epc_linkdown(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received BME event. Link is enabled!\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_ENABLED; From patchwork Tue Mar 7 15:14:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 65631 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp2497311wrd; Tue, 7 Mar 2023 07:34:19 -0800 (PST) X-Google-Smtp-Source: AK7set98VNDKz/gXWnX6i7yZCkgQdtD5PkSY+xNMhzxDI9UJsA33ToK5N+KHFI1fXS4G6mcxbPPX X-Received: by 2002:a05:6a20:4407:b0:ce:2f40:6e9b with SMTP id ce7-20020a056a20440700b000ce2f406e9bmr21594811pzb.28.1678203259110; Tue, 07 Mar 2023 07:34:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678203259; cv=none; d=google.com; s=arc-20160816; b=xGEWUL2+iZxLHI9Xr3+/4MbWLSqtEA0NmU4I5/cQ9xoTmFTsasXRZXeqQJ6XvjOewV bJ/20u5S4ocdKRJI2FBF4l/SdJxFZGc5XWekH4OgZ+TD2Mr8m++urI1AL+icdngnkDRI CK3bdArnGDzcysW68kZmFhyJs8QZdpqMd+mpln7epo+qRsqh9SzwekV2gsjJ0trQ7BtG eej0v67tS4POPrEX66G9UlTIV5yx6iuyJh0X5xe5oRb9Eu3+CnwuAY7gEQ3dOPf/4A8u LIS6rmpRxL7shZSlzNYyAImYsUW6v0p5RcHrqxdsw1dDCV5huGcwBd7VkDNb7A8KCdhB Xp8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UG6X0V5nxXAs/7mwFsePGG2/rhZWHmM/NsTiFkA/mm8=; b=COjOCuWxjlKRqTnAB5jc1A5J8W1qlKkc9j/ix1kM3DT1LRSWlwNCRejGGni3wbSHGi uSX5ovyysAyPNHzoJpNmzf5j3u9NsVO0ATJG6fYP8pTumKhThw3YqgpG6JlBIcbnjxfH 7PY/izeIlQI7iA0g6STM2A2TN7upNWUVE7JUkrDto+5dhaYxeEfXEbaPPCC+VjFCOnLY vON8V4qVyV5iEgEkmls9ZjiT7wtS+UvUE9Xx8tERRwiKrPPGRenPnnj9isTktshml6Uh Kgpu2D1sLduY7vr+nO/C5a+DoaXgvnqNyllKmuaOMpgOuNqShGJwpc76/jvAozlGcjaQ smsw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YHkphKuD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 4ce01ff7527c..1435f516d3f7 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -573,6 +573,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received BME event. Link is enabled!\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_ENABLED; + pci_epc_bme_notify(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_PM_TURNOFF, status)) { dev_dbg(dev, "Received PM Turn-off event! Entering L23\n"); val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); From patchwork Tue Mar 7 15:14:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 65632 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp2497597wrd; Tue, 7 Mar 2023 07:34:52 -0800 (PST) X-Google-Smtp-Source: AK7set+0jJoMSFBDwrIQ6L62UckUy1fbbv40hxWYClGaoK7NrU/37Y2Qr+CKbm0eFwb/pSQZdGx3 X-Received: by 2002:a05:6a20:94:b0:cb:db9d:f78d with SMTP id 20-20020a056a20009400b000cbdb9df78dmr11452612pzg.47.1678203291970; Tue, 07 Mar 2023 07:34:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678203291; cv=none; d=google.com; s=arc-20160816; b=yyZ/U0/YRkLDQeY+4RWDi26gCKOrrVc2FvRtdmSA6s96nx95VYeETg93ZvPkeJwMQI j1/+7EblWdF3fjLG25yD5KRlC6HXwy8waWyETnklYzPEIf/98IhgIi02Jfkbpx5B8t6d 3GVRLyW+xX9QJ7mNmO4476Xn+2mjgc9WoVXiIxOQP4te2MJ8qjbz7Jxo2TOG892Vraar 9DegKT7nH0IANw5929YpTHsjSojs4wlldDbmnPe4U3WJRxkw6Gn9to+G3KVY6Bm35xCA i4WpvRAuDojEiz+USG3JU//Qmf79KYuIfoHRwc/tQLsQaUAf69FFRAPOjWE4zNsz4rJP tOCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e/Olxjw+HQJK1P59lC+ASOiltstxhFqe09ROmonjaJY=; b=g1EbrC6uM6h8OIZGhe+PDAf1uKGHBO+Bv2WkBqht4+6H61WutezPkU7+AltFG+fa86 MXIM+Ttvhht3be61u6YuL1GFVELolhBHFmN+afV4ahznzlwXxKXGRLLi8UddwXBf5HF1 6Z2soow3G6T5wYxDVfRKObWRhjkQmPdxaba0gSnlFXEXmwPMSld6IzybL2Vfjz60GNS7 BBXCJCphnCSWvS/HeuqaU/QXucioI/GgUSib/Ytf7fLcaurNY+gIbkvTxnqhrTu09Kmb BfPrvnoGDqPYkuAZSmYPMq2B8XZxMGuL1l11peh444Q90yVB+wKB2+NxKow6QN7SBKex Hafg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bAbV0Tu6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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The driver implements the MHI function over PCI in the endpoint device such as SDX55 modem. The MHI endpoint function driver acts as a controller driver for the MHI Endpoint stack and carries out all PCI related activities like mapping the host memory using iATU, triggering MSIs etc... Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/Kconfig | 10 + drivers/pci/endpoint/functions/Makefile | 1 + drivers/pci/endpoint/functions/pci-epf-mhi.c | 454 +++++++++++++++++++ 3 files changed, 465 insertions(+) create mode 100644 drivers/pci/endpoint/functions/pci-epf-mhi.c diff --git a/drivers/pci/endpoint/functions/Kconfig b/drivers/pci/endpoint/functions/Kconfig index 9fd560886871..f5171b4fabbe 100644 --- a/drivers/pci/endpoint/functions/Kconfig +++ b/drivers/pci/endpoint/functions/Kconfig @@ -37,3 +37,13 @@ config PCI_EPF_VNTB between PCI Root Port and PCIe Endpoint. If in doubt, say "N" to disable Endpoint NTB driver. + +config PCI_EPF_MHI + tristate "PCI Endpoint driver for MHI bus" + depends on PCI_ENDPOINT && MHI_BUS_EP + help + Enable this configuration option to enable the PCI Endpoint + driver for Modem Host Interface (MHI) bus in Qualcomm Endpoint + devices such as SDX55. + + If in doubt, say "N" to disable Endpoint driver for MHI bus. diff --git a/drivers/pci/endpoint/functions/Makefile b/drivers/pci/endpoint/functions/Makefile index 5c13001deaba..696473fce50e 100644 --- a/drivers/pci/endpoint/functions/Makefile +++ b/drivers/pci/endpoint/functions/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_PCI_EPF_TEST) += pci-epf-test.o obj-$(CONFIG_PCI_EPF_NTB) += pci-epf-ntb.o obj-$(CONFIG_PCI_EPF_VNTB) += pci-epf-vntb.o +obj-$(CONFIG_PCI_EPF_MHI) += pci-epf-mhi.o diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c new file mode 100644 index 000000000000..03e7f42663b3 --- /dev/null +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -0,0 +1,454 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCI EPF driver for MHI Endpoint devices + * + * Copyright (C) 2022 Linaro Ltd. + * Author: Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include + +#define MHI_VERSION_1_0 0x01000000 + +struct pci_epf_mhi_ep_info { + const struct mhi_ep_cntrl_config *config; + struct pci_epf_header *epf_header; + enum pci_barno bar_num; + u32 epf_flags; + u32 msi_count; + u32 mru; +}; + +#define MHI_EP_CHANNEL_CONFIG_UL(ch_num, ch_name) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .dir = DMA_TO_DEVICE, \ + } + +#define MHI_EP_CHANNEL_CONFIG_DL(ch_num, ch_name) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .dir = DMA_FROM_DEVICE, \ + } + +static const struct mhi_ep_channel_config mhi_v1_channels[] = { + MHI_EP_CHANNEL_CONFIG_UL(0, "LOOPBACK"), + MHI_EP_CHANNEL_CONFIG_DL(1, "LOOPBACK"), + MHI_EP_CHANNEL_CONFIG_UL(2, "SAHARA"), + MHI_EP_CHANNEL_CONFIG_DL(3, "SAHARA"), + MHI_EP_CHANNEL_CONFIG_UL(4, "DIAG"), + MHI_EP_CHANNEL_CONFIG_DL(5, "DIAG"), + MHI_EP_CHANNEL_CONFIG_UL(6, "SSR"), + MHI_EP_CHANNEL_CONFIG_DL(7, "SSR"), + MHI_EP_CHANNEL_CONFIG_UL(8, "QDSS"), + MHI_EP_CHANNEL_CONFIG_DL(9, "QDSS"), + MHI_EP_CHANNEL_CONFIG_UL(10, "EFS"), + MHI_EP_CHANNEL_CONFIG_DL(11, "EFS"), + MHI_EP_CHANNEL_CONFIG_UL(12, "MBIM"), + MHI_EP_CHANNEL_CONFIG_DL(13, "MBIM"), + MHI_EP_CHANNEL_CONFIG_UL(14, "QMI"), + MHI_EP_CHANNEL_CONFIG_DL(15, "QMI"), + MHI_EP_CHANNEL_CONFIG_UL(16, "QMI"), + MHI_EP_CHANNEL_CONFIG_DL(17, "QMI"), + MHI_EP_CHANNEL_CONFIG_UL(18, "IP-CTRL-1"), + MHI_EP_CHANNEL_CONFIG_DL(19, "IP-CTRL-1"), + MHI_EP_CHANNEL_CONFIG_UL(20, "IPCR"), + MHI_EP_CHANNEL_CONFIG_DL(21, "IPCR"), + MHI_EP_CHANNEL_CONFIG_UL(32, "DUN"), + MHI_EP_CHANNEL_CONFIG_DL(33, "DUN"), + MHI_EP_CHANNEL_CONFIG_UL(36, "IP_SW0"), + MHI_EP_CHANNEL_CONFIG_DL(37, "IP_SW0"), +}; + +static const struct mhi_ep_cntrl_config mhi_v1_config = { + .max_channels = 128, + .num_channels = ARRAY_SIZE(mhi_v1_channels), + .ch_cfg = mhi_v1_channels, + .mhi_version = MHI_VERSION_1_0, +}; + +static struct pci_epf_header sdx55_header = { + .vendorid = PCI_VENDOR_ID_QCOM, + .deviceid = 0x0306, + .baseclass_code = PCI_BASE_CLASS_COMMUNICATION, + .subclass_code = PCI_CLASS_COMMUNICATION_MODEM & 0xff, + .interrupt_pin = PCI_INTERRUPT_INTA, +}; + +static const struct pci_epf_mhi_ep_info sdx55_info = { + .config = &mhi_v1_config, + .epf_header = &sdx55_header, + .bar_num = BAR_0, + .epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32, + .msi_count = 32, + .mru = 0x8000, +}; + +struct pci_epf_mhi { + const struct pci_epf_mhi_ep_info *info; + struct mhi_ep_cntrl mhi_cntrl; + struct pci_epf *epf; + struct mutex lock; + void __iomem *mmio; + resource_size_t mmio_phys; + u32 mmio_size; + int irq; + bool mhi_registered; +}; + +static int pci_epf_mhi_alloc_map(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, + phys_addr_t *phys_ptr, void __iomem **virt, size_t size) +{ + struct pci_epf_mhi *epf_mhi = container_of(mhi_cntrl, struct pci_epf_mhi, mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf_mhi->epf->epc; + size_t offset = pci_addr & (epc->mem->window.page_size - 1); + void __iomem *virt_addr; + phys_addr_t phys_addr; + int ret; + + virt_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, size + offset); + if (!virt_addr) + return -ENOMEM; + + ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, phys_addr, pci_addr - offset, + size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, phys_addr, virt_addr, size + offset); + + return ret; + } + + *phys_ptr = phys_addr + offset; + *virt = virt_addr + offset; + + return 0; +} + +static void pci_epf_mhi_unmap_free(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, + phys_addr_t phys_addr, void __iomem *virt_addr, size_t size) +{ + struct pci_epf_mhi *epf_mhi = container_of(mhi_cntrl, struct pci_epf_mhi, mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf->epc; + size_t offset = pci_addr & (epc->mem->window.page_size - 1); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, phys_addr - offset); + pci_epc_mem_free_addr(epc, phys_addr - offset, virt_addr - offset, size + offset); +} + +static void pci_epf_mhi_raise_irq(struct mhi_ep_cntrl *mhi_cntrl, u32 vector) +{ + struct pci_epf_mhi *epf_mhi = container_of(mhi_cntrl, struct pci_epf_mhi, mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf->epc; + + /* + * Vector is incremented by 1 here as the DWC core will decrement it before + * writing to iATU. + */ + pci_epc_raise_irq(epc, epf->func_no, epf->vfunc_no, PCI_EPC_IRQ_MSI, vector + 1); +} + +static int pci_epf_mhi_read_from_host(struct mhi_ep_cntrl *mhi_cntrl, u64 from, void __iomem *to, + size_t size) +{ + struct pci_epf_mhi *epf_mhi = container_of(mhi_cntrl, struct pci_epf_mhi, mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf_mhi->epf->epc; + void __iomem *tre_buf; + phys_addr_t tre_phys; + size_t offset = from % 0x1000; + int ret; + + mutex_lock(&epf_mhi->lock); + + tre_buf = pci_epc_mem_alloc_addr(epc, &tre_phys, size + offset); + if (!tre_buf) { + mutex_unlock(&epf_mhi->lock); + return -ENOMEM; + } + + ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, tre_phys, from - offset, + size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + mutex_unlock(&epf_mhi->lock); + return ret; + } + + memcpy_fromio(to, tre_buf + offset, size); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, tre_phys); + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + + mutex_unlock(&epf_mhi->lock); + + return 0; +} + +static int pci_epf_mhi_write_to_host(struct mhi_ep_cntrl *mhi_cntrl, void __iomem *from, u64 to, + size_t size) +{ + struct pci_epf_mhi *epf_mhi = container_of(mhi_cntrl, struct pci_epf_mhi, mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf_mhi->epf->epc; + void __iomem *tre_buf; + phys_addr_t tre_phys; + size_t offset = to % 0x1000; + int ret; + + mutex_lock(&epf_mhi->lock); + + tre_buf = pci_epc_mem_alloc_addr(epc, &tre_phys, size + offset); + if (!tre_buf) { + mutex_unlock(&epf_mhi->lock); + return -ENOMEM; + } + + ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, tre_phys, to - offset, + size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + mutex_unlock(&epf_mhi->lock); + return ret; + } + + memcpy_toio(tre_buf + offset, from, size); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, tre_phys); + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + + mutex_unlock(&epf_mhi->lock); + + return 0; +} + +static int pci_epf_mhi_core_init(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct pci_epf_bar *epf_bar = &epf->bar[info->bar_num]; + struct pci_epc *epc = epf->epc; + struct device *dev = &epf->dev; + int ret; + + epf_bar->phys_addr = epf_mhi->mmio_phys; + epf_bar->size = epf_mhi->mmio_size; + epf_bar->barno = info->bar_num; + epf_bar->flags = info->epf_flags; + ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); + if (ret) { + dev_err(dev, "Failed to set BAR: %d\n", ret); + return ret; + } + + ret = pci_epc_set_msi(epc, epf->func_no, epf->vfunc_no, + order_base_2(info->msi_count)); + if (ret) { + dev_err(dev, "Failed to set MSI configuration: %d\n", ret); + return ret; + } + + ret = pci_epc_write_header(epc, epf->func_no, epf->vfunc_no, epf->header); + if (ret) { + dev_err(dev, "Failed to set Configuration header: %d\n", ret); + return ret; + } + + return 0; +} + +static int pci_epf_mhi_link_up(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + struct pci_epc *epc = epf->epc; + struct device *dev = &epf->dev; + int ret; + + mhi_cntrl->mmio = epf_mhi->mmio; + mhi_cntrl->irq = epf_mhi->irq; + mhi_cntrl->mru = info->mru; + + /* Assign the struct dev of PCI EP as MHI controller device */ + mhi_cntrl->cntrl_dev = epc->dev.parent; + mhi_cntrl->raise_irq = pci_epf_mhi_raise_irq; + mhi_cntrl->alloc_map = pci_epf_mhi_alloc_map; + mhi_cntrl->unmap_free = pci_epf_mhi_unmap_free; + mhi_cntrl->read_from_host = pci_epf_mhi_read_from_host; + mhi_cntrl->write_to_host = pci_epf_mhi_write_to_host; + + /* Register the MHI EP controller */ + ret = mhi_ep_register_controller(mhi_cntrl, info->config); + if (ret) { + dev_err(dev, "Failed to register MHI EP controller: %d\n", ret); + return ret; + } + + epf_mhi->mhi_registered = true; + + return 0; +} + +static int pci_epf_mhi_link_down(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + + if (epf_mhi->mhi_registered) { + mhi_ep_power_down(mhi_cntrl); + mhi_ep_unregister_controller(mhi_cntrl); + epf_mhi->mhi_registered = false; + } + + return 0; +} + +static int pci_epf_mhi_bme(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + struct device *dev = &epf->dev; + int ret; + + /* Power up the MHI EP stack if link is up and stack is in power down state */ + if (!mhi_cntrl->enabled && epf_mhi->mhi_registered) { + ret = mhi_ep_power_up(mhi_cntrl); + if (ret) { + dev_err(dev, "Failed to power up MHI EP: %d\n", ret); + mhi_ep_unregister_controller(mhi_cntrl); + epf_mhi->mhi_registered = false; + } + } + + return 0; +} + +static int pci_epf_mhi_bind(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + struct pci_epc *epc = epf->epc; + struct platform_device *pdev = to_platform_device(epc->dev.parent); + struct device *dev = &epf->dev; + struct resource *res; + int ret; + + if (WARN_ON_ONCE(!epc)) + return -EINVAL; + + /* Get MMIO base address from Endpoint controller */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mmio"); + epf_mhi->mmio_phys = res->start; + epf_mhi->mmio_size = resource_size(res); + + epf_mhi->mmio = ioremap_wc(epf_mhi->mmio_phys, epf_mhi->mmio_size); + if (IS_ERR(epf_mhi->mmio)) + return PTR_ERR(epf_mhi->mmio); + + ret = platform_get_irq_byname(pdev, "doorbell"); + if (ret < 0) { + dev_err(dev, "Failed to get Doorbell IRQ\n"); + iounmap(epf_mhi->mmio); + return ret; + } + + epf_mhi->irq = ret; + + return 0; +} + +static void pci_epf_mhi_unbind(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct pci_epf_bar *epf_bar = &epf->bar[info->bar_num]; + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + struct pci_epc *epc = epf->epc; + + /* + * Forcefully power down the MHI EP stack. Only way to bring the MHI EP stack + * back to working state after successive bind is by getting BME from host. + */ + if (epf_mhi->mhi_registered) { + mhi_ep_power_down(mhi_cntrl); + mhi_ep_unregister_controller(mhi_cntrl); + epf_mhi->mhi_registered = false; + } + + iounmap(epf_mhi->mmio); + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); +} + +static struct pci_epc_event_ops pci_epf_mhi_event_ops = { + .core_init = pci_epf_mhi_core_init, + .link_up = pci_epf_mhi_link_up, + .link_down = pci_epf_mhi_link_down, + .bme = pci_epf_mhi_bme, +}; + +static int pci_epf_mhi_probe(struct pci_epf *epf, const struct pci_epf_device_id *id) +{ + struct pci_epf_mhi_ep_info *info = (struct pci_epf_mhi_ep_info *) id->driver_data; + struct pci_epf_mhi *epf_mhi; + struct device *dev = &epf->dev; + + epf_mhi = devm_kzalloc(dev, sizeof(*epf_mhi), GFP_KERNEL); + if (!epf_mhi) + return -ENOMEM; + + epf->header = info->epf_header; + epf_mhi->info = info; + epf_mhi->epf = epf; + + epf->event_ops = &pci_epf_mhi_event_ops; + + mutex_init(&epf_mhi->lock); + + epf_set_drvdata(epf, epf_mhi); + + return 0; +} + +static const struct pci_epf_device_id pci_epf_mhi_ids[] = { + { + .name = "sdx55", .driver_data = (kernel_ulong_t) &sdx55_info, + }, + {}, +}; + +static struct pci_epf_ops pci_epf_mhi_ops = { + .unbind = pci_epf_mhi_unbind, + .bind = pci_epf_mhi_bind, +}; + +static struct pci_epf_driver pci_epf_mhi_driver = { + .driver.name = "pci_epf_mhi", + .probe = pci_epf_mhi_probe, + .id_table = pci_epf_mhi_ids, + .ops = &pci_epf_mhi_ops, + .owner = THIS_MODULE, +}; + +static int __init pci_epf_mhi_init(void) +{ + return pci_epf_register_driver(&pci_epf_mhi_driver); +} +module_init(pci_epf_mhi_init); + +static void __exit pci_epf_mhi_exit(void) +{ + pci_epf_unregister_driver(&pci_epf_mhi_driver); +} +module_exit(pci_epf_mhi_exit); + +MODULE_DESCRIPTION("PCI EPF driver for MHI Endpoint devices"); +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_LICENSE("GPL");