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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id y64-20020a50bb46000000b004bc2d1c0fadsm5193293ede.32.2023.03.06.05.47.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Mar 2023 05:47:51 -0800 (PST) From: Alexandre Mergnat Date: Mon, 06 Mar 2023 14:47:43 +0100 Subject: [PATCH v3 1/2] arm64: dts: mediatek: add i2c support for mt8365 SoC MIME-Version: 1.0 Message-Id: <20221122-mt8365-i2c-support-v3-1-ad9bb1076d7f@baylibre.com> References: <20221122-mt8365-i2c-support-v3-0-ad9bb1076d7f@baylibre.com> In-Reply-To: <20221122-mt8365-i2c-support-v3-0-ad9bb1076d7f@baylibre.com> To: Qii Wang , Matthias Brugger , Krzysztof Kozlowski , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org, Fabien Parent , devicetree@vger.kernel.org, AngeloGioacchino Del Regno , Alexandre Mergnat , Rob Herring , linux-mediatek@lists.infradead.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2644; i=amergnat@baylibre.com; h=from:subject:message-id; bh=t815h3bcisWjGhNlfDMBygPs+0iQIdrU/JE4wcgy8+c=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkBe8FtR5yhYovHKM8DPrMH2h8B0A5A/gAN/vk8uke XNWXTH6JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZAXvBQAKCRArRkmdfjHURdPIEA Cbr9uvKwbizgB2J5nELpOhPwwOvYiyG8u+jIMewk8MlWhE7q29GmhNFWiXs201CGEtZXhsSLyeMp5R Jd1HWGAdQBX+MvYQVccikUYnmhMOm+8ajzZvlj9LEAc4Glxe5GC2/OrQ0JJ1ejzvKzv78lpVgjGwOo 85+6pMkCoA75p6w0FvojzGPFmjvApr6kMfn0CAxG5+3kP6XyHilKm4YfKLCTdAHYQmIo83bUcMAImp TVsgXSFavb2xB9YL/4EUHTbzxdKmhL4fLCx0dHJ665lP/tzzJt5CpnsS8W/mCHW8HI6+hMx5QEb9Db jBpI1jha2wSNVc2uEzGlswE9Tq3SIjHeWHGlLpOD5/kSDjf0y9dsYDcKh3P9Cn8na9sEb5YlzVQiie uAn/F7VNwN3qXQJch1n/qjYJRak9pdWTlRXRo5vL3PSH1+ZnictdH7Eb3UnJ+266qlD/5h/bmMLfOD EYvh8gTa32rYXyj1sol34fnLqx/fkkzqKtjpHuscpoICCEguHJhB7zf3ieZUcO1yDuNDASkdJMt4yM OO1fsd8OAXqu55KsT4f/WfAyYf1m/kJkmGgolObXM9MrBQ2dzuG6RdNXP4fiPEyVvMSdlkpmwWIGUl ODxAUEq6gNbvHEdnRu77Va3f2l9ts7mhC3/RKKtyfOE/KmEkDxHqea14IpoQ== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759626889438506535?= X-GMAIL-MSGID: =?utf-8?q?1759626889438506535?= There are four I2C master channels in MT8365 with a same HW architecture. Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 52 ++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 15ac4c1f0966..553c7516406a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -282,6 +282,45 @@ pwm: pwm@11006000 { clock-names = "top", "main", "pwm1", "pwm2", "pwm3"; }; + i2c0: i2c@11007000 { + compatible = "mediatek,mt8365-i2c", "mediatek,mt8168-i2c"; + reg = <0 0x11007000 0 0xa0>, <0 0x11000080 0 0x80>; + interrupts = ; + clock-div = <1>; + clocks = <&infracfg CLK_IFR_I2C0_AXI>, + <&infracfg CLK_IFR_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@11008000 { + compatible = "mediatek,mt8365-i2c", "mediatek,mt8168-i2c"; + reg = <0 0x11008000 0 0xa0>, <0 0x11000100 0 0x80>; + interrupts = ; + clock-div = <1>; + clocks = <&infracfg CLK_IFR_I2C1_AXI>, + <&infracfg CLK_IFR_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@11009000 { + compatible = "mediatek,mt8365-i2c", "mediatek,mt8168-i2c"; + reg = <0 0x11009000 0 0xa0>, <0 0x11000180 0 0x80>; + interrupts = ; + clock-div = <1>; + clocks = <&infracfg CLK_IFR_I2C2_AXI>, + <&infracfg CLK_IFR_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + spi: spi@1100a000 { compatible = "mediatek,mt8365-spi", "mediatek,mt7622-spi"; reg = <0 0x1100a000 0 0x100>; @@ -295,6 +334,19 @@ spi: spi@1100a000 { status = "disabled"; }; + i2c3: i2c@1100f000 { + compatible = "mediatek,mt8365-i2c", "mediatek,mt8168-i2c"; + reg = <0 0x1100f000 0 0xa0>, <0 0x11000200 0 0x80>; + interrupts = ; + clock-div = <1>; + clocks = <&infracfg CLK_IFR_I2C3_AXI>, + <&infracfg CLK_IFR_AP_DMA>; + clock-names = "main", "dma"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + ssusb: usb@11201000 { compatible = "mediatek,mt8365-mtu3", "mediatek,mtu3"; reg = <0 0x11201000 0 0x2e00>, <0 0x11203e00 0 0x0100>; From patchwork Mon Mar 6 13:47:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 64669 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp1855442wrd; Mon, 6 Mar 2023 06:00:52 -0800 (PST) X-Google-Smtp-Source: AK7set8dWKMgnFi1IMPIeNIvviHsaq6cx8sqU34BjXSlVBrwHUS7uBpvib0v3eLqvyOAaZEXZXXz X-Received: by 2002:a17:907:8746:b0:8b1:7fe9:162e with SMTP id qo6-20020a170907874600b008b17fe9162emr12423198ejc.47.1678111252665; Mon, 06 Mar 2023 06:00:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678111252; cv=none; d=google.com; s=arc-20160816; b=XJNUClZSBOmBekZRGQ2hVycjxwDzkgrwR5p7gv1NsjCysI4jFXGzRVCR3AUkiuNFn0 egZqo7skTgyds2wcOtwI0suBTGXjEhJUfFvQXVwieMT65ocjPGN0WCAWK9bOi9Iwr/p8 cLSU2YMjnd8jSoLgSfwvB6kp8LVyh31IqGvwi4G/C6tdJr656aBNW+7qwi+awHOWsOWx mKJWcB5FINtP78hxbdc0b/hP1Q1Fkarma35DXs5Mu1ltRH9/z80gONz7317p9yphU6iB 4ZYZWHSsnw89f2GuldOB/9+d5ZOLr7cjp0aMfI5p4LHV8To8FHV8+0JhlTy42ed9Q3OO dqiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=0y6TlObx8TNyu4QXIni+BBvzU+TNoBWWh1Z9MDExTMc=; b=CcMPEHFddk2b4O5DUoOOKWO/EOU0vg9WBPGnNC8OUs5MdNj/AnhGS+q/5pMS/DqJyo Ik+jPiYMYCwHVrjzX6yVUh+W6JoAt5UzDoA2AWvFV/S/1u+M9yghBRUmpdKgHmXoX1Sz hwVFZ1jaXCOy3vqWbZlzJ58ei1gwsNTCtP+vYpMVKaTon13CytH+/4M3aMl5VzvxhhFp UZJYi6oBAlPaa5GiXsAdDs/AGot6MyvE5CIAuSol7loKjf/AduiBsl7eJ8anmGGKmjI2 5VIEjxibxaZHJh6FW8jEhap2ddSKYYB7nzscGu5jErZxK3VhjSKI4ZOyGoKzBzeGexrX 1GxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=sj2UnyaI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id y64-20020a50bb46000000b004bc2d1c0fadsm5193293ede.32.2023.03.06.05.47.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Mar 2023 05:47:52 -0800 (PST) From: Alexandre Mergnat Date: Mon, 06 Mar 2023 14:47:44 +0100 Subject: [PATCH v3 2/2] arm64: dts: mediatek: enable i2c0 for mt8365-evk board MIME-Version: 1.0 Message-Id: <20221122-mt8365-i2c-support-v3-2-ad9bb1076d7f@baylibre.com> References: <20221122-mt8365-i2c-support-v3-0-ad9bb1076d7f@baylibre.com> In-Reply-To: <20221122-mt8365-i2c-support-v3-0-ad9bb1076d7f@baylibre.com> To: Qii Wang , Matthias Brugger , Krzysztof Kozlowski , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org, Fabien Parent , devicetree@vger.kernel.org, AngeloGioacchino Del Regno , Alexandre Mergnat , Rob Herring , linux-mediatek@lists.infradead.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1341; i=amergnat@baylibre.com; h=from:subject:message-id; bh=57rouWYbJDpjGSrX0WaD+yWCM7skXPMNCc2QzK6z+hc=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkBe8FGEDJjw8jCDD+pzfbtHy3Gqyg/CVb1SO5vcEX gmsfOh+JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZAXvBQAKCRArRkmdfjHURWcyD/ 4z4RX0Lxrn8tRX8IbLQW/N48Svs7bVH70g6E+YXnC6C9ssz3luDY0z71xfUToW3uHSPr9kDnHstie7 j0DZaYi1Bi55JgEnWgDVUTgwXuxHNgUaAuv6qYdy4QpzvcjlPJIDQyjvnkidoltKXn5cS8oFIfNJjq 16TfmVrgsWWLNR9qVRCSS0QeLF1JmZ/x551NTgRHo8d1T/JNbat7vLAlnQLcM1SMYb9AKVLiaO7KVG 8w+k3P9OegKSROlnvQP7qfay+WgFZ1XIgVCXudIa3KoRF5oBv+ib6SqJ7AK/wg573Os6zkv/CITh5u dUZA6UJ6LlH1iXdVESJqR0y2RpVeuzyqUK78ObnAAuIEkggVy1+soI+cgk2uHoVsjXjMS/qYyCfIZr INzJT/rZkWSRaa+6L3DccSnxL5Zgwvs/niCpSAAGrEa/KCxhA3hLh0XTQQ/fZK1VOpQdje/L92OcsH zOsL6NezU4gs3EOhNG4eMEQgSxJEq7qDa6NiKWv6roZBzjVgkmqPnFzl1InWFwL8qBoVVJq20w+maW DgSr+Y+e74nEk85GpJb8Ds10A+IxW0PvZzJ30HrY1Tl72/DHWDAwZaKX/yQREBY+22KT9ctbLhS4vC 3UGqMnSkRQ54Sw1WEMCszYcWoH6PV6m0tpctS6laxJ2+oNXIcLFGjIeS4htw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759627184865649619?= X-GMAIL-MSGID: =?utf-8?q?1759627184865649619?= Enable the I2C0 bus provides communication with: - The integrated RT9466 Switching Battery Charger. - The integrated MT6691 LP4X buck for VDDQ. - The integrated MT6691 LP4X buck for VDD2. - The pin header, to plug external I2C devices. Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 4683704ea235..b68aee8f229f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -87,6 +87,15 @@ optee_reserved: optee@43200000 { }; }; +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + clock-frequency = <100000>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; +}; + &pio { gpio_keys: gpio-keys-pins { pins { @@ -96,6 +105,16 @@ pins { }; }; + i2c0_pins: i2c0-pins { + pins { + pinmux = , + ; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <00>; + bias-pull-up; + }; + }; + uart0_pins: uart0-pins { pins { pinmux = ,