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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q8-20020a17090a2dc800b00237dd21c1b7si973208pjm.143.2023.03.02.17.45.10; Thu, 02 Mar 2023 17:45:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=e6wOhWil; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229747AbjCCBjI (ORCPT + 99 others); Thu, 2 Mar 2023 20:39:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229971AbjCCBjA (ORCPT ); Thu, 2 Mar 2023 20:39:00 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD3FA5552A; Thu, 2 Mar 2023 17:38:57 -0800 (PST) X-UUID: 245c3d6cb96411ed945fc101203acc17-20230303 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=BFH3u90gQu6CGSoKIn5r02HFDVd5hW7dCnj1CEuoUp0=; b=e6wOhWilXjps1X1tRVQ9Oz2nVXgC9FOM9APwQXlwgwMMhHJaCuu5PqfIQaPlgnuLAt3qdyy22X3EVPpjci84t0Z6m4kYBJwdnPCerU2JFUlYG6+m7FvOeXCn7LNuoNT8jZYXutLsFTyNSCsOEpJQyd43/uHffoSucct0HjgF9pM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.20,REQID:604cd57d-e854-4f84-a1d1-810a5cc82c5c,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:70 X-CID-INFO: VERSION:1.1.20,REQID:604cd57d-e854-4f84-a1d1-810a5cc82c5c,IP:0,URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTI ON:quarantine,TS:70 X-CID-META: VersionHash:25b5999,CLOUDID:b4880db2-beed-4dfc-bd9c-e1b22fa6ccc4,B ulkID:230303093849V0GIIFBN,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-UUID: 245c3d6cb96411ed945fc101203acc17-20230303 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 941020051; Fri, 03 Mar 2023 09:38:47 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Fri, 3 Mar 2023 09:38:44 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Fri, 3 Mar 2023 09:38:44 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , , , Allen-KH Cheng Subject: [RESEND 1/6] media: dt-bindings: media: mediatek: Rename child node names for decoder Date: Fri, 3 Mar 2023 09:38:37 +0800 Message-ID: <20230303013842.23259-2-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> References: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759309120935816267?= X-GMAIL-MSGID: =?utf-8?q?1759309120935816267?= In order to make the names of the child nodes more generic, we rename "vcodec-lat" and "vcodec-core" to "video-codec" for decoder in patternProperties and example. Signed-off-by: Allen-KH Cheng Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- .../media/mediatek,vcodec-subdev-decoder.yaml | 61 ++----------------- 1 file changed, 5 insertions(+), 56 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index c4f20acdc1f8..46308cdaacc0 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -91,12 +91,13 @@ properties: # Required child node: patternProperties: - '^vcodec-lat@[0-9a-f]+$': + '^video-codec@[0-9a-f]+$': type: object properties: compatible: enum: + - mediatek,mtk-vcodec-core - mediatek,mtk-vcodec-lat - mediatek,mtk-vcodec-lat-soc @@ -145,59 +146,6 @@ patternProperties: additionalProperties: false - '^vcodec-core@[0-9a-f]+$': - type: object - - properties: - compatible: - const: mediatek,mtk-vcodec-core - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - iommus: - minItems: 1 - maxItems: 32 - description: | - List of the hardware port in respective IOMMU block for current Socs. - Refer to bindings/iommu/mediatek,iommu.yaml. - - clocks: - maxItems: 5 - - clock-names: - items: - - const: sel - - const: soc-vdec - - const: soc-lat - - const: vdec - - const: top - - assigned-clocks: - maxItems: 1 - - assigned-clock-parents: - maxItems: 1 - - power-domains: - maxItems: 1 - - required: - - compatible - - reg - - interrupts - - iommus - - clocks - - clock-names - - assigned-clocks - - assigned-clock-parents - - power-domains - - additionalProperties: false - required: - compatible - reg @@ -211,6 +159,7 @@ if: compatible: contains: enum: + - mediatek,mtk-vcodec-core - mediatek,mtk-vcodec-lat then: @@ -241,7 +190,7 @@ examples: #size-cells = <2>; ranges = <0 0 0 0x16000000 0 0x40000>; reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */ - vcodec-lat@10000 { + video-codec@10000 { compatible = "mediatek,mtk-vcodec-lat"; reg = <0 0x10000 0 0x800>; interrupts = ; @@ -264,7 +213,7 @@ examples: power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>; }; - vcodec-core@25000 { + video-codec@25000 { compatible = "mediatek,mtk-vcodec-core"; reg = <0 0x25000 0 0x1000>; interrupts = ; From patchwork Fri Mar 3 01:38:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 63717 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp170918wrd; Thu, 2 Mar 2023 17:43:20 -0800 (PST) X-Google-Smtp-Source: AK7set8rDC5rZ0Ghjf8JZXF5lXuTZlPiu7lV+DRC137sPaDkumUPaaN5jfa940ciIW9Z1QPuv/Ty X-Received: by 2002:a17:90b:4c10:b0:22c:d44:5669 with SMTP id na16-20020a17090b4c1000b0022c0d445669mr3970271pjb.22.1677807799953; Thu, 02 Mar 2023 17:43:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677807799; cv=none; d=google.com; s=arc-20160816; b=rcOFQONNSH7/5mVT/xUXr9VICLxoMCWYkuqJI3YKAwGkMEpX7QI5jhvk9AQ9XsePEg Qh2gDoSHWl6IV6NSNJNmyl+73YRGXQs4Mf3gKonDapBumqtv9Xjl0EC22LdVPEkWpgMb 5e4qcVZO8fQ8sMkX+1QqwVkxVjfXd3XNszIr9lpYuUfn3Dxd+Ub/e9Xjz9v2dLOw7DHf SJbF1mLj/mZTWR3x+Pj0tM8Mxw9M5L8024EWPy4dcaq/Vlcy0xyub7koujIV2h6poUBY bYikjBnuJAuX2WXDZdbRTU/twQU3aGP/iL1FAZn5lg30IAK0lvcyLoh9glG5WLjxJHMF KsCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tyMuc6+z6Czz6mBk9Fo6HyijgYmHTnDSU3jNKbiRzWU=; b=te8uPiphWmLVhami/05krDHuvr7kVoK+NsSZpTPA9XDlvXsqPx1nAKI3KU9Mf3XtAu Dd4kutm2PT7j7M8J42loHXzgZ1hvmyl3BMlvw7ij0ymDDa7Nvw/XFj5xKlxm88FV8VIH OqDrUEvd4hUagfW4qjsXJ4zMmivQBrqqd9B5KxwVxDJI7B6SBCYdLLmQq8wPnTwOgWM1 iLZoCaYyhM33ZdmmQjtcychwtPBolVz42qmGSkDixt0BUWHfUF97qNryPAcjvvV18Dd2 edxFht2yf4Q07piIQXRXCRN4NqWq7LsJcIKSVSNs30rxuECoMKLvg1jbiDWm1Wcbv68v G2Ag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="H/pVhggz"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y186-20020a6364c3000000b004f24be1c13csi762906pgb.117.2023.03.02.17.43.06; Thu, 02 Mar 2023 17:43:19 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="H/pVhggz"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229988AbjCCBjB (ORCPT + 99 others); Thu, 2 Mar 2023 20:39:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229951AbjCCBiw (ORCPT ); Thu, 2 Mar 2023 20:38:52 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6CD9A1ABDF; Thu, 2 Mar 2023 17:38:51 -0800 (PST) X-UUID: 24216a48b96411eda06fc9ecc4dadd91-20230303 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=tyMuc6+z6Czz6mBk9Fo6HyijgYmHTnDSU3jNKbiRzWU=; b=H/pVhggzKmW/NSqylZHPxYrKNz9i5+wZ8DbK+eAN9iHz9eV+ACfoUko2UmGwPyfjnGY2g+YomMebii51FQvDs1DTjtLQ961HUMOgMsWW2QOX9k33kGjcGuu/OpifzEmgFkqtpVgIpy9ZJw8cOemBYBZ2o0HwMtvzwa6rHP2RqnA=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.20,REQID:58bea8c9-ebb1-42ff-8302-73edfa7593ef,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:25b5999,CLOUDID:e4379bf4-ddba-41c3-91d9-10eeade8eac7,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-UUID: 24216a48b96411eda06fc9ecc4dadd91-20230303 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1195944537; Fri, 03 Mar 2023 09:38:47 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Fri, 3 Mar 2023 09:38:45 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Fri, 3 Mar 2023 09:38:45 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , "Krzysztof Kozlowski" CC: , , , , , , , "Allen-KH Cheng" Subject: [RESEND 2/6] media: dt-bindings: media: mediatek: Remove "dma-ranges" property for decoder Date: Fri, 3 Mar 2023 09:38:38 +0800 Message-ID: <20230303013842.23259-3-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> References: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759308991553535335?= X-GMAIL-MSGID: =?utf-8?q?1759308991553535335?= Because the decoder nodes already make use of the iommus property to configure the IOMMU for address translations, having a dma-ranges property makes no sense. In fact, after commit f1ad5338a4d5 ("of: Fix "dma-ranges" handling for bus controllers"), having a dma-ranges property causes IOMMU faults. Remove the dma-ranges property and update the example. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring Reviewed-by: Nícolas F. R. A. Prado Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- .../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 7 ------- 1 file changed, 7 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index 46308cdaacc0..7efc70ae4406 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -76,11 +76,6 @@ properties: The node of system control processor (SCP), using the remoteproc & rpmsg framework. - dma-ranges: - maxItems: 1 - description: | - Describes the physical address space of IOMMU maps to memory. - "#address-cells": const: 2 @@ -151,7 +146,6 @@ required: - reg - iommus - mediatek,scp - - dma-ranges - ranges if: @@ -185,7 +179,6 @@ examples: compatible = "mediatek,mt8192-vcodec-dec"; mediatek,scp = <&scp>; iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>; - dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>; #address-cells = <2>; #size-cells = <2>; ranges = <0 0 0 0x16000000 0 0x40000>; From patchwork Fri Mar 3 01:38:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 63719 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp171225wrd; Thu, 2 Mar 2023 17:44:26 -0800 (PST) X-Google-Smtp-Source: AK7set/FnS4pqUiKqlvoGmIms7+Aq6FWL3kDpZuqmdCeQ517wiIrV91b6N1hIG35smv8+eCsCnuR X-Received: by 2002:a17:902:da90:b0:19a:a0d0:10f0 with SMTP id j16-20020a170902da9000b0019aa0d010f0mr410353plx.23.1677807865902; Thu, 02 Mar 2023 17:44:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677807865; cv=none; d=google.com; s=arc-20160816; b=D9iyM78gjYLMg0Gx7ODHqCJWNsrtwzJN96lBbliT+iP7wTM6IaDSjjcvBhEQJ9dbrL 43WZI9APfvNXryVNJEeQd+9Exiu/KUHTiATeM0I3TrjMnOh51kuAAe46GhzwZT53/z3Z b1h6crh3oafpa9x20FsoDliy65YXV+HbNzCjSmzgx3cJW4n1k2XseFfI9GlTJFOSB28m hN/NRChyJZ3vcFF2Pt/VhInT6Jss/D8hlfi53Hch6tNl96/vc9LxtK2XjrdJ33B/jMHZ NtBdufDqchqmTFze2SqgJvs1XN3/hryf3SH34DDC3k7jmZ6yG6X6kZeMi6zcegAEZCHS B5vg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UF5HxZGrnT9l0ObgLg61S3SwBqbR0DHrc+ITe5j3i9U=; b=tNFOSrvXkotpO/B35lNJdSdIkis7QyH5qn9vryoqB0sgoTAPA4YKQHx3MzsmndCq8/ zZm6iNQt0sQLiTEoeKebGl2bweguxbPjIgKx9n/47S1zysMqGXok33yzI1Ukmvb1suAQ 5qjLWtJHhNt4ypO/zIiTL/NItX1PlYtiCB9Q023HPJ5OoeqmqtJMOHj2dB7ICE6oGAtM QDbj+uwnRY5wZkf6zuK5XgYBtFpXL35I5bRVMs3xNzrZU8QTthJobx69YmfWTzmjWt6c J1tTSUzh+3rt8HttTLe19c17sOQqrUBeUgrtX7ZUYiiW7z3mN9r9M98vDd9Cn5+rUsST hDTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=DDZp0Aar; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ke15-20020a170903340f00b0019e41554031si716819plb.628.2023.03.02.17.44.11; Thu, 02 Mar 2023 17:44:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=DDZp0Aar; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230038AbjCCBjL (ORCPT + 99 others); Thu, 2 Mar 2023 20:39:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47092 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229972AbjCCBjA (ORCPT ); Thu, 2 Mar 2023 20:39:00 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD475559C3; Thu, 2 Mar 2023 17:38:57 -0800 (PST) X-UUID: 246de544b96411ed945fc101203acc17-20230303 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=UF5HxZGrnT9l0ObgLg61S3SwBqbR0DHrc+ITe5j3i9U=; b=DDZp0Aaro1IJZ6jEH4rKi2hYrLH/CBiPUsbEkldGo0Y+ueASVnrN7pMexjwRF2wzDT3dFu9sqtSchojw3wFhPWVPJENDNQ/2ToBQV/yYxQsO7Cn/X+Lab/yfJOm6yHTmJNO2VEuHBjY2/fGLNV2npv4Z/hTxKiEkm+0Tjtbfn8Q=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.20,REQID:a9b8185d-5768-4495-833b-c65601ff9cd9,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:25b5999,CLOUDID:1f389bf4-ddba-41c3-91d9-10eeade8eac7,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-UUID: 246de544b96411ed945fc101203acc17-20230303 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 180331520; Fri, 03 Mar 2023 09:38:47 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Fri, 3 Mar 2023 09:38:46 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Fri, 3 Mar 2023 09:38:46 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , , , Allen-KH Cheng Subject: [RESEND 3/6] arm64: dts: mt8192: Add video-codec nodes Date: Fri, 3 Mar 2023 09:38:39 +0800 Message-ID: <20230303013842.23259-4-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> References: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759309060929198930?= X-GMAIL-MSGID: =?utf-8?q?1759309060929198930?= Add video-codec lat and core nodes for mt8192 SoC. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Nícolas F. R. A. Prado Tested-by: Nícolas F. R. A. Prado Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 59 ++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 87b91c8feaf9..f0dc7a943a90 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -1517,6 +1517,65 @@ power-domains = <&spm MT8192_POWER_DOMAIN_ISP2>; }; + vcodec_dec: video-codec@16000000 { + compatible = "mediatek,mt8192-vcodec-dec"; + reg = <0 0x16000000 0 0x1000>; + mediatek,scp = <&scp>; + iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0 0 0x16000000 0 0x26000>; + + video-codec@10000 { + compatible = "mediatek,mtk-vcodec-lat"; + reg = <0x0 0x10000 0 0x800>; + interrupts = ; + iommus = <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD2_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_AVC_MV_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_PRED_RD_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_TILE_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_WDMA_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_LAT0_RG_CTRL_DMA_EXT>, + <&iommu0 M4U_PORT_L5_VDEC_UFO_ENC_EXT>; + clocks = <&topckgen CLK_TOP_VDEC_SEL>, + <&vdecsys_soc CLK_VDEC_SOC_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_LAT>, + <&vdecsys_soc CLK_VDEC_SOC_LARB1>, + <&topckgen CLK_TOP_MAINPLL_D4>; + clock-names = "sel", "soc-vdec", "soc-lat", "vdec", "top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; + power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>; + }; + + video-codec@25000 { + compatible = "mediatek,mtk-vcodec-core"; + reg = <0 0x25000 0 0x1000>; + interrupts = ; + iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_UFO_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PP_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PRED_RD_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PRED_WR_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_PPWRAP_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_TILE_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_VLD_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_VLD2_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_AVC_MV_EXT>, + <&iommu0 M4U_PORT_L4_VDEC_RG_CTRL_DMA_EXT>; + clocks = <&topckgen CLK_TOP_VDEC_SEL>, + <&vdecsys CLK_VDEC_VDEC>, + <&vdecsys CLK_VDEC_LAT>, + <&vdecsys CLK_VDEC_LARB1>, + <&topckgen CLK_TOP_MAINPLL_D4>; + clock-names = "sel", "soc-vdec", "soc-lat", "vdec", "top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; + power-domains = <&spm MT8192_POWER_DOMAIN_VDEC2>; + }; + }; + larb5: larb@1600d000 { compatible = "mediatek,mt8192-smi-larb"; reg = <0 0x1600d000 0 0x1000>; From patchwork Fri Mar 3 01:38:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 63716 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp170763wrd; Thu, 2 Mar 2023 17:42:45 -0800 (PST) X-Google-Smtp-Source: AK7set/pwPGVcH2/kq27t7b4Fs3kfGvhUM+uMTS4OLS1hYRW8JRU+GZZPAe0O967UlniHPl7zzsu X-Received: by 2002:a62:79c6:0:b0:5b1:53e:ae46 with SMTP id u189-20020a6279c6000000b005b1053eae46mr537326pfc.31.1677807765470; Thu, 02 Mar 2023 17:42:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677807765; cv=none; d=google.com; s=arc-20160816; b=fWctaiS18GzR4YQm4ct96n6R7V7zwzVHokTYkFimwMXQzN0dvzczku4kItBJ8VlTR+ 8zDcNKm2f5WbMp2T1OHuxgw74HkrCB5kDxlQEssM82sVRRIExK2VsdrpHp6DEhnAEfg9 S/IGoV3sJ/Vr1rU1qaw3EjOo2CLAD5uQx7ANvOA7+d1ERjDaIeDMwYx+l85qFh2vJ1PH gNAZFpVjd+YoFLcuEr71VCFUqCMyjnoW/iE+wyWpPT4WrRYo1HOcJsqbGCOSI2NEzSzr aZScwLBPgf6X5gyMOfJKrpqOcgeY21zUGN1C9I2fWxUIKYpp/WEHppA0lokWnaizxCr2 6icw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=d52g3hRZkl/a2eC5lgJWmYH122SOlYvP/ZU+/rzmV+8=; b=TX+7Tz3Xkj/Z9O+nBrBvBVqMvnVga3LkDUcIJHE2/MViMmcO+n1jDtt/VQ4KhwVCfn sHZhe6/oNG5zKOpORVzlldmK2PkzzWZXi/0SCYUETs9RbzbHljZNdI7+jzKpGSzpslrP r7N1JJvY9EOjJ24vPxA4/qn8eQJKnHRcNvJf8yESSdQ3UBieD996LUK68GOGKsrPCAl0 WLFBcWs5iLj8xVRF0qoiBLRKZ0/GEg8QdPPts5pU+Rx8A7Vl/JO78ZjqkplUXmoAY2ff D7Ms78UDQDbybtAvkiI6d52X0PqziXcOSEt2eP2wZdgihxsdsmSQwc+W7ES1MOo1BD/A FIXQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=lQ846jgK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Yunfei Dong Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- .../media/mediatek,vcodec-subdev-decoder.yaml | 41 ++++++++++++++++--- 1 file changed, 35 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index 7efc70ae4406..51c0ff7baa52 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -110,15 +110,12 @@ patternProperties: Refer to bindings/iommu/mediatek,iommu.yaml. clocks: + minItems: 4 maxItems: 5 clock-names: - items: - - const: sel - - const: soc-vdec - - const: soc-lat - - const: vdec - - const: top + minItems: 4 + maxItems: 5 assigned-clocks: maxItems: 1 @@ -160,6 +157,38 @@ then: required: - interrupts +allOf: + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8192-vcodec-dec + then: + properties: + clock-names: + items: + - const: sel + - const: soc-vdec + - const: soc-lat + - const: vdec + - const: top + + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8195-vcodec-dec + then: + properties: + clock-names: + items: + - const: sel + - const: vdec + - const: lat + - const: top + additionalProperties: false examples: From patchwork Fri Mar 3 01:38:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 63718 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp171012wrd; Thu, 2 Mar 2023 17:43:40 -0800 (PST) X-Google-Smtp-Source: AK7set98PXHvDTJO4oV6iBsr4J/a6+QBAq2SEFOSDqkwXoHL3TxpQolKhhM8HmYbdTn5/ATxFolr X-Received: by 2002:a17:903:22ce:b0:19d:90f:6c6c with SMTP id y14-20020a17090322ce00b0019d090f6c6cmr442133plg.17.1677807820111; Thu, 02 Mar 2023 17:43:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677807820; cv=none; d=google.com; s=arc-20160816; b=PJOA6rrccDh4lBf6Uffx7LNFQdKPweZIi2O/hjZXhle27iuvbWj3ogdYpX/x+Ndomd 2WjrWh/GjHZlTRxVKqvjht8aeSSr1FmsBvSmbnSNq7gzVLI6w2PromO1Kv1g4Db+DicQ 5o6xVw8gZ+CBADM+/PFHx3Eb0WghUYN/nFMEmquDj1zff7yOQeXiEqjaBZWA0M5LU6cz 1JZXoCxW5WecuS5+ie41BJOtFBsIbKrVrQf5mkN4B8/rf34pCAf6i6fhJYooKD63kHIz M7g4stJH36zF6KWn+EKVOvnccCxARe8/aBGviawfqMubUZMInvWTHtm2clpG3+ODcRPV pu1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=9DQofAeFrBxPPPvGnYQlYOOSVP8o9jLoEG7CCSLrzSw=; b=iwj4NTcqQiufMUh42WzFCSNWItbKWv+7C6waAgZlazKR4sANJB2/6ltR/ohknaNEYv sJCPq/U78KRT+XcQHcne3r2OBq8awU+HjCGdY7Xa0idCv75xa8BA8gWALqHuyPMm65L+ hNGWVLdAgGDUxxxAM5yi+b8TtC3R6i6G/SZ0pbZDqlb7HVKCW8bPwN4daj23EF2jLMR9 uNhCe06pu9D7DJ6Rdtt+rPKs0AvErmBj1kye9faGOFHwrXDRDi9ZqukINgNa1TdmH+aT rMASRKNqdK7bY/O8ovRsvqHA8QsoFavfSpUsizTz2Casa59r4avRFnCWXvzRTwIRCkmx S9Bg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=MSpSyLl4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id jx3-20020a170903138300b0019e8928b3besi771121plb.248.2023.03.02.17.43.26; Thu, 02 Mar 2023 17:43:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=MSpSyLl4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229986AbjCCBjE (ORCPT + 99 others); Thu, 2 Mar 2023 20:39:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229964AbjCCBi7 (ORCPT ); Thu, 2 Mar 2023 20:38:59 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD651559D5; Thu, 2 Mar 2023 17:38:57 -0800 (PST) X-UUID: 250dcb4ab96411ed945fc101203acc17-20230303 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=9DQofAeFrBxPPPvGnYQlYOOSVP8o9jLoEG7CCSLrzSw=; b=MSpSyLl4HRXqwxI1IZw9epQMrFY9U7OP8waozNBW0n1HOYX1U0p73YLJTGwCIl7vNvNxHW0lVPIrzzLrsePqZRMQjBX6Wh85KyXgYr72c6xhrUzv9Bp+CNkBAUVWjJV9a7yAwzlrK1WzTY9LYxbijr8vstzeaaUiTp/KBw8B5PA=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.20,REQID:5d2a662d-f5b5-40b3-8754-4498fb8b0470,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.20,REQID:5d2a662d-f5b5-40b3-8754-4498fb8b0470,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:25b5999,CLOUDID:b3880db2-beed-4dfc-bd9c-e1b22fa6ccc4,B ulkID:230303093850BO85MRVR,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-UUID: 250dcb4ab96411ed945fc101203acc17-20230303 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1681171590; Fri, 03 Mar 2023 09:38:48 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Fri, 3 Mar 2023 09:38:47 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Fri, 3 Mar 2023 09:38:47 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , , , Allen-KH Cheng Subject: [RESEND 5/6] media: dt-bindings: media: mediatek: vcodec: Change the max reg value to 2 Date: Fri, 3 Mar 2023 09:38:41 +0800 Message-ID: <20230303013842.23259-6-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> References: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759309012944618250?= X-GMAIL-MSGID: =?utf-8?q?1759309012944618250?= From: Yunfei Dong Need to add racing control register base in device node for mt8195 support inner racing mode. Changing the max reg value from 1 to 2. Adding the description for VDEC_SYS and VDEC_MISC. Signed-off-by: Yunfei Dong Signed-off-by: Allen-KH Cheng Acked-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- .../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index 51c0ff7baa52..cfd13a6b6b68 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -61,7 +61,10 @@ properties: - mediatek,mt8195-vcodec-dec reg: - maxItems: 1 + minItems: 1 + items: + - description: VDEC_SYS register space + - description: VDEC_RACING_CTRL register space iommus: minItems: 1 @@ -98,6 +101,7 @@ patternProperties: reg: maxItems: 1 + description: VDEC_MISC register space interrupts: maxItems: 1 From patchwork Fri Mar 3 01:38:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 63720 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp171487wrd; Thu, 2 Mar 2023 17:45:22 -0800 (PST) X-Google-Smtp-Source: AK7set9BEujxguNrpNZ71lNwdhXdTrCoPVGvet7SsicRTHdyR8d/P7k0I280pbEyXk15YRr/hA9f X-Received: by 2002:a17:903:187:b0:19e:6d83:8277 with SMTP id z7-20020a170903018700b0019e6d838277mr296255plg.51.1677807922216; Thu, 02 Mar 2023 17:45:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677807922; cv=none; d=google.com; s=arc-20160816; b=o3EumYDr9F/fvWBUl0Bhva6JGhoseRcjzvgSVT1NY+ICa/Rs4oH+bQ5cENDdaqiHcW nfCe3n8rsoLk0vzEfeg3gWPcjxrPQmTgOzmzhEI2jPJ6CVtQ3mNL7bgooLgzMSz7puC4 QODE9XsJyTso29dWqzOzmKklS3ei8PZoFg5gifjx7ZMbH2ecLl5nkWwN5yLVdzL4X6Yb VsjIOWWSbBgx3vAzmCGO2VIHwkkEy8Qne7GlwJa7RMsoUY1i0NGiDVSTT7/LaUrN7IK4 WSCpcShC1I/ULjR05JU5OJeAPtSieae7BjMHGxK/Pj9Uu2xV0vAY15jZOqf36cKZWhcu OyMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=3HkB48symoODIC8ECiB6Yao0itYaQt3zHYaMGMx88ZQ=; b=ZgTN0lds3SkgqvxwhKnN0i6GRyc/n/om5YQETtYp7hQ0menYAp3ZNhfZMCPVO3n8vH EfbA58vyAZ/gSU01TTiohgi0EB7LDm3NQbd8dl46uuWjj3o1vVgXsphEKeNv9Uchzm8a tI+Kax8niMInNsK7EkhL4X2oUXmmZrorixZerwB0avyRnHQKphJbZjuqZZE/PHoFV2Ms hDNPz66ouOBq/tW9/oYk+C3m4iidYoUCB8L5NuumLfbJ2c71txNkVQwwYbrYePcYFJxg 82fzFC2QGIkQEc8EZHy9iclk0r7Kra/Bpx1EDCBIEgmfNAfm7jx6rG3cJECewxEORY8Q ewDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=mrxGYG7Y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id kl7-20020a170903074700b0019a9d99f1b1si789166plb.43.2023.03.02.17.45.08; Thu, 02 Mar 2023 17:45:22 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=mrxGYG7Y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229962AbjCCBjP (ORCPT + 99 others); Thu, 2 Mar 2023 20:39:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47124 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229984AbjCCBjB (ORCPT ); Thu, 2 Mar 2023 20:39:01 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD7D1559D8; Thu, 2 Mar 2023 17:38:57 -0800 (PST) X-UUID: 25291206b96411ed945fc101203acc17-20230303 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=3HkB48symoODIC8ECiB6Yao0itYaQt3zHYaMGMx88ZQ=; b=mrxGYG7Y2lXppKl09xo80tPDHY+IMvvhUQPe2Vfd1Zqo71qa4RimY6rmdzzF8nZsVB+9O5yhRVNZLXHYluuHo/orH4oytKcRLYv2WfG2IYP6FYwiwuH6DDaFbHYGcvR9rIeDIxkWa8g8Y6PyH6LdJgZH3lRuXwKXpNvt+Z6NX8g=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.20,REQID:c1e6ca7e-5709-4ba1-8dc4-5f8bdbbd6202,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:25b5999,CLOUDID:20389bf4-ddba-41c3-91d9-10eeade8eac7,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-UUID: 25291206b96411ed945fc101203acc17-20230303 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1501646870; Fri, 03 Mar 2023 09:38:48 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Fri, 3 Mar 2023 09:38:48 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Fri, 3 Mar 2023 09:38:48 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , "Krzysztof Kozlowski" CC: , , , , , , , "Allen-KH Cheng" Subject: [RESEND 6/6] arm64: dts: mt8195: Add video decoder node Date: Fri, 3 Mar 2023 09:38:42 +0800 Message-ID: <20230303013842.23259-7-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> References: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759309120029403270?= X-GMAIL-MSGID: =?utf-8?q?1759309120029403270?= From: Yunfei Dong Add video decoder node to mt8195 device tree. Signed-off-by: Yunfei Dong Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 70 ++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 8fc527570791..d0d53e0bfbfc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -2211,6 +2211,76 @@ power-domains = <&spm MT8195_POWER_DOMAIN_CAM>; }; + video-codec@18000000 { + compatible = "mediatek,mt8195-vcodec-dec"; + mediatek,scp = <&scp>; + iommus = <&iommu_vdo M4U_PORT_L21_VDEC_MC_EXT>; + #address-cells = <2>; + #size-cells = <2>; + reg = <0 0x18000000 0 0x1000>, + <0 0x18004000 0 0x1000>; + ranges = <0 0 0 0x18000000 0 0x26000>; + + video-codec@2000 { + compatible = "mediatek,mtk-vcodec-lat-soc"; + reg = <0 0x2000 0 0x800>; + iommus = <&iommu_vpp M4U_PORT_L23_VDEC_UFO_ENC_EXT>, + <&iommu_vpp M4U_PORT_L23_VDEC_RDMA_EXT>; + clocks = <&topckgen CLK_TOP_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_LAT>, + <&topckgen CLK_TOP_UNIVPLL_D4>; + clock-names = "sel", "vdec", "lat", "top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>; + power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>; + }; + + video-codec@10000 { + compatible = "mediatek,mtk-vcodec-lat"; + reg = <0 0x10000 0 0x800>; + interrupts = ; + iommus = <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_VLD_EXT>, + <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_VLD2_EXT>, + <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_AVC_MC_EXT>, + <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_PRED_RD_EXT>, + <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_TILE_EXT>, + <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_WDMA_EXT>; + clocks = <&topckgen CLK_TOP_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_VDEC>, + <&vdecsys_soc CLK_VDEC_SOC_LAT>, + <&topckgen CLK_TOP_UNIVPLL_D4>; + clock-names = "sel", "vdec", "lat", "top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>; + power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>; + }; + + video-codec@25000 { + compatible = "mediatek,mtk-vcodec-core"; + reg = <0 0x25000 0 0x1000>; /* VDEC_CORE_MISC */ + interrupts = ; + iommus = <&iommu_vdo M4U_PORT_L21_VDEC_MC_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_UFO_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_PP_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_PRED_RD_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_PRED_WR_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_PPWRAP_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_TILE_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_VLD_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_VLD2_EXT>, + <&iommu_vdo M4U_PORT_L21_VDEC_AVC_MV_EXT>; + clocks = <&topckgen CLK_TOP_VDEC>, + <&vdecsys CLK_VDEC_VDEC>, + <&vdecsys CLK_VDEC_LAT>, + <&topckgen CLK_TOP_UNIVPLL_D4>; + clock-names = "sel", "vdec", "lat", "top"; + assigned-clocks = <&topckgen CLK_TOP_VDEC>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>; + power-domains = <&spm MT8195_POWER_DOMAIN_VDEC1>; + }; + }; + larb24: larb@1800d000 { compatible = "mediatek,mt8195-smi-larb"; reg = <0 0x1800d000 0 0x1000>;