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[87.115.72.95]) by smtp.gmail.com with ESMTPSA id y28-20020a170906519c00b008dea022f5e6sm4938025ejk.24.2023.02.28.13.44.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 13:44:10 -0800 (PST) To: binutils@sourceware.org Cc: Andrew Burgess Subject: [PATCH] opcodes/arm: adjust whitespace in cpsie instruction Date: Tue, 28 Feb 2023 21:44:06 +0000 Message-Id: <2efba8824df3f1bc782b9bd9aa598e2dae02f9ca.1677620627.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrew Burgess via Binutils From: Andrew Burgess Reply-To: Andrew Burgess Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759112765833366907?= X-GMAIL-MSGID: =?utf-8?q?1759112765833366907?= While I was working on the disassembler styling for ARM I noticed that the whitespace in the cpsie instruction was inconsistent with most of the other ARM disassembly output, the disassembly for cpsie looks like this: cpsie if,#10 notice there's no space before the '#10' immediate, most other ARM instructions have a space before each operand. This commit updates the disassembler to add the missing space, and updates the tests I found that tested this instruction. --- gas/testsuite/gas/arm/archv6.d | 4 ++-- gas/testsuite/gas/arm/t16-bad.s | 4 ++-- opcodes/arm-dis.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) base-commit: 2968b79fca38cf18e8eef360c36de7a6e3846d3c diff --git a/gas/testsuite/gas/arm/archv6.d b/gas/testsuite/gas/arm/archv6.d index bee9909f2af..ec609b51237 100644 --- a/gas/testsuite/gas/arm/archv6.d +++ b/gas/testsuite/gas/arm/archv6.d @@ -219,7 +219,7 @@ Disassembly of section .text: 0+34c <[^>]*> e6ef2475 ? uxtb r2, r5, ror #8 0+350 <[^>]*> 16ef2075 ? uxtbne r2, r5 0+354 <[^>]*> 16ef2475 ? uxtbne r2, r5, ror #8 -0+358 <[^>]*> f10a00ca ? cpsie if,#10 -0+35c <[^>]*> f10a00d5 ? cpsie if,#21 +0+358 <[^>]*> f10a00ca ? cpsie if, #10 +0+35c <[^>]*> f10a00d5 ? cpsie if, #21 0+360 <[^>]*> f8cd0510 ? srsia sp, #16 0+364 <[^>]*> f9ed0510 ? srsib sp!, #16 diff --git a/gas/testsuite/gas/arm/t16-bad.s b/gas/testsuite/gas/arm/t16-bad.s index 9d2ced3ca3d..8b0865da693 100644 --- a/gas/testsuite/gas/arm/t16-bad.s +++ b/gas/testsuite/gas/arm/t16-bad.s @@ -131,8 +131,8 @@ l: @ Miscellaneous bkpt #257 - cpsie ai,#5 - cpsid ai,#5 + cpsie ai, #5 + cpsid ai, #5 @ Conditional suffixes addeq r0,r1,r2 diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 65155ee173e..3145909ba42 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -3828,11 +3828,11 @@ static const struct opcode32 arm_opcodes[] = {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), 0xf1080000, 0xfffffe3f, "cpsie\t%{B:%8'a%7'i%6'f%}"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), - 0xf10a0000, 0xfffffe20, "cpsie\t%{B:%8'a%7'i%6'f%},%{I:#%0-4d%}"}, + 0xf10a0000, 0xfffffe20, "cpsie\t%{B:%8'a%7'i%6'f%}, %{I:#%0-4d%}"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), 0xf10C0000, 0xfffffe3f, "cpsid\t%{B:%8'a%7'i%6'f%}"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), - 0xf10e0000, 0xfffffe20, "cpsid\t%{B:%8'a%7'i%6'f%},%{I:#%0-4d%}"}, + 0xf10e0000, 0xfffffe20, "cpsid\t%{B:%8'a%7'i%6'f%}, %{I:#%0-4d%}"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), 0xf1000000, 0xfff1fe20, "cps\t%{I:#%0-4d%}"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6),