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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id j20-20020a2e3c14000000b00295a583a20bsm1203975lja.74.2023.02.28.05.44.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:44:23 -0800 (PST) From: Konrad Dybcio Date: Tue, 28 Feb 2023 14:43:58 +0100 Subject: [PATCH v6 1/9] interconnect: qcom: rpm: make QoS INVALID default MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v6-1-3c37a349656f@linaro.org> References: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> In-Reply-To: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677591861; l=3885; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=uWME2VC3uqK55iDqVPz0UNlT1NXsdJFrQS1F8gIjU68=; b=UW1+3PAtFkCnoPCZYU1ZKYicBpoTW1M+yUDZLEtdsa0iUN0oIuyMr+FK80/HpqWj/s0mcJNKo95Y sEUTinmjDrYaQsunaBvFK21iNDwwBw73lV69pfsfqwk3qUsFjvPY X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759082631521491757?= X-GMAIL-MSGID: =?utf-8?q?1759082631521491757?= Currently NOC_QOS_MODE_FIXED is defined as 0x0 which makes it the default option (partial struct initialization). The default option however should be NOC_QOS_MODE_INVALID. That results in bogus QoS configurations being sent for port 0 (which is used for the DRAM endpoint on BIMC, for example) coming from all nodes with .qos.ap_owned = true and uninitialized .qos.qos_mode. It's also an issue for newer SoCs where all nodes are treated as if they were ap_owned, but not all of them have QoS configuration. The NOC_QOS_MODEs are defined as preprocessor constants and are not used anywhere outside qcom_icc_set_noc_qos(), which is easily worked around. Separate the desc->type values from the values sent to msmbus in the aforementioned function. Make the former an enum for better mainainability. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 24 +++++++++++++----------- drivers/interconnect/qcom/icc-rpm.h | 10 ++++++---- 2 files changed, 19 insertions(+), 15 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index df3196f72536..ffbeeca8c2b0 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -48,6 +48,9 @@ #define NOC_QOS_MODEn_ADDR(n) (0xc + (n * 0x1000)) #define NOC_QOS_MODEn_MASK 0x3 +#define NOC_QOS_MODE_FIXED_VAL 0x0 +#define NOC_QOS_MODE_BYPASS_VAL 0x2 + static int qcom_icc_set_qnoc_qos(struct icc_node *src, u64 max_bw) { struct icc_provider *provider = src->provider; @@ -153,7 +156,7 @@ static int qcom_icc_set_noc_qos(struct icc_node *src, u64 max_bw) struct qcom_icc_provider *qp; struct qcom_icc_node *qn; struct icc_provider *provider; - u32 mode = NOC_QOS_MODE_BYPASS; + u32 mode = NOC_QOS_MODE_BYPASS_VAL; int rc = 0; qn = src->data; @@ -167,18 +170,17 @@ static int qcom_icc_set_noc_qos(struct icc_node *src, u64 max_bw) return 0; } - if (qn->qos.qos_mode != NOC_QOS_MODE_INVALID) - mode = qn->qos.qos_mode; - - if (mode == NOC_QOS_MODE_FIXED) { - dev_dbg(src->provider->dev, "NoC QoS: %s: Set Fixed mode\n", - qn->name); + if (qn->qos.qos_mode == NOC_QOS_MODE_FIXED) { + dev_dbg(src->provider->dev, "NoC QoS: %s: Set Fixed mode\n", qn->name); + mode = NOC_QOS_MODE_FIXED_VAL; rc = qcom_icc_noc_set_qos_priority(qp, &qn->qos); if (rc) return rc; - } else if (mode == NOC_QOS_MODE_BYPASS) { - dev_dbg(src->provider->dev, "NoC QoS: %s: Set Bypass mode\n", - qn->name); + } else if (qn->qos.qos_mode == NOC_QOS_MODE_BYPASS) { + dev_dbg(src->provider->dev, "NoC QoS: %s: Set Bypass mode\n", qn->name); + mode = NOC_QOS_MODE_BYPASS_VAL; + } else { + /* How did we get here? */ } return regmap_update_bits(qp->regmap, @@ -244,7 +246,7 @@ static int __qcom_icc_set(struct icc_node *n, struct qcom_icc_node *qn, ret = qcom_icc_rpm_set(qn->mas_rpm_id, qn->slv_rpm_id, sum_bw); if (ret) return ret; - } else if (qn->qos.qos_mode != -1) { + } else if (qn->qos.qos_mode != NOC_QOS_MODE_INVALID) { /* set bandwidth directly from the AP */ ret = qcom_icc_qos_set(n, sum_bw); if (ret) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index a49af844ab13..8ba1918d7997 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -97,10 +97,12 @@ struct qcom_icc_desc { unsigned int qos_offset; }; -/* Valid for both NoC and BIMC */ -#define NOC_QOS_MODE_INVALID -1 -#define NOC_QOS_MODE_FIXED 0x0 -#define NOC_QOS_MODE_BYPASS 0x2 +/* Valid for all bus types */ +enum qos_mode { + NOC_QOS_MODE_INVALID = 0, + NOC_QOS_MODE_FIXED, + NOC_QOS_MODE_BYPASS, +}; int qnoc_probe(struct platform_device *pdev); int qnoc_remove(struct platform_device *pdev); From patchwork Tue Feb 28 13:43:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 62485 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp3020693wrd; Tue, 28 Feb 2023 05:45:34 -0800 (PST) X-Google-Smtp-Source: AK7set/ZHOmrB57EWsaXKBmaF73r3ypQd6PO/41WRyXVqnT+5rM2ryS6qnFGwuVCDLt/FbUD83YH X-Received: by 2002:a17:906:d8b:b0:87a:ee05:f7b with SMTP id m11-20020a1709060d8b00b0087aee050f7bmr2190126eji.24.1677591934142; Tue, 28 Feb 2023 05:45:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677591934; cv=none; d=google.com; s=arc-20160816; b=RkatPLfJL2pd/dN5G2w3USd2AS/scLr30ldDu608uiB50jPX/JTrHxTbOhXIaX3Noo YgkUGQwt+xgZTi78daxccQQshIIPXy324pkopN8r1jXZDChXeAKX7oUfHB/gpjVnFPUP HUvs8SDmm65Q97PnCw552S85y8CI3X0u63+S2BeDEQ08xPODjLiXzdbAY2bV+DYq+uhw H+Pj7/om958V/1H6UMEW5CzYKa4Y+go90TAFcfKp8SAAQ10whqljmGOwK6uuZH0eaba/ /kSbJIxkG7Y1z/l8IjZxSNKTlnV3a3B8BVjFzI8n062iPc8e/I9GWei60UDBaMT6Z6zO D+Bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=Ym8bk2djHTFvMcICEA5unUHh3z2W5J7DD0DkD41HCss=; b=Wl4hDImeak851X/ZApgDoGtT2bLtEnNmI4826wrbixOoURg0NTp391kCBrVgXHtpPe vXyegzz4j5NqAZVJv5b8FOMxarKi1OUMR3FvODu3bS94knmbvWHZl0woIkwp+SlDLiNV 3RIvcFMe+UW3s7JppByIfOowE0EIQKu4GDzZ8GJtDrsjRmlJwaZSpbLnukLg4z2Q8rEP xviWm9LSui/wqTydSfLUvavETP+rWlSiV68BCP0H41daPz5WVNIS8E8P5bhdSoSp7j/j 4raT7v+1KTu7e5/WAa4eX/OSuL/1FLbgJqTQ8C3HaPvKAxhDC+Q6twT0B7GoYT0jkWuJ PewA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yssCFdps; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id j20-20020a2e3c14000000b00295a583a20bsm1203975lja.74.2023.02.28.05.44.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:44:24 -0800 (PST) From: Konrad Dybcio Date: Tue, 28 Feb 2023 14:43:59 +0100 Subject: [PATCH v6 2/9] interconnect: qcom: rpm: Add support for specifying channel num MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v6-2-3c37a349656f@linaro.org> References: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> In-Reply-To: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677591861; l=2390; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=kQApzOtp5XG97FXu8eGnUnr0dwRtenzwoSY2YN1AJto=; b=dL+SU7TK7JpouJMAVZmIKPd5sVj0XEMsFR3zzjO4P0ucnyOJrqVbdeNqCraHKKVyFAgSkETy0TNl n5LZn4qrCNaunz97U8qioBs/Chv1/n4vkqUWnYZASsFJYarncO2e X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759082640150689407?= X-GMAIL-MSGID: =?utf-8?q?1759082640150689407?= Some nodes, like EBI0 (DDR) or L3/LLCC, may be connected over more than one channel. This should be taken into account in bandwidth calcualtion, as we're supposed to feed msmbus with the per-channel bandwidth. Add support for specifying that and use it during bandwidth aggregation. Reviewed-by: Bryan O'Donoghue Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 7 ++++++- drivers/interconnect/qcom/icc-rpm.h | 2 ++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index ffbeeca8c2b0..6bd20f62f8ed 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -317,6 +317,7 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, { struct icc_node *node; struct qcom_icc_node *qn; + u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; int i; /* Initialise aggregate values */ @@ -334,7 +335,11 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, list_for_each_entry(node, &provider->nodes, node_list) { qn = node->data; for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { - agg_avg[i] += qn->sum_avg[i]; + if (qn->channels) + sum_avg[i] = div_u64(qn->sum_avg[i], qn->channels); + else + sum_avg[i] = qn->sum_avg[i]; + agg_avg[i] += sum_avg[i]; agg_peak[i] = max_t(u64, agg_peak[i], qn->max_peak[i]); } } diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 8ba1918d7997..8aed5400afda 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -66,6 +66,7 @@ struct qcom_icc_qos { * @id: a unique node identifier * @links: an array of nodes where we can go next while traversing * @num_links: the total number of @links + * @channels: number of channels at this node (e.g. DDR channels) * @buswidth: width of the interconnect between a node and the bus (bytes) * @sum_avg: current sum aggregate value of all avg bw requests * @max_peak: current max aggregate value of all peak bw requests @@ -78,6 +79,7 @@ struct qcom_icc_node { u16 id; const u16 *links; u16 num_links; + u16 channels; u16 buswidth; u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; u64 max_peak[QCOM_ICC_NUM_BUCKETS]; From patchwork Tue Feb 28 13:44:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 62486 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp3020814wrd; Tue, 28 Feb 2023 05:45:46 -0800 (PST) X-Google-Smtp-Source: AK7set/UycZaEt0B2vW0KeCXKRrA4BomctPiBoSfOYLq1oTG1tPuW5hEyrVzgAYdmDoSGmiCVa9B X-Received: by 2002:a05:6402:615:b0:4af:5f4e:980d with SMTP id n21-20020a056402061500b004af5f4e980dmr3774900edv.26.1677591946509; Tue, 28 Feb 2023 05:45:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677591946; cv=none; d=google.com; s=arc-20160816; b=POftr86WbJqT5H3OdJUOFg4WQ66qWAQlsscPpe9zxwjm7kUVo7+nZJeZrzm8jQMTzE UyZOlDeJSGl4/KbwQr64e3ZRNCzmjmt0kkQ8UqlxgOpULnk9eDEK5j5nncwMVsAr5yXn 8T6iO24OmgLt8+VCWamhdjoE7XgQErO5zY6+IxM1JpnSVsMTkifpHe/0qmvlkc5vP1+l /Kv7YK6fdSL4z1dq66fHoTldZGL0TimaUQNnsnDD1HTkr3XJ/0YVw9AqGJMAyT8SYVBF Zjk3z1UUU18r5cwTlNq067AtI6YbxjojuPo1JMVxTb2tS0wIk6IydA5btzPb5F6gN0os wQmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=rV1fhlo3d+5jqHbCH3aEpZYk1ZijM8P8h8hsb2YwO9c=; b=gwYwMY69uGTbLhR9zWxtzp+hf0mTfNgoGfEqx8To+O2fJPPEbcIfljYLJFAKf8vNck atB0z3L0j7hvEX8otMksqU+oriG/xxLaHvVwwPQ+/zmmUPgnsZdC0q+P2UZNo2p08wAf 5ymaVSIJU+RBWatcgehOneX482mVkZfgb0fnkC9DjF4thjxop9yftWYyQ0fHCIkHGlzm oVE/H765LWXgSSvQ37IMXRvXL25/dxcIh/U3e7X4p7c1+Pxvk53GMUrTSptRgj7tHmjA y+aBFzWFEdnRyY/bbUoYren2PypZS7C8BYIevnCsUQcXbWCYLZ5KvSQssxGevKlJU5AE U5jA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="W7Sy/y2o"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 8aed5400afda..21f440beda86 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -23,12 +23,12 @@ enum qcom_icc_type { /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider - * @bus_clks: the clk_bulk_data table of bus clocks * @num_clks: the total number of clk_bulk_data entries * @type: the ICC provider type - * @qos_offset: offset to QoS registers * @regmap: regmap for QoS registers read/write access + * @qos_offset: offset to QoS registers * @bus_clk_rate: bus clock rate in Hz + * @bus_clks: the clk_bulk_data table of bus clocks */ struct qcom_icc_provider { struct icc_provider provider; From patchwork Tue Feb 28 13:44:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 62487 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp3020833wrd; Tue, 28 Feb 2023 05:45:48 -0800 (PST) X-Google-Smtp-Source: AK7set8Oa7+bEy2PQXFYXsyeIlwRYGAuN0+EAb1WNLlNxRYY30p6rEceoblUYGK0kz0eBv9gRL19 X-Received: by 2002:aa7:d286:0:b0:4af:7dff:7b8d with SMTP id w6-20020aa7d286000000b004af7dff7b8dmr3755080edq.17.1677591948677; Tue, 28 Feb 2023 05:45:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677591948; cv=none; d=google.com; s=arc-20160816; b=vLZOL9oHiyJguvureQ6aJdye0EWN0KTrVtHafGBDPtcabZzxIZXVOTS1ew9pkncW3o 2wW8GzBHfaz28ByoxJXcblE9LvNL/aWBnPnKp0NhHwUQ0SUcEBLW4gSVgoXEySPs9M3b lTk1an3YpBfYfoy8pFbkU9EV7TRtDx/YZkWElXkxQi/7ACKxqfhyDqZBOEvP7aoLORt2 7prY0hkJj0dy67VbZ6apMmqX8+up4ThKXbEbhIiDxEiYbKDd+0FK4CYcmtK6uJDN57CL ONOyzzdPWrwooV+kUxOjWL+E0D4RBk7hTQ0dzVIW4N0Sevlv13jzfbHFIV/clbUr+318 Skog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=trqKxHVgto91KGpmwfFi50FtfxdBe4Har0LKdE1pjhM=; b=KBdysJosmZTsSCWpkaMVbwF9FRKUq0PF1Z9ZruHc0ncpfxZqSZlBg2sv4/WjfiaRd2 zEnyKp98vEdf+kxg9YRhvXdz1geVt/D9zMXP3uBHCWgAIEWmOCOefAL80UYxwiTbxZAU Swja18bGwKcbgk59HuiLhzNJaopdUdPiwjBc711Fvi9/GxLO8J+Gzjh/Cxcrdn48hPAD ZsnFlb8tOAM0EozfhHeMD6IIkQq6FGNOtlU5jUFRO1ddkU06MKij9If4G4zs7POCoFRH JR6eVJDieslxy7DQgGWv0TWIcT5Edv7dBpWt9xtLZetkHacpo2DMOx1JpyCkDtu3tWP+ u68Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i2sizqKB; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id j20-20020a2e3c14000000b00295a583a20bsm1203975lja.74.2023.02.28.05.44.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:44:26 -0800 (PST) From: Konrad Dybcio Date: Tue, 28 Feb 2023 14:44:01 +0100 Subject: [PATCH v6 4/9] interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v6-4-3c37a349656f@linaro.org> References: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> In-Reply-To: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677591861; l=4029; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=TiHJ8feqrM/9/cy6G2m/OVSUoFJuDJvEz8WPJBFfHhE=; b=HwIC6HIHf6kcFSIifEsBPqXB+mPKzOtTqJVlZVN/Xw+ptMGS7rVE9RnNmlKKEi6ErlHIgicrmZP7 /jQzDgUiAKtMa8pHoDPpSBpvWMXcQdmZm8W3I9B8AL3/H/I7o/sB X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759082654924682573?= X-GMAIL-MSGID: =?utf-8?q?1759082654924682573?= Rename the "clocks" (and _names) fields of qcom_icc_desc to "bus_clocks" in preparation for introducing handling of clocks that need to be enabled but not voted on with aggregate frequency. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 6 +++--- drivers/interconnect/qcom/icc-rpm.h | 4 ++-- drivers/interconnect/qcom/msm8996.c | 12 ++++++------ drivers/interconnect/qcom/sdm660.c | 8 ++++---- 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 6bd20f62f8ed..7a54fe4ccadd 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -441,9 +441,9 @@ int qnoc_probe(struct platform_device *pdev) qnodes = desc->nodes; num_nodes = desc->num_nodes; - if (desc->num_clocks) { - cds = desc->clocks; - cd_num = desc->num_clocks; + if (desc->num_bus_clocks) { + cds = desc->bus_clocks; + cd_num = desc->num_bus_clocks; } else { cds = bus_clocks; cd_num = ARRAY_SIZE(bus_clocks); diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 21f440beda86..d6b4c56bf02c 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -91,8 +91,8 @@ struct qcom_icc_node { struct qcom_icc_desc { struct qcom_icc_node * const *nodes; size_t num_nodes; - const char * const *clocks; - size_t num_clocks; + const char * const *bus_clocks; + size_t num_bus_clocks; bool has_bus_pd; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 25a1a32bc611..69fc50a6fa5c 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -1821,8 +1821,8 @@ static const struct qcom_icc_desc msm8996_a0noc = { .type = QCOM_ICC_NOC, .nodes = a0noc_nodes, .num_nodes = ARRAY_SIZE(a0noc_nodes), - .clocks = bus_a0noc_clocks, - .num_clocks = ARRAY_SIZE(bus_a0noc_clocks), + .bus_clocks = bus_a0noc_clocks, + .num_bus_clocks = ARRAY_SIZE(bus_a0noc_clocks), .has_bus_pd = true, .regmap_cfg = &msm8996_a0noc_regmap_config }; @@ -1866,8 +1866,8 @@ static const struct qcom_icc_desc msm8996_a2noc = { .type = QCOM_ICC_NOC, .nodes = a2noc_nodes, .num_nodes = ARRAY_SIZE(a2noc_nodes), - .clocks = bus_a2noc_clocks, - .num_clocks = ARRAY_SIZE(bus_a2noc_clocks), + .bus_clocks = bus_a2noc_clocks, + .num_bus_clocks = ARRAY_SIZE(bus_a2noc_clocks), .regmap_cfg = &msm8996_a2noc_regmap_config }; @@ -2005,8 +2005,8 @@ static const struct qcom_icc_desc msm8996_mnoc = { .type = QCOM_ICC_NOC, .nodes = mnoc_nodes, .num_nodes = ARRAY_SIZE(mnoc_nodes), - .clocks = bus_mm_clocks, - .num_clocks = ARRAY_SIZE(bus_mm_clocks), + .bus_clocks = bus_mm_clocks, + .num_bus_clocks = ARRAY_SIZE(bus_mm_clocks), .regmap_cfg = &msm8996_mnoc_regmap_config }; diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 8d879b0bcabc..a22ba821efbf 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -1516,8 +1516,8 @@ static const struct qcom_icc_desc sdm660_a2noc = { .type = QCOM_ICC_NOC, .nodes = sdm660_a2noc_nodes, .num_nodes = ARRAY_SIZE(sdm660_a2noc_nodes), - .clocks = bus_a2noc_clocks, - .num_clocks = ARRAY_SIZE(bus_a2noc_clocks), + .bus_clocks = bus_a2noc_clocks, + .num_bus_clocks = ARRAY_SIZE(bus_a2noc_clocks), .regmap_cfg = &sdm660_a2noc_regmap_config, }; @@ -1659,8 +1659,8 @@ static const struct qcom_icc_desc sdm660_mnoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_mnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_mnoc_nodes), - .clocks = bus_mm_clocks, - .num_clocks = ARRAY_SIZE(bus_mm_clocks), + .bus_clocks = bus_mm_clocks, + .num_bus_clocks = ARRAY_SIZE(bus_mm_clocks), .regmap_cfg = &sdm660_mnoc_regmap_config, }; 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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id j20-20020a2e3c14000000b00295a583a20bsm1203975lja.74.2023.02.28.05.44.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:44:27 -0800 (PST) From: Konrad Dybcio Date: Tue, 28 Feb 2023 14:44:02 +0100 Subject: [PATCH v6 5/9] interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v6-5-3c37a349656f@linaro.org> References: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> In-Reply-To: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677591861; l=3438; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=7FqLtMqh4mIUzsD3NmcdtRjn6IINUaYjtwsFkF9J5aM=; b=7Ylg7yC4+IMm3JNEtAClcZSbAikiiS+uVO09S/eygmI37u8ZoedL4Gbyme9unThk4epjLNNvExw5 ducLfHzXCHrV9ONGaxyyslt7FUW1aPnAFLiTTY5neV6Dp//SuBRA X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759082715739487349?= X-GMAIL-MSGID: =?utf-8?q?1759082715739487349?= In preparation for handling non-scaling clocks that we still have to enable, rename num_clocks to more descriptive num_bus_clocks. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 14 +++++++------- drivers/interconnect/qcom/icc-rpm.h | 4 ++-- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 7a54fe4ccadd..f78c13e6c5ce 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -380,7 +380,7 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) return ret; } - for (i = 0; i < qp->num_clks; i++) { + for (i = 0; i < qp->num_bus_clks; i++) { /* * Use WAKE bucket for active clock, otherwise, use SLEEP bucket * for other clocks. If a platform doesn't set interconnect @@ -465,7 +465,7 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < cd_num; i++) qp->bus_clks[i].id = cds[i]; - qp->num_clks = cd_num; + qp->num_bus_clks = cd_num; qp->type = desc->type; qp->qos_offset = desc->qos_offset; @@ -495,11 +495,11 @@ int qnoc_probe(struct platform_device *pdev) } regmap_done: - ret = devm_clk_bulk_get_optional(dev, qp->num_clks, qp->bus_clks); + ret = devm_clk_bulk_get_optional(dev, qp->num_bus_clks, qp->bus_clks); if (ret) return ret; - ret = clk_bulk_prepare_enable(qp->num_clks, qp->bus_clks); + ret = clk_bulk_prepare_enable(qp->num_bus_clks, qp->bus_clks); if (ret) return ret; @@ -521,7 +521,7 @@ int qnoc_probe(struct platform_device *pdev) ret = icc_provider_add(provider); if (ret) { dev_err(dev, "error adding interconnect provider: %d\n", ret); - clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); + clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); return ret; } @@ -554,7 +554,7 @@ int qnoc_probe(struct platform_device *pdev) return 0; err: icc_nodes_remove(provider); - clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); + clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); icc_provider_del(provider); return ret; @@ -566,7 +566,7 @@ int qnoc_remove(struct platform_device *pdev) struct qcom_icc_provider *qp = platform_get_drvdata(pdev); icc_nodes_remove(&qp->provider); - clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); + clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); icc_provider_del(&qp->provider); return 0; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index d6b4c56bf02c..d4401f35f6d2 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -23,7 +23,7 @@ enum qcom_icc_type { /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider - * @num_clks: the total number of clk_bulk_data entries + * @num_bus_clks: the total number of bus_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access * @qos_offset: offset to QoS registers @@ -32,7 +32,7 @@ enum qcom_icc_type { */ struct qcom_icc_provider { struct icc_provider provider; - int num_clks; + int num_bus_clks; enum qcom_icc_type type; struct regmap *regmap; unsigned int qos_offset; From patchwork Tue Feb 28 13:44:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 62488 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp3021086wrd; Tue, 28 Feb 2023 05:46:27 -0800 (PST) X-Google-Smtp-Source: AK7set+ior3y+K7XP7YDs/qsdNvFwDWis8mLCOMDWQRUJt4IUWAEomzlcqMswqAmMX7xH2runWzB X-Received: by 2002:a17:906:bcf7:b0:89e:8c3d:bb87 with SMTP id op23-20020a170906bcf700b0089e8c3dbb87mr2819256ejb.71.1677591987637; Tue, 28 Feb 2023 05:46:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677591987; cv=none; d=google.com; s=arc-20160816; b=odua74/DIKS7CJAQ1vhwqkwhRU7hSHyAqRHWUiaz83rra9CXEzN5mcZ6C13mPd/Cwa Si5R2AGOMqgagAkm9IQprCFjTWfpJOw1yoT8d7WBamsqyQ8xMpRWOnK1S5mVAsKR9SdG MBfOImHW5u7f86E/Bks4nyg/5EsfvTaYHANDd7pibNB0FPGi+8HSiHXHDjba+fxZoARJ K2iMBedHGtk8DIH74hY1+z1hYjeRMBOIFRaDXE3T3R8apSlCK53iZ9F5eLv3ymGB5/9Z 9MkS61DggLO/439dyBsK6jSROB7abX68zO+BUpaqvA2VSUBK6i8JeEku5hF7LKMVMwHM Vgxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=Kl3xPTTugH2HWda/hWqIzHrROzcubvJx2Ov9R1VPGqc=; b=pXa/hcpMPXbhpyj+cgC5qZgLieMyG2zuOHdOwfYvGvf8XQfjfjokrc7qXdA5wz66/V U1fk0vViPfTZ81wP3wB7QRhJMzm/y2G5qKiEfN2Mpez+pxjrCUxC5e4Uzz0h1KricfTA yQmRD2m6jwxKB9iNT62AJmT0Q1qnut5ah64AVkkGg+8Ecf37vZtgFQ9QrLenmX0/lDiI 9+EzwHyxTAlCRbARX2EYk50EKk512YNxDhQC7uSFCAVRHHvKpZMPuHFw7NhS5yewhWzC xbNdjpnknAEh35GQlvmJk8PmajFxf+jjPZvEHZxNtG3+c66EM5V8PBxlfgyTiuv8jG0a 6jkQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=koV3jmLc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id j20-20020a2e3c14000000b00295a583a20bsm1203975lja.74.2023.02.28.05.44.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:44:29 -0800 (PST) From: Konrad Dybcio Date: Tue, 28 Feb 2023 14:44:03 +0100 Subject: [PATCH v6 6/9] interconnect: qcom: rpm: Handle interface clocks MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v6-6-3c37a349656f@linaro.org> References: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> In-Reply-To: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677591861; l=8925; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=L4u+hFUnCjmxDTWKQ4WhN9CYhHCxEeDAU+yitlO2+xI=; b=b9N8698oXVrxUCTyMYJJbSjljny25hxwRHQIjwuyXCWhv7rInGbdzNq1sRMeTIQRWBR5joOhIEN0 c6uKuAT6DY8xqgYxsKS1pwUdk4WmvP1qSWxmC4+XuGwjTQl7/dty X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759082696064452886?= X-GMAIL-MSGID: =?utf-8?q?1759082696064452886?= Some (but not all) providers (or their specific nodes) require specific clocks to be turned on before they can be accessed. Failure to ensure that results in a seemingly random system crash (which would usually happen at boot with the interconnect driver built-in), resulting in the platform not booting up properly. Limit the number of bus_clocks to 2 (which is the maximum that SMD RPM interconnect supports anyway) and handle non-scaling clocks separately. Update MSM8996 and SDM660 drivers to make sure they do not regress with this change. This unfortunately has to be done in one patch to prevent either compile errors or broken bisect. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 52 ++++++++++++++++++++++++++++++------- drivers/interconnect/qcom/icc-rpm.h | 14 ++++++++-- drivers/interconnect/qcom/msm8996.c | 22 +++++++--------- drivers/interconnect/qcom/sdm660.c | 16 +++++------- 4 files changed, 70 insertions(+), 34 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index f78c13e6c5ce..446f6df9bc98 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -369,6 +369,17 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) qcom_icc_bus_aggregate(provider, agg_avg, agg_peak, &max_agg_avg); + /* If we're powering on the bus, ensure the necessary clocks are on */ + if (unlikely(!qp->is_on)) { + if (agg_peak[0] || agg_peak[1] || max_agg_avg) { + /* If this fails, bus accesses will crash the platform! */ + ret = clk_bulk_prepare_enable(qp->num_intf_clks, qp->intf_clks); + if (ret) + return ret; + qp->is_on = true; + } + } + sum_bw = icc_units_to_bps(max_agg_avg); ret = __qcom_icc_set(src, src_qn, sum_bw); @@ -409,6 +420,14 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) qp->bus_clk_rate[i] = rate; } + /* Turn off the interface clocks if the bus was shut down so as not to leak power */ + if (!qp->bus_clk_rate[0] && !qp->bus_clk_rate[1]) { + if (!agg_peak[0] && !agg_peak[1] && !max_agg_avg) { + clk_bulk_disable_unprepare(qp->num_intf_clks, qp->intf_clks); + qp->is_on = false; + } + } + return 0; } @@ -441,21 +460,20 @@ int qnoc_probe(struct platform_device *pdev) qnodes = desc->nodes; num_nodes = desc->num_nodes; - if (desc->num_bus_clocks) { - cds = desc->bus_clocks; - cd_num = desc->num_bus_clocks; + if (desc->num_intf_clocks) { + cds = desc->intf_clocks; + cd_num = desc->num_intf_clocks; } else { - cds = bus_clocks; - cd_num = ARRAY_SIZE(bus_clocks); + /* 0 intf clocks is perfectly fine */ + cd_num = 0; } - qp = devm_kzalloc(dev, struct_size(qp, bus_clks, cd_num), GFP_KERNEL); + qp = devm_kzalloc(dev, sizeof(*qp), GFP_KERNEL); if (!qp) return -ENOMEM; - qp->bus_clk_rate = devm_kcalloc(dev, cd_num, sizeof(*qp->bus_clk_rate), - GFP_KERNEL); - if (!qp->bus_clk_rate) + qp->intf_clks = devm_kzalloc(dev, sizeof(qp->intf_clks), GFP_KERNEL); + if (!qp->intf_clks) return -ENOMEM; data = devm_kzalloc(dev, struct_size(data, nodes, num_nodes), @@ -463,6 +481,18 @@ int qnoc_probe(struct platform_device *pdev) if (!data) return -ENOMEM; + qp->num_intf_clks = cd_num; + for (i = 0; i < cd_num; i++) + qp->intf_clks[i].id = cds[i]; + + if (desc->num_bus_clocks) { + cds = desc->bus_clocks; + cd_num = desc->num_bus_clocks; + } else { + cds = bus_clocks; + cd_num = ARRAY_SIZE(bus_clocks); + } + for (i = 0; i < cd_num; i++) qp->bus_clks[i].id = cds[i]; qp->num_bus_clks = cd_num; @@ -503,6 +533,10 @@ int qnoc_probe(struct platform_device *pdev) if (ret) return ret; + ret = devm_clk_bulk_get(dev, qp->num_intf_clks, qp->intf_clks); + if (ret) + return ret; + if (desc->has_bus_pd) { ret = dev_pm_domain_attach(dev, true); if (ret) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index d4401f35f6d2..a4ef45b4a9e0 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -20,24 +20,32 @@ enum qcom_icc_type { QCOM_ICC_QNOC, }; +#define NUM_BUS_CLKS 2 + /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider * @num_bus_clks: the total number of bus_clks clk_bulk_data entries + * @num_intf_clks: the total number of intf_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access * @qos_offset: offset to QoS registers * @bus_clk_rate: bus clock rate in Hz * @bus_clks: the clk_bulk_data table of bus clocks + * @intf_clks: a clk_bulk_data array of interface clocks + * @is_on: whether the bus is powered on */ struct qcom_icc_provider { struct icc_provider provider; int num_bus_clks; + int num_intf_clks; enum qcom_icc_type type; struct regmap *regmap; unsigned int qos_offset; - u64 *bus_clk_rate; - struct clk_bulk_data bus_clks[]; + u64 bus_clk_rate[NUM_BUS_CLKS]; + struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; + struct clk_bulk_data *intf_clks; + bool is_on; }; /** @@ -93,6 +101,8 @@ struct qcom_icc_desc { size_t num_nodes; const char * const *bus_clocks; size_t num_bus_clocks; + const char * const *intf_clocks; + size_t num_intf_clocks; bool has_bus_pd; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 69fc50a6fa5c..1a5e0ad36cc4 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -21,21 +21,17 @@ #include "smd-rpm.h" #include "msm8996.h" -static const char * const bus_mm_clocks[] = { - "bus", - "bus_a", +static const char * const mm_intf_clocks[] = { "iface" }; -static const char * const bus_a0noc_clocks[] = { +static const char * const a0noc_intf_clocks[] = { "aggre0_snoc_axi", "aggre0_cnoc_ahb", "aggre0_noc_mpu_cfg" }; -static const char * const bus_a2noc_clocks[] = { - "bus", - "bus_a", +static const char * const a2noc_intf_clocks[] = { "aggre2_ufs_axi", "ufs_axi" }; @@ -1821,8 +1817,8 @@ static const struct qcom_icc_desc msm8996_a0noc = { .type = QCOM_ICC_NOC, .nodes = a0noc_nodes, .num_nodes = ARRAY_SIZE(a0noc_nodes), - .bus_clocks = bus_a0noc_clocks, - .num_bus_clocks = ARRAY_SIZE(bus_a0noc_clocks), + .intf_clocks = a0noc_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(a0noc_intf_clocks), .has_bus_pd = true, .regmap_cfg = &msm8996_a0noc_regmap_config }; @@ -1866,8 +1862,8 @@ static const struct qcom_icc_desc msm8996_a2noc = { .type = QCOM_ICC_NOC, .nodes = a2noc_nodes, .num_nodes = ARRAY_SIZE(a2noc_nodes), - .bus_clocks = bus_a2noc_clocks, - .num_bus_clocks = ARRAY_SIZE(bus_a2noc_clocks), + .intf_clocks = a2noc_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks), .regmap_cfg = &msm8996_a2noc_regmap_config }; @@ -2005,8 +2001,8 @@ static const struct qcom_icc_desc msm8996_mnoc = { .type = QCOM_ICC_NOC, .nodes = mnoc_nodes, .num_nodes = ARRAY_SIZE(mnoc_nodes), - .bus_clocks = bus_mm_clocks, - .num_bus_clocks = ARRAY_SIZE(bus_mm_clocks), + .intf_clocks = mm_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), .regmap_cfg = &msm8996_mnoc_regmap_config }; diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index a22ba821efbf..0e8a96f4ce90 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -127,15 +127,11 @@ enum { SDM660_SNOC, }; -static const char * const bus_mm_clocks[] = { - "bus", - "bus_a", +static const char * const mm_intf_clocks[] = { "iface", }; -static const char * const bus_a2noc_clocks[] = { - "bus", - "bus_a", +static const char * const a2noc_intf_clocks[] = { "ipa", "ufs_axi", "aggre2_ufs_axi", @@ -1516,8 +1512,8 @@ static const struct qcom_icc_desc sdm660_a2noc = { .type = QCOM_ICC_NOC, .nodes = sdm660_a2noc_nodes, .num_nodes = ARRAY_SIZE(sdm660_a2noc_nodes), - .bus_clocks = bus_a2noc_clocks, - .num_bus_clocks = ARRAY_SIZE(bus_a2noc_clocks), + .intf_clocks = a2noc_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks), .regmap_cfg = &sdm660_a2noc_regmap_config, }; @@ -1659,8 +1655,8 @@ static const struct qcom_icc_desc sdm660_mnoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_mnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_mnoc_nodes), - .bus_clocks = bus_mm_clocks, - .num_bus_clocks = ARRAY_SIZE(bus_mm_clocks), + .intf_clocks = mm_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), .regmap_cfg = &sdm660_mnoc_regmap_config, }; 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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id j20-20020a2e3c14000000b00295a583a20bsm1203975lja.74.2023.02.28.05.44.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:44:30 -0800 (PST) From: Konrad Dybcio Date: Tue, 28 Feb 2023 14:44:04 +0100 Subject: [PATCH v6 7/9] interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v6-7-3c37a349656f@linaro.org> References: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> In-Reply-To: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677591861; l=3956; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=j9XF4WxaLfGj9Ej6rkDHnjJlz9ADRRyGeXxkSRrXYCQ=; b=M35JcJbA4z7xVPt78oyUt8q1B96IPmZiN7M3R/pvpsHCHr4+uzvAmsdDhA2yk+jvIkg71yk3//ph jUAuZfHqABAngnnLpshAN45cGAeUqMNWoq/wICZzASvAitTUv4fD X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759082722861387775?= X-GMAIL-MSGID: =?utf-8?q?1759082722861387775?= For SMD RPM bus scaling to work, we need a pair of sleep-wake clocks. The variable number of them we previously supported was only a hack to keep the clocks required for QoS register access, but now that these are separated, we can leave bus_clks to the actual bus clocks. In cases where there is no actual bus scaling (such as A0NoC on MSM8996 and GNoC on SDM660 where the HLOS is only supposed to program the QoS registers and the bus is either static or controlled remotely), allow for no clock scaling with a boolean property. Remove all the code related to allowing an arbitrary number of bus_clks, replace the number by BUS_CLK_MAX (= 2) and guard the bus clock paths to ensure they are not taken on non-scaling buses. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 14 +++----------- drivers/interconnect/qcom/icc-rpm.h | 4 ++-- drivers/interconnect/qcom/msm8996.c | 1 + drivers/interconnect/qcom/sdm660.c | 1 + 4 files changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 446f6df9bc98..48eb4394b84e 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -485,17 +485,9 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < cd_num; i++) qp->intf_clks[i].id = cds[i]; - if (desc->num_bus_clocks) { - cds = desc->bus_clocks; - cd_num = desc->num_bus_clocks; - } else { - cds = bus_clocks; - cd_num = ARRAY_SIZE(bus_clocks); - } - - for (i = 0; i < cd_num; i++) - qp->bus_clks[i].id = cds[i]; - qp->num_bus_clks = cd_num; + qp->num_bus_clks = desc->no_clk_scaling ? 0 : NUM_BUS_CLKS; + for (i = 0; i < qp->num_bus_clks; i++) + qp->bus_clks[i].id = bus_clocks[i]; qp->type = desc->type; qp->qos_offset = desc->qos_offset; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index a4ef45b4a9e0..3cddff44b4ef 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -25,7 +25,7 @@ enum qcom_icc_type { /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider - * @num_bus_clks: the total number of bus_clks clk_bulk_data entries + * @num_bus_clks: the total number of bus_clks clk_bulk_data entries (0 or 2) * @num_intf_clks: the total number of intf_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access @@ -100,10 +100,10 @@ struct qcom_icc_desc { struct qcom_icc_node * const *nodes; size_t num_nodes; const char * const *bus_clocks; - size_t num_bus_clocks; const char * const *intf_clocks; size_t num_intf_clocks; bool has_bus_pd; + bool no_clk_scaling; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; unsigned int qos_offset; diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 1a5e0ad36cc4..347fe59ec293 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -1820,6 +1820,7 @@ static const struct qcom_icc_desc msm8996_a0noc = { .intf_clocks = a0noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a0noc_intf_clocks), .has_bus_pd = true, + .no_clk_scaling = true, .regmap_cfg = &msm8996_a0noc_regmap_config }; diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 0e8a96f4ce90..7ffaf70d62d3 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -1616,6 +1616,7 @@ static const struct qcom_icc_desc sdm660_gnoc = { .nodes = sdm660_gnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_gnoc_nodes), .regmap_cfg = &sdm660_gnoc_regmap_config, + .no_clk_scaling = true, }; static struct qcom_icc_node * const sdm660_mnoc_nodes[] = { From patchwork Tue Feb 28 13:44:05 2023 Content-Type: text/plain; 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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id j20-20020a2e3c14000000b00295a583a20bsm1203975lja.74.2023.02.28.05.44.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:44:31 -0800 (PST) From: Konrad Dybcio Date: Tue, 28 Feb 2023 14:44:05 +0100 Subject: [PATCH v6 8/9] interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v6-8-3c37a349656f@linaro.org> References: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> In-Reply-To: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677591861; l=1105; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Trwtp2UuhUI4fi7Cq6Zwq0fwVJM3gAyEwBU7IiWKQN0=; b=vT4iRKkPmPZTOxukV1H7aZoMisskXyxQ5Umd/5Gwko7beejzqOY3tg7ko07CqrbGLPx9NUWWuRUr KC9l5pcJDKn5QubaimNr6SkAqeopFK3yme5C+lflb0Yg3GjT1tc4 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759082788943036862?= X-GMAIL-MSGID: =?utf-8?q?1759082788943036862?= Commit dd42ec8ea5b9 ("interconnect: qcom: rpm: Use _optional func for provider clocks") relaxed the requirements around probing bus clocks. This was a decent solution for making sure MSM8996 would still boot with old DTs, but now that there's a proper fix in place that both old and new DTs will be happy about, revert back to the safer variant of the function. Fixes: dd42ec8ea5b9 ("interconnect: qcom: rpm: Use _optional func for provider clocks") Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 48eb4394b84e..77346a2ab82b 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -517,7 +517,7 @@ int qnoc_probe(struct platform_device *pdev) } regmap_done: - ret = devm_clk_bulk_get_optional(dev, qp->num_bus_clks, qp->bus_clks); + ret = devm_clk_bulk_get(dev, qp->num_bus_clks, qp->bus_clks); if (ret) return ret; From patchwork Tue Feb 28 13:44:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 62494 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp3022170wrd; Tue, 28 Feb 2023 05:48:49 -0800 (PST) X-Google-Smtp-Source: AK7set/vYMddhZ66yZSEPee/Dd2h5r8ZHrQwxQpxXxQri5KrSzdWXriuYaXsXhm2G5QYvex9lxJC X-Received: by 2002:a05:6402:345:b0:4ae:e5ab:46d7 with SMTP id r5-20020a056402034500b004aee5ab46d7mr3128015edw.8.1677592129031; Tue, 28 Feb 2023 05:48:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677592129; cv=none; d=google.com; s=arc-20160816; b=gfEyXz2TBVNeUBQLQPh7PBmpZsnc6oPrmjNmuJXGBezU6HM4meRenso7eZaRiA1Dps aqLZfv7xko5zaQAAfaNrX7Ruit4zJMZ4JdTUvfjs1c0jetwf2i0v+leYjuUdD+5eotgT bNoZErZDwGYlRycKtkJshFRMqtcVVdi6HqQy79MA/xK/BLXQHVvmJQrjRdU/Xl7+f7wb qBmyt0WQS8iJvhOoZUFjEY9i7jDPRSfzr/QZnUScLV+4hNSEm+xk1BhWlPL2mcQTV6dT HyP0r6BBD5ON1crVyh+a1XZASTRLuZngQc+YYpFDAi04LleuJZZv6viBwn77PrEDkfHz BROw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=vveGd9sf9fGz7xfjIX4ynPRPTvQaFdGwhHtakqOTRYg=; b=oW4NYJrVpJuxfOi+qP1lglcXWZcjq7FbsjzR63MQSg0A9NOM8SmPnzhxD8WBWyhm7T 1R4oPL6OcZUURbwjNxus8ew6J+1SaiPp8AqR7X5KbU8+6q+LcxbCG9IROMJESCsccmUj domj4ZI8ZfoA+bKXJJQG4cSluabAr74XntG51mUC+qKwtSQWVpfVDmsU6qVeMNSAT6UH G3rH2MubfouEQ8fOMYNAwPamROdUAvxVeYcS+94qgWRP1cmWvLs8iAK41xJC8tpnSsIr VRYEjUOczjVPlwJfjUarC9wdgUTPA/vAj4/ms+MHPcSIvQh0k8MI5PgkU+6rvYJUTo2M agoA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="VLXw8x/H"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id j20-20020a2e3c14000000b00295a583a20bsm1203975lja.74.2023.02.28.05.44.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:44:32 -0800 (PST) From: Konrad Dybcio Date: Tue, 28 Feb 2023 14:44:06 +0100 Subject: [PATCH v6 9/9] interconnect: qcom: msm8996: Promote to core_initcall MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v6-9-3c37a349656f@linaro.org> References: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> In-Reply-To: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677591861; l=1279; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=5H1KJ2r/pG170nOV3v3bsq3JNwWcNEZN04iD5DDB2kw=; b=yLfZUq5Z5xp1LtHleRTEckj0GMI3jzrt+GgHuw7jqq6epsR/JDBZ7/xLzu+YM7S7gah/Xn53SHWj OuJtKAZHBxh/lb5Uh3LGOzCaGd3xbVcn5ijbSbrKBi1QLMJaEP7c X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759082844227928024?= X-GMAIL-MSGID: =?utf-8?q?1759082844227928024?= The interconnect driver is (or soon will be) vital to many other devices, as it's not a given that the bootloader will set up enough bandwidth for us or that the values we come into are reasonable. Promote the driver to core_initcall to ensure the consumers (i.e. most "meaningful" parts of the SoC) can probe without deferrals. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/msm8996.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 347fe59ec293..1eb51ed18b0b 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -2109,7 +2109,17 @@ static struct platform_driver qnoc_driver = { .sync_state = icc_sync_state, } }; -module_platform_driver(qnoc_driver); +static int __init qnoc_driver_init(void) +{ + return platform_driver_register(&qnoc_driver); +} +core_initcall(qnoc_driver_init); + +static void __exit qnoc_driver_exit(void) +{ + platform_driver_unregister(&qnoc_driver); +} +module_exit(qnoc_driver_exit); MODULE_AUTHOR("Yassine Oudjana "); MODULE_DESCRIPTION("Qualcomm MSM8996 NoC driver");