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[8.43.85.97]) by mx.google.com with ESMTPS id h25-20020a50ed99000000b004af64997fb7si11190593edr.18.2023.02.28.01.25.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 01:25:23 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@oss-cipunited-com.20200927.dkim.feishu.cn header.s=s1 header.b=vNEV4peL; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C76ED38582BE for ; Tue, 28 Feb 2023 09:25:18 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from t03.bc.larksuite.com (t03.bc.larksuite.com [209.127.231.37]) by sourceware.org (Postfix) with UTF8SMTPS id 1B0BD3858D33 for ; Tue, 28 Feb 2023 09:24:53 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 1B0BD3858D33 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=oss.cipunited.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=oss.cipunited.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=s1; d=oss-cipunited-com.20200927.dkim.feishu.cn; t=1677576284; h=from:subject:mime-version:from:date:message-id:subject:to:cc: reply-to:content-type:mime-version:in-reply-to:message-id; bh=AocMbCyyLGhXNmubt9eiIv8hn6TAhhM/C4RQQwGaXGY=; b=vNEV4peLqunlzc0BgrkntHf8sGu89fR+EcdYCMMWcghJjzy5tteg6kZfVW8BufzwLPOVZN JKRio4/MfjMvNHzCzC/tuq9DFNuDDpi8+B8GXROgdaphCR3RuSGSytQs3zxoGYCUt+ZLxi 4wwW0h+7DA1bVlsl4E5MBnPxkgUi9xnhEEawik+yyB6LRq3+rsXELo/cLgYw+6vIuaw9zL Acaqinn9UrhogyTgcgIF2pw4iOiWtk0ZdYly2YPqniGEFzXP+nTE/FT/7uZKMLXm5X3C4v XObl7ijY+LN0mOZ82uYTcYo8P0BUZGkv0WaKK55brVwkPTycXq9rT9OPYM3/lQ== To: Cc: , "Junxian Zhu" From: "Junxian Zhu" Mime-Version: 1.0 X-Original-From: "Junxian Zhu" Subject: [PATCH v2] MIPS: Add buildtime option to set msa default Date: Tue, 28 Feb 2023 17:24:34 +0800 Message-Id: <20230228092332.222487-1-zhujunxian@oss.cipunited.com> X-Lms-Return-Path: X-Mailer: git-send-email 2.39.2 X-Spam-Status: No, score=-13.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, HTML_MESSAGE, HTML_NONELEMENT_30_40, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-Content-Filtered-By: Mailman/MimeDel 2.1.29 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759047942155311787?= X-GMAIL-MSGID: =?utf-8?q?1759066270162764192?= From: Junxian Zhu Add buildtime option to decide whether will compiler build with `-mmsa` option default. gcc/ChangeLog: * config.gcc: add -with-{no-}msa build option. * config/mips/mips.h: Likewise. * doc/install.texi: Likewise. Signed-off-by: Junxian Zhu --- gcc/config.gcc | 19 +++++++++++++++++-- gcc/config/mips/mips.h | 3 ++- gcc/doc/install.texi | 8 ++++++++ 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/gcc/config.gcc b/gcc/config.gcc index c070e6ecd2e..da3a6d3ba1f 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -4709,7 +4709,7 @@ case "${target}" in ;; mips*-*-*) - supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1 madd4 compact-branches" + supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1 madd4 compact-branches msa" case ${with_float} in "" | soft | hard) @@ -4871,6 +4871,21 @@ case "${target}" in exit 1 ;; esac + + case ${with_msa} in + yes) + with_msa=msa + ;; + no) + with_msa=no-msa + ;; + "") + ;; + *) + echo "Unknown msa type used in --with-msa" 1>&2 + exit 1 + ;; + esac ;; loongarch*-*-*) @@ -5815,7 +5830,7 @@ case ${target} in esac t= -all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4 isa_spec compact-branches" +all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4 isa_spec compact-branches msa" for option in $all_defaults do eval "val=\$with_"`echo $option | sed s/-/_/g` diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index fbb4372864f..13bc193b752 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -916,7 +916,8 @@ struct mips_cpu_info { {"synci", "%{!msynci:%{!mno-synci:-m%(VALUE)}}" }, \ {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" }, \ {"madd4", "%{!mmadd4:%{!mno-madd4:-m%(VALUE)}}" }, \ - {"compact-branches", "%{!mcompact-branches=*:-mcompact-branches=%(VALUE)}" } \ + {"compact-branches", "%{!mcompact-branches=*:-mcompact-branches=%(VALUE)}" }, \ + {"msa", "%{!mmsa:%{!mno-msa:-m%(VALUE)}}" } \ /* A spec that infers the: -mnan=2008 setting from a -mips argument, diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 8ef5c1414da..718f48fbaeb 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -1653,6 +1653,14 @@ unfused is normally expected). Disabling these instructions is the only way to ensure compatible code is generated; this will incur a performance penalty. +@item --with-msa +On MIPS targets, make @option{-mmsa} the default when no +@option{-mno-msa} option is passed. + +@item --without-msa +On MIPS targets, make @option{-mno-msa} the default when no +@option{-mmsa} option is passed. This is the default. + @item --with-mips-plt On MIPS targets, make use of copy relocations and PLTs. These features are extensions to the traditional