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[66.187.233.206]) by smtp.gmail.com with ESMTPSA id a24-20020ac87218000000b003bfa66b7484sm6184056qtp.35.2023.02.24.08.06.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 08:06:44 -0800 (PST) From: Tom Rix To: alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, tao.zhou1@amd.com, Hawking.Zhang@amd.com, candice.li@amd.com, Stanley.Yang@amd.com, YiPeng.Chai@amd.com Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Tom Rix Subject: [PATCH] drm/amdgpu: remove unused variable channel_index Date: Fri, 24 Feb 2023 11:06:40 -0500 Message-Id: <20230224160640.1577429-1-trix@redhat.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758730454528526339?= X-GMAIL-MSGID: =?utf-8?q?1758730454528526339?= building with gcc and W=1 reports drivers/gpu/drm/amd/amdgpu/umc_v8_10.c:437:37: error: variable ‘channel_index’ set but not used [-Werror=unused-but-set-variable] 437 | uint32_t eccinfo_table_idx, channel_index; | ^~~~~~~~~~~~~ channel_index is not used so remove it. Signed-off-by: Tom Rix --- drivers/gpu/drm/amd/amdgpu/umc_v8_10.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v8_10.c b/drivers/gpu/drm/amd/amdgpu/umc_v8_10.c index 66158219f791..3f051dec56e9 100644 --- a/drivers/gpu/drm/amd/amdgpu/umc_v8_10.c +++ b/drivers/gpu/drm/amd/amdgpu/umc_v8_10.c @@ -434,7 +434,7 @@ static void umc_v8_10_ecc_info_query_error_address(struct amdgpu_device *adev, uint32_t umc_inst, uint32_t node_inst) { - uint32_t eccinfo_table_idx, channel_index; + uint32_t eccinfo_table_idx; uint64_t mc_umc_status, err_addr; struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); @@ -443,11 +443,6 @@ static void umc_v8_10_ecc_info_query_error_address(struct amdgpu_device *adev, adev->umc.channel_inst_num + umc_inst * adev->umc.channel_inst_num + ch_inst; - channel_index = - adev->umc.channel_idx_tbl[node_inst * adev->umc.umc_inst_num * - adev->umc.channel_inst_num + - umc_inst * adev->umc.channel_inst_num + - ch_inst]; mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;