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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id i19-20020a056512007300b004dd7fefd2c8sm524046lfo.242.2023.02.24.05.08.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 05:08:01 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Sebastian Reichel , Stephan Gerhold , Luca Weiss , Iskren Chernev , Conor Dooley , Chanho Park , Lorenzo Pieralisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: arm: Add Cortex-A78C and X1C Date: Fri, 24 Feb 2023 14:07:57 +0100 Message-Id: <20230224130759.45579-1-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758719413845663915?= X-GMAIL-MSGID: =?utf-8?q?1758719413845663915?= Add compatibles for the Cortex-A78C and X1C cores found in some recent flagship designs. Signed-off-by: Konrad Dybcio Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index c145f6a035ee..a9bbe2b74b5d 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -139,6 +139,7 @@ properties: - arm,cortex-a77 - arm,cortex-a78 - arm,cortex-a78ae + - arm,cortex-a78c - arm,cortex-a510 - arm,cortex-a710 - arm,cortex-a715 @@ -151,6 +152,7 @@ properties: - arm,cortex-r5 - arm,cortex-r7 - arm,cortex-x1 + - arm,cortex-x1c - arm,cortex-x2 - arm,cortex-x3 - arm,neoverse-e1 From patchwork Fri Feb 24 13:07:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 61314 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp909448wrd; Fri, 24 Feb 2023 05:35:42 -0800 (PST) X-Google-Smtp-Source: AK7set9tQyyF5O/KvwGMRlTzxpSt22Os09jhf0k3LnI0914kYRWiI8ob/Hm+KCD0yTMAmofzPRc+ X-Received: by 2002:a17:902:da91:b0:19a:7b43:c03c with SMTP id j17-20020a170902da9100b0019a7b43c03cmr20727361plx.42.1677245742228; Fri, 24 Feb 2023 05:35:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677245742; cv=none; d=google.com; s=arc-20160816; b=Cz8oQQPWirZxItA+jURjygcd+LjXBtVwb2EYmBTC8eVh4sooclwSUZ3efeqM0JhOqs RvYWAs0AnfcE66wsHSECG0GyVAd+tghjo6jFkL3ELDI+tkP5ZUdL0z3KHWuHCV48EJ+I XAb+adR18W0dvusMWX6m5u+jwQ5xXxFV8CwCqE0islUA+mDQ9QGQcebGiEqNziS+JAQ9 pu2dBeKDDy5gh2qB5HiQ1PFPfyZHzG2Y7VwVUmwzKMGqNp7NaOG3Lm1qZC7vNbnVHTp9 mYtuZ2CRulj9m+GyW3J8+5e+AdMOmULPu/yGX24QFNSYjUgY+87qzcsQs5zXQhT5uQ/V qPEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EPreAIsPBs0vo9Qsm+CM5kGjxjzbL2RRreZgJMx8oPk=; b=BGBOoeXNrjZ3nFiQ/rsqvpu+ar1R/HbYynmfhDCDDFOGkrMI9auohQ1U0FQZaFbV2i KRl2WlAig53v3/aqMnNfasQ1IhZbdwwl6BEESSLcv1WSMpCD3JvU1wP5npYcsApNgFYC J8lyOrVMXqpYNYQde3P4rsyd1Xd5Vd8l2xRTrpBBwP8+i7ZskqSruncaJo1qHOY754VV IHF7IABXlrHM3lvsPYjfCdrjGLYS+5Gyqf9R7dUNfbG8/vTpWH3E33uozTr2uvGntsZd MYv2+4oZAHOV9UbiAD1f8sV6xtCi7t5DSgyTe9nP6D1RV9NCpaJpbwp5ByDiuvuxLeEE YpMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cJdEzQNd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id i19-20020a056512007300b004dd7fefd2c8sm524046lfo.242.2023.02.24.05.08.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 05:08:03 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Sebastian Reichel , Stephan Gerhold , Luca Weiss , Iskren Chernev , Conor Dooley , Chanho Park , Lorenzo Pieralisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] arm64: dts: qcom: sc8280xp: Use correct CPU compatibles Date: Fri, 24 Feb 2023 14:07:58 +0100 Message-Id: <20230224130759.45579-2-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230224130759.45579-1-konrad.dybcio@linaro.org> References: <20230224130759.45579-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758719631599855695?= X-GMAIL-MSGID: =?utf-8?q?1758719631599855695?= Cores 0-3 are CA78C r0p0, cores 4-7 are CX1C r0p0. Use the correct compatibles instead of the placeholder qcom,kryo. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 0d02599d8867..9c186ba55cdc 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -43,7 +43,7 @@ cpus { CPU0: cpu@0 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a78c"; reg = <0x0 0x0>; enable-method = "psci"; capacity-dmips-mhz = <602>; @@ -67,7 +67,7 @@ L3_0: l3-cache { CPU1: cpu@100 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a78c"; reg = <0x0 0x100>; enable-method = "psci"; capacity-dmips-mhz = <602>; @@ -87,7 +87,7 @@ L2_100: l2-cache { CPU2: cpu@200 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a78c"; reg = <0x0 0x200>; enable-method = "psci"; capacity-dmips-mhz = <602>; @@ -107,7 +107,7 @@ L2_200: l2-cache { CPU3: cpu@300 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a78c"; reg = <0x0 0x300>; enable-method = "psci"; capacity-dmips-mhz = <602>; @@ -127,7 +127,7 @@ L2_300: l2-cache { CPU4: cpu@400 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-x1c"; reg = <0x0 0x400>; enable-method = "psci"; capacity-dmips-mhz = <1024>; @@ -147,7 +147,7 @@ L2_400: l2-cache { CPU5: cpu@500 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-x1c"; reg = <0x0 0x500>; enable-method = "psci"; capacity-dmips-mhz = <1024>; @@ -167,7 +167,7 @@ L2_500: l2-cache { CPU6: cpu@600 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-x1c"; reg = <0x0 0x600>; enable-method = "psci"; capacity-dmips-mhz = <1024>; @@ -187,7 +187,7 @@ L2_600: l2-cache { CPU7: cpu@700 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-x1c"; reg = <0x0 0x700>; enable-method = "psci"; capacity-dmips-mhz = <1024>;