From patchwork Thu Feb 23 16:26:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Yarlagadda X-Patchwork-Id: 61031 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp403863wrd; Thu, 23 Feb 2023 08:28:50 -0800 (PST) X-Google-Smtp-Source: AK7set/rAXb9RR8bDoOiYad+Et8kduzI6M0PuixsxmjbVA9MgtlKwPuX0wK2fin0F0C8KZEI7vVA X-Received: by 2002:a17:906:7394:b0:8b1:2614:dea6 with SMTP id f20-20020a170906739400b008b12614dea6mr18734153ejl.1.1677169730651; Thu, 23 Feb 2023 08:28:50 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1677169730; cv=pass; d=google.com; s=arc-20160816; b=CqP2tGWUyKyj5RB9FwdxGa23sGWTH+y3Qr3SbAdxjxreq7Wvy5l7zNyWhCNMgQe6Vf N3XWOacI3+h6Rc+88SNatBzVdPuRmoilxjNqg3QrJ1v6rYIuTKhqrnirgBpw0QEmVgAs zFrMkgLmfMyhwed+HudftTUQw9hZ35ne4pfwdQHC1XPk9ipyNukv0ui1XVAp7jaj7xkk 20qreWWuWLQHx3ZX3OJr+6M7/gEHqiL9E7WEodBv7E/0cHngDW6IpXH4HL3wINcurA5l EoRdsdrQg6lq7hOBwvf81IzbsGJBgCEq/CtP4eVsr+RCC3S8HmNPeNi5fFluVjoYcXdn 8dlw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=OyYLYUH4QzLSiwA6Ej8cpIX1gGW7clql9i1HxVB+TMQ=; b=ABkQ+nICExf0gkJnCZnhGylkJcqdbDVa82DSVL1VO4AVqNyAoNvvm3RuG+Glk6k5sD Q9HYdH/t2aP1e7ZhByc67o4bHMFmGLdKNFiP34gt0Oo8sopcmdFv61TTMXH7oYNMzG1g iYsBlkL9OYZ78IN2M6Ri3AaqIZDqtsYCXQRENhQ79TVzzwpmU8/8Wd9YbX4cq+rZenF1 zdQcnayXGekkyTCtSa+4dNQKbiFS8/hLgfz8KalFlX0Sn4Lu71acU/01Z/lr870oIG+d 3zzHG5sdPOtd+xPQo/UKhw5jALe6DkZ1BuK9GtOdQxtVKM6PWn3oNS+x/dNdelm7dlqn lrLA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b="i/tij5cD"; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id vl6-20020a17090730c600b008d13b2aae64si12198173ejb.337.2023.02.23.08.28.27; Thu, 23 Feb 2023 08:28:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b="i/tij5cD"; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234507AbjBWQ1N (ORCPT + 99 others); Thu, 23 Feb 2023 11:27:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60578 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233541AbjBWQ1K (ORCPT ); Thu, 23 Feb 2023 11:27:10 -0500 Received: from NAM02-DM3-obe.outbound.protection.outlook.com (mail-dm3nam02hn2230.outbound.protection.outlook.com [52.100.158.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BDDD56506; Thu, 23 Feb 2023 08:27:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=FZmJeoAOgLe4YA6GTGU/fYResr1GI5WnUHrmIW4NvrlmKDyA0k9vIRyEckLqTLkeJ3EAm8CaZ0dKR0ACxrL4SzhfHtL0tYMgz4dxqkZZMY6Vhf5LTr2PXpVxGjCC08Z2kPIaprZd+5M5ww514NLAolPDNFzM/Gb5R4HJXIVE0KqrdFL1plVT5Cn6nVdSlxmddAWwmD/rBcU5E19/X2YuZSAIEif7R5R3mbdDBCGo3/zBBn6TlVOT3OInEIsj90zd7FAB/8zzt2AN06z+R0qHy2k+9V3RF8YL50ii0xY5Y6XrfrA9vOv0t2OEcaYcsd5brYp2dN3fBbR4+NxpXKJcTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=OyYLYUH4QzLSiwA6Ej8cpIX1gGW7clql9i1HxVB+TMQ=; b=akhMYZFvaWqL06Rz8fbLA4NZ0YWLjVw7DTnVV1Gepggaa7A+IJX2+AMemZa/w6yDLT6m/FCWYqb0QawakJJsLpmwISnGwLNww8JVOy6C7u/8DSMEw7iBcQ1PacZBfqCYuZj3RFkarC9LGV7oZlUuEAqqHnQ07MyRhmGtFM6V0DQJuL/MFNT/Gfmk6BVOefVbz1MfQMvdoxzcIVNLLkqy35zkdKEHskXzvCx7P4YKVSHouyfBzCYOlje5LL+yn7p+8gWqSsSE79fpkCczZXQ2Z6d2qd+ZjKLQ18UsoQw8WL2qO+TBygjNbpRk3yIxxRwNmJrBBlP9K44B3482l/TQJw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=OyYLYUH4QzLSiwA6Ej8cpIX1gGW7clql9i1HxVB+TMQ=; b=i/tij5cDPw7pVoxpgP2W0bIK/WIzhBjUKv0t/mK9qtd3Mc0yM1p0x7SghLplBXIatNFUpZz77OHZ2ab9mjVmp6jph/D6FC01uYHlG8XZunfE3zm1rplK68jJAZgKdVbdSnjuGeNtF70ijnC8yKv2KrGhozunmFjJJKEeenpZadepxqviUfjhskdFUpm8sUlYecDbLwuLBHmDMeXTBHkuGGsB57FIg2Z05iK+HWZ9kSUjE2GeGBztsvQ7nHjCER5lEepCFpSB73gCExmIdahlJ9Cph1U4kJQvSD/eJLqV7jTGmau9daqj1Px34CoO7KLrg/dhBmdjjcQ86XbrMutT3w== Received: from BN0PR07CA0020.namprd07.prod.outlook.com (2603:10b6:408:141::18) by CH0PR12MB5267.namprd12.prod.outlook.com (2603:10b6:610:d2::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.21; Thu, 23 Feb 2023 16:27:04 +0000 Received: from BN8NAM11FT040.eop-nam11.prod.protection.outlook.com (2603:10b6:408:141:cafe::e0) by BN0PR07CA0020.outlook.office365.com (2603:10b6:408:141::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.21 via Frontend Transport; Thu, 23 Feb 2023 16:27:03 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by BN8NAM11FT040.mail.protection.outlook.com (10.13.177.166) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.21 via Frontend Transport; Thu, 23 Feb 2023 16:27:03 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Thu, 23 Feb 2023 08:26:57 -0800 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Thu, 23 Feb 2023 08:26:56 -0800 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Thu, 23 Feb 2023 08:26:52 -0800 From: Krishna Yarlagadda To: , , , , , , , , , CC: , , , , Krishna Yarlagadda Subject: [Patch V3 1/3] tpm_tis-spi: Support hardware wait polling Date: Thu, 23 Feb 2023 21:56:33 +0530 Message-ID: <20230223162635.19747-2-kyarlagadda@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230223162635.19747-1-kyarlagadda@nvidia.com> References: <20230223162635.19747-1-kyarlagadda@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT040:EE_|CH0PR12MB5267:EE_ X-MS-Office365-Filtering-Correlation-Id: e0d4c17d-0b2f-404c-891a-08db15bacc4b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bjAtRQTC/W4IFem2/NiVGeCjbyU3oo20rNejRaSclHSHYqInoudPQB+OA085L4G+O/rCreabKPoSvt1qql3RKISJigrCuM6VRhODJc9xJDOyjuOVpSxriJInQAfBP3oQfJAxQwEDGxHhM1ynNuVVDj4rNzelpG1OdhUbuLIPXrTrlXtlPHCshv8OueWDD23CoW5XrPv750LvX4esMFg1ugydEK3wRCzjSDA6ZFr1n7/nXE5RnJa8MvoTdoFPV2muGr8U7M7mvGzE2hxuyP4xqg7bLpBrL6Jyzscyydromj9g/GH8vnYMibBHycKGZrN9109VKk0lV1zzBXsreqP/YK73MreZzRy9BDVcVXLlIY4hFGsx2QZ6g+HZrvtH+3XIuu5uGbzIWjurpVOk6hB4PUx8vznIT3sQcwrKMjn5QdBxy8Y0OoNh2+Mk639fEXlAd9dA7CpNs92nzx2u86PuS+YZlLGtUZY5V1QCPDSHCfD1hnB5bfV22N34j1/d05q3UrIQ55GbgJC4UYtHDFUeL+Ij1ZM7OXvFYkANvAlaVJkHS96Owu+bONxDTNvVlfbyb1AQVauG3RU56qbCuwEK6zegqnNPQ9Zle+MWsIIE1T7LJWX1MSVxo214O9RQqz38SznwQwtUwGUGGBzaeL901yRuMW97r0Jnzr2TIuu6NDQ4UKqMgWtprIZAePubNYrsEApPF9GTO3wB/3bY1IibzTcZ6GVGX1QWtOIiVRqlWkWdTtZPqhH06SPiNZokUeehd8jrNHqeiPn07RjcvTgoGG1y61JEXq7losj++T96hsLFG6l4ETuf+UwoT1juCZcc+HxJAsx7+GGKHuYs+JNgdA== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(39860400002)(346002)(136003)(376002)(396003)(451199018)(5400799012)(40470700004)(36840700001)(46966006)(478600001)(110136005)(1076003)(6666004)(107886003)(7636003)(26005)(186003)(7696005)(47076005)(41300700001)(70206006)(316002)(4326008)(8676002)(336012)(426003)(83380400001)(8936002)(5660300002)(2906002)(34020700004)(36860700001)(7416002)(82740400003)(921005)(356005)(82310400005)(86362001)(54906003)(2616005)(70586007)(40460700003)(40480700001)(36756003)(83996005)(2101003)(12100799015);DIR:OUT;SFP:1501; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2023 16:27:03.6784 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e0d4c17d-0b2f-404c-891a-08db15bacc4b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT040.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5267 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758639927538076428?= X-GMAIL-MSGID: =?utf-8?q?1758639927538076428?= TPM devices raise wait signal on last addr cycle. This can be detected by software driver by reading MISO line on same clock which requires full duplex support. In case of half duplex controllers wait detection has to be implemented in HW. Support hardware wait state detection by sending entire message and let controller handle flow control. QSPI controller in Tegra236 & Tegra241 implement TPM wait polling. Signed-off-by: Krishna Yarlagadda --- drivers/char/tpm/tpm_tis_spi_main.c | 90 ++++++++++++++++++++++++++++- include/linux/spi/spi.h | 7 ++- 2 files changed, 92 insertions(+), 5 deletions(-) diff --git a/drivers/char/tpm/tpm_tis_spi_main.c b/drivers/char/tpm/tpm_tis_spi_main.c index a0963a3e92bd..0d3da7ef9a89 100644 --- a/drivers/char/tpm/tpm_tis_spi_main.c +++ b/drivers/char/tpm/tpm_tis_spi_main.c @@ -71,8 +71,72 @@ static int tpm_tis_spi_flow_control(struct tpm_tis_spi_phy *phy, return 0; } -int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len, - u8 *in, const u8 *out) +int tpm_tis_spi_hw_flow_transfer(struct tpm_tis_data *data, u32 addr, u16 len, + u8 *in, const u8 *out) +{ + struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data); + struct spi_transfer spi_xfer[3]; + struct spi_message m; + u8 transfer_len; + int ret; + + spi_bus_lock(phy->spi_device->master); + + while (len) { + transfer_len = min_t(u16, len, MAX_SPI_FRAMESIZE); + + spi_message_init(&m); + phy->iobuf[0] = (in ? 0x80 : 0) | (transfer_len - 1); + phy->iobuf[1] = 0xd4; + phy->iobuf[2] = addr >> 8; + phy->iobuf[3] = addr; + + memset(&spi_xfer, 0, sizeof(spi_xfer)); + + spi_xfer[0].tx_buf = phy->iobuf; + spi_xfer[0].len = 1; + spi_message_add_tail(&spi_xfer[0], &m); + + spi_xfer[1].tx_buf = phy->iobuf + 1; + spi_xfer[1].len = 3; + spi_message_add_tail(&spi_xfer[1], &m); + + if (out) { + spi_xfer[2].tx_buf = &phy->iobuf[4]; + spi_xfer[2].rx_buf = NULL; + memcpy(&phy->iobuf[4], out, transfer_len); + out += transfer_len; + } + + if (in) { + spi_xfer[2].tx_buf = NULL; + spi_xfer[2].rx_buf = &phy->iobuf[4]; + } + + spi_xfer[2].len = transfer_len; + spi_message_add_tail(&spi_xfer[2], &m); + + reinit_completion(&phy->ready); + + ret = spi_sync_locked(phy->spi_device, &m); + if (ret < 0) + goto exit; + + if (in) { + memcpy(in, &phy->iobuf[4], transfer_len); + in += transfer_len; + } + + len -= transfer_len; + } + +exit: + spi_bus_unlock(phy->spi_device->master); + return ret; +} + +int tpm_tis_spi_sw_flow_transfer(struct tpm_tis_data *data, u32 addr, u16 len, + u8 *in, const u8 *out) { struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data); int ret = 0; @@ -140,6 +204,28 @@ int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len, return ret; } +int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len, + u8 *in, const u8 *out) +{ + struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data); + struct spi_controller *ctlr = phy->spi_device->controller; + + /* + * TPM flow control over SPI requires full duplex support. + * Send entire message to a half duplex controller to handle + * wait polling in controller. + * Set TPM HW flow control flag.. + */ + if (ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) { + phy->spi_device->mode |= SPI_TPM_HW_FLOW; + return tpm_tis_spi_hw_flow_transfer(data, addr, len, in, + out); + } else { + return tpm_tis_spi_sw_flow_transfer(data, addr, len, in, + out); + } +} + static int tpm_tis_spi_read_bytes(struct tpm_tis_data *data, u32 addr, u16 len, u8 *result, enum tpm_tis_io_mode io_mode) { diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 988aabc31871..b88494e31239 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -184,8 +184,9 @@ struct spi_device { u8 chip_select; u8 bits_per_word; bool rt; -#define SPI_NO_TX BIT(31) /* No transmit wire */ -#define SPI_NO_RX BIT(30) /* No receive wire */ +#define SPI_NO_TX BIT(31) /* No transmit wire */ +#define SPI_NO_RX BIT(30) /* No receive wire */ +#define SPI_TPM_HW_FLOW BIT(29) /* TPM flow control */ /* * All bits defined above should be covered by SPI_MODE_KERNEL_MASK. * The SPI_MODE_KERNEL_MASK has the SPI_MODE_USER_MASK counterpart, @@ -195,7 +196,7 @@ struct spi_device { * These bits must not overlap. A static assert check should make sure of that. * If adding extra bits, make sure to decrease the bit index below as well. */ -#define SPI_MODE_KERNEL_MASK (~(BIT(30) - 1)) +#define SPI_MODE_KERNEL_MASK (~(BIT(29) - 1)) u32 mode; int irq; void *controller_state; From patchwork Thu Feb 23 16:26:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Yarlagadda X-Patchwork-Id: 61033 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp404744wrd; Thu, 23 Feb 2023 08:30:42 -0800 (PST) X-Google-Smtp-Source: AK7set+iRdvDGfXUxZizLAngvaDw4qYnWyFXN31IrmJrvNFtm+/JB0nAucooszTcut63H1XTrDKr X-Received: by 2002:a05:6402:34d5:b0:4ae:e4d2:174b with SMTP id w21-20020a05640234d500b004aee4d2174bmr13245843edc.2.1677169842446; Thu, 23 Feb 2023 08:30:42 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1677169842; cv=pass; d=google.com; s=arc-20160816; b=HC1lInXUl/+3s+Q0h2hkdyt807CTg4cmU9+kdwq2fc+elJUwgnJzRlsFVo/qXxP5sI zYb780FtidW+z0KuLylvwo4qQIgY9sNjB7ZCQqGoRoh6bXel8DGZJmo3VVb5eTuWQy5q D6GIMRHKoTn3p5DYXaaM2TbycFqB+A/D9r8HxRnbzk4CJ5MWu+3CkNYa1TYnp87Rz3g/ RC8ZSAOPGj6DuHTp7tqW/RxijYxhKLDBX7C9Vq0GAG6NhZ5QeXhmE4PRCa0b50bsZPYZ Pop1yLQgxRauQwcZXBpcxMefhpP84OVp93HmC/4bqQfsyb+68raS83E22aY7qCD/9Qf0 RaDQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=VsfhtNGIMTSq3iU4jmP/wfyqRfUEXCLyWBK8qBendlA=; b=lcG0GxP+xaD7HipSfu+dm5R8L6fYPPnfXSypb7ohL6aHZIdE09CMuLDzxl4smthDW2 hWSKRBwTPLleZBTVQTsQXzoUM5XCbWtBPs3oP0m83j1G57gaUX8D81tJQzQPGma5gu00 Oi25sttndTqKEYRJcYHgmbrQh+odl6SVeGcOmuSFIPTqmn3wW/J2IRMXuhK6WldJGUbO SSBHQsb0QMpudet1P5foXtsJY+rWwtzLJekqRdV1vEZE4TnOokFr9Cf70uENIle8A5kT oDted8lJaOdsExMw8/sH5IY02Xczi1HUEv++6R8LzbbL+PU9Zmiuul/a+BlA1BKnAIr5 rJdA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=X71LeY3r; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o11-20020a056402038b00b004acb7b226desi9647053edv.437.2023.02.23.08.30.18; Thu, 23 Feb 2023 08:30:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=X71LeY3r; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234556AbjBWQ1W (ORCPT + 99 others); Thu, 23 Feb 2023 11:27:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234512AbjBWQ1T (ORCPT ); Thu, 23 Feb 2023 11:27:19 -0500 Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11hn2247.outbound.protection.outlook.com [52.100.172.247]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 636F159E69; Thu, 23 Feb 2023 08:27:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=dZzwtWpTCQto1jJf22skSuZIfvMmnLfJku0wofIfYWeEcjYTG2oR3X+KarYJUqEWcLREkmTfgaiivzmkCR7qJKL1iUSqWF/5alZqhe/mrqSjaYBnmlbWZ51rUdqUeSV0/fZZS5zMrgY3ndvnHccGM4CdQ7mEqwg4nKUTXyOgX+Y/XIKGRR+lNAJc7Na1z45kr5PfvCLKS6pPyxF0haEK/c5vowxqHUBl6244OMfQeYDeOKpWbPgdt3Yux+vJO0yTUl8zQ1fui6/nEJ4DYMl0TRxh4kaGb6LcvVLuPXVafDosf0BFOVAy5WvfmgK45lAhNf2sRGCSIKaufWhJXlRLQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=VsfhtNGIMTSq3iU4jmP/wfyqRfUEXCLyWBK8qBendlA=; b=ECEOAqRbaBj6xCH8aC9hnJrYWudv6l+9UpByWKoFyzFqVAiL2aDOJg4j29RN9fRYWfHeIxrHaZ96bKjTakqAav0oB7qJC8YsBpxJSWR26Umoq58VAHebNJtcdVvkjqynoZyPpoRbwBHTkBqNUIm/jzTuluuaa/zpfmd8foX+OcVwCrPwxWb9z2LdFyP6hBSxDlqocVAhDuwUbFrt1sY91CboGZeHZJkwjzSb1YFpINDracfuMRPzxjl8KX1zZ4PUYarf3NJ+67dgYqfhpdzOwAOds27UxdUGYrGqIUrU4UE3Zyc9MXFf5L6ykgi4+X+IxeT2NTAbOZtI6CJcmJPCgg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=VsfhtNGIMTSq3iU4jmP/wfyqRfUEXCLyWBK8qBendlA=; b=X71LeY3r6LJbWktXCU+i9a86W6TYQ5cYW/2PfPOmI78UmBD/4C2ORPK5GmkXpFzL3d8rqKf6L4GNn5yVSBljE8w55zbiakQoo68UphI/nV24tPW5wXGokcVs+4I8xym6nsQmD5Iv2tQIDKTVYz1YmBHb7zulDnTV5xH1TWWhUvjZhQ4X00dxtjWRKrpWO/0zkP6vtMckFIrnoo/ED/4GGc1r6mFrQjtSw2752+iJ27IjfBcRw8/9IzmYZgFKvFClG5I3gbW7YFZGsjBPS5vo/gebTnoVKt+vIOy7lb2Dpu5YuDROq39TTDzXyekeM8otPtRVAzsqhtPHRrsFUFQz1Q== Received: from BN9PR03CA0586.namprd03.prod.outlook.com (2603:10b6:408:10d::21) by CH3PR12MB8305.namprd12.prod.outlook.com (2603:10b6:610:12e::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.21; Thu, 23 Feb 2023 16:27:13 +0000 Received: from BN8NAM11FT059.eop-nam11.prod.protection.outlook.com (2603:10b6:408:10d:cafe::28) by BN9PR03CA0586.outlook.office365.com (2603:10b6:408:10d::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.21 via Frontend Transport; Thu, 23 Feb 2023 16:27:13 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by BN8NAM11FT059.mail.protection.outlook.com (10.13.177.120) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.21 via Frontend Transport; Thu, 23 Feb 2023 16:27:12 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Thu, 23 Feb 2023 08:27:02 -0800 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Thu, 23 Feb 2023 08:27:01 -0800 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Thu, 23 Feb 2023 08:26:57 -0800 From: Krishna Yarlagadda To: , , , , , , , , , CC: , , , , Krishna Yarlagadda Subject: [Patch V3 2/3] spi: tegra210-quad: set half duplex flag Date: Thu, 23 Feb 2023 21:56:34 +0530 Message-ID: <20230223162635.19747-3-kyarlagadda@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230223162635.19747-1-kyarlagadda@nvidia.com> References: <20230223162635.19747-1-kyarlagadda@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT059:EE_|CH3PR12MB8305:EE_ X-MS-Office365-Filtering-Correlation-Id: 09bdbb92-7e9f-4840-21fb-08db15bad1dc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9fgk6S4g0Z+TIj2G5f/Bs53YdA0jUIyZ5rzZgkpd+JtdykgCNmkdSqSvT4LG08PZjTYD/TYNFKtk5vYHTJ/txQ0GK7MOcodAd9uWjPs6mU3OgtlaR6426ggc/bOdsL+nPuyeewH3oKHIJtK83MwhSsttPkZm7UTnJvs9CahdUO+AVmUvn+FUuxhD8GwFpTz99RsPqUWdwcCaq5iryOBMhQogvDVZVUvF1xvanpEUUj8bssaelv8ErEEQi+NLlDNPQiq/V+rA/iCC2Egnu7ScNYGj0pw7GMnb8i1Vuwu7NoE3dw4C6f/FscD8KEaP+VV+Yo1miK2hyWi86D5hZhwOq5rh2F5YlPPItBflz3nFuF4pCm9BUZduYBVxtm5xRO6/HnqH4gPKeuxqVZqDMEuouPBSfyjIiOhDxGVxcznTkzSdhL5dGLeJB23/gjFJlcVaX5/Fyt+Av8p2fRciy0n665GP+vugLWIHUJzbK3mJuUFkcyRyjvvlG5Mcwkg90hdEFeVndP7WyTdYtked7+oTULt+gfQJMBtlMEj+X5nWNzq7W+9+JOaUwNS4mCPWAhnTS2lKbOUBS5oZj1UcNh/oBPQbrq6a/NFvpYw1Ps9L/XonRGeknSascTamQyGmjMsYYYOO9C9/UA9NSwgp/ORPYn9piLGgl/aF7Dg8Nm0lTOMu7ta/UPANN2vj9D1owkvO230fC45Qz0+5Dq5l3WttglQqJxZc9ZFenQT8y9zLl9hH32hdrVVH753sTT259vg9gtCBmBElS+td+AwwVF49s4WgeDnmtqCjpIAwGT+1JfeCIi0vB++qYsyFi3T4LH3AvrPdNQU3l2GzrRSzoMkvmA== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(396003)(39860400002)(346002)(136003)(376002)(451199018)(5400799012)(36840700001)(46966006)(40470700004)(2906002)(36756003)(82740400003)(316002)(336012)(107886003)(6666004)(7696005)(34020700004)(36860700001)(41300700001)(2616005)(426003)(7636003)(70206006)(1076003)(47076005)(40480700001)(70586007)(40460700003)(921005)(82310400005)(5660300002)(478600001)(83380400001)(54906003)(8676002)(110136005)(4326008)(4744005)(356005)(8936002)(26005)(186003)(7416002)(86362001)(83996005)(2101003)(12100799015);DIR:OUT;SFP:1501; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2023 16:27:12.9991 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 09bdbb92-7e9f-4840-21fb-08db15bad1dc X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT059.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8305 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758640044634528549?= X-GMAIL-MSGID: =?utf-8?q?1758640044634528549?= Tegra QSPI controller only supports half duplex transfers. Set half duplex constrain flag. Signed-off-by: Krishna Yarlagadda --- drivers/spi/spi-tegra210-quad.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index 9ddb02fc6f1b..b967576b6c96 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -1532,6 +1532,7 @@ static int tegra_qspi_probe(struct platform_device *pdev) master->mode_bits = SPI_MODE_0 | SPI_MODE_3 | SPI_CS_HIGH | SPI_TX_DUAL | SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD; master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | SPI_BPW_MASK(8); + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->setup = tegra_qspi_setup; master->transfer_one_message = tegra_qspi_transfer_one_message; master->num_chipselect = 1; From patchwork Thu Feb 23 16:26:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Yarlagadda X-Patchwork-Id: 61032 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp404115wrd; Thu, 23 Feb 2023 08:29:32 -0800 (PST) X-Google-Smtp-Source: AK7set8FOa8ZB+Snn0/vgY47Xt+M8aRAvqznFRZofk9XNKZzGwmKm+YMhkx9e7/QFc5p/mLgYkxS X-Received: by 2002:a17:906:5d:b0:88c:f97c:7c87 with SMTP id 29-20020a170906005d00b0088cf97c7c87mr19052966ejg.2.1677169772015; Thu, 23 Feb 2023 08:29:32 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1677169771; cv=pass; d=google.com; s=arc-20160816; b=RUqwj7qVOngNPQmiy1Zx5r1XlycZj1E6NpHYGXpNdF77Fma0Qrl0deGIKm4Hyu4XwC tLsYLH2jODI0kcMljDDYGodug8MknWGK9DjZixyIr1GQyCkqCPrbLD0RgIN6nR7FmLPz 4o9iakgZAQTQ+Ae6yPUgng4ZjLcBMCB/j/a9O1mAo8c4/KZhIgLUj8T0H7sM5XpRsirT phTD86qkdLzRjy3srpHzZjLwZY1yfGy/WiL48fCWIbsZFJkHWz58fhcbOP8C8Hm7plbW drT/RQhwE1kMxmuIzsKtdUo7JpzIdwXtR/T1dApfTwI6MuqxsMDJUxBM5DlZpk249ajW cjXw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=HpKHpbqOPtWGpwP1tKVnq5lfCOEd70QTpkDFyU21Mqk=; b=IiGJr1i88Hqe6I3yy4waWxsw3f64rRx2L6IGL7DMC4VzrA+zx6X0kSUs86NT8T6FY7 bu/uTEc1OzyBvFIrJwA7vyCkqO1NDvRyQH99HlheL/D+ebHT+V94umpdoH1PP9KjDeFi HjKCcqhKreyVGZ3HveeJ5/T2zQmI6QXgDiqEN4zUqR5HkyaM+2j3BXdGsCMbV3AfVCE0 uiCYs03XvwwUTiuW39tVzG6Tn+DWgcJCxQc4CZiIUMXqD/hit99jsF5XKUKyTIadWJ5B 6IgtRBpgzkLecqu7spWgPx7OE3wTXYwqxz2siPHehCWvVU68zPrprgMjimigYoI3u1HJ nNTQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=ZtDP3iLN; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j3-20020a170906534300b008bd243fe7easi24466934ejo.776.2023.02.23.08.29.08; Thu, 23 Feb 2023 08:29:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@Nvidia.com header.s=selector2 header.b=ZtDP3iLN; arc=pass (i=1 spf=pass spfdomain=nvidia.com dmarc=pass fromdomain=nvidia.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234630AbjBWQ10 (ORCPT + 99 others); Thu, 23 Feb 2023 11:27:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234609AbjBWQ1V (ORCPT ); Thu, 23 Feb 2023 11:27:21 -0500 Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10hn2214.outbound.protection.outlook.com [52.100.155.214]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78D6A5653E; Thu, 23 Feb 2023 08:27:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=JRGGNQVwaP8zshQc9C8Jgg6HEEqn8utZ1ix1MFxeSoQhsIl57GX2LGRZRWfnSXvP9YY25TuJkdmoXBGb07a0zXc+/sIMyArFf9Z8D/aufpN2JSTvEwIyX/5Xp9IdLQv0mXDaDHLj6t4YDRcLTjMi3EzOmA7Qsn/w2XXkQAZPcezC4Jq+voWCAbXnxIEPzNhw8zaUdLuz8X8DBdnSumLK1Fv44pysP5iwsH+6OlWc+9OJEu+RmmgkczV5zJWJg8Yu3qg+rCW1s0f3ICV3tVCo2YUlXXI3KxtnxwDYQYbrT00IH8uxJB/xEd5gnw+ZmSls1v2WVgStmd4ee/8hnfQZ4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=HpKHpbqOPtWGpwP1tKVnq5lfCOEd70QTpkDFyU21Mqk=; b=TTeuXBh66zYMkdMIorpkYAGmh4kMeA1zlsO0DBK7mclAJTfYNQP4fQV7jDf4IiCq4D4Yn1QA442x3+oEbZey4PuFm1uxujxX0K9TynvbTMn8OojEUGPvVB4BIY4K/kdp4swjDcIfbnMUuKhT/ofVfnyq5a72CQ3WGjj0ZrwIR0n010RQGwBFLr7hq0ltu6Ore2w7LEW1vdLMYnc1dbaA47WAfFQ0MZlHYqTRCbWxKr7Ln5uLwy3SacF1K49bkg2mwzUVriMMKr1s6vsyJj8HPXwcY1vRPh5UTZRJVe8rG5uhp1Q2OwNQ6Nyi0yE9PsTPQKaUFJLTdSn7pegHnq131w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=kernel.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HpKHpbqOPtWGpwP1tKVnq5lfCOEd70QTpkDFyU21Mqk=; b=ZtDP3iLNsYN4PpRMxGLuOFU3Dlh5MGNVFfo+3n7TNfJxfIcmpmCTqBzTCe1fbLCA+wrUb8pcF7R01drvisdpBxs+6L0uku9C9N4Lqfe+IYYMeyC9W8McDqjvL7qmEZODXrY/pDACVRBjO7x/zra+83iE6CzRDPJ5vgNPyVAopbGFoEgE1pBEXJv7rWsN8nQaZ3mKiLn9B52DLuDKRuQ1meKk7O6f0deFxR7K7toiFlmvqIOq937Hf52n+j9VJDIcufypp6vMUTV8Sb3MxeuJRJKgB8rLJZa7v3CGzD34ApFOfZrWoH5MT1LhzPRdC04wQY5JcQJZUCO1AL696uDkXA== Received: from BN9PR03CA0914.namprd03.prod.outlook.com (2603:10b6:408:107::19) by DM4PR12MB5246.namprd12.prod.outlook.com (2603:10b6:5:399::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.19; Thu, 23 Feb 2023 16:27:15 +0000 Received: from BN8NAM11FT010.eop-nam11.prod.protection.outlook.com (2603:10b6:408:107:cafe::c4) by BN9PR03CA0914.outlook.office365.com (2603:10b6:408:107::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.21 via Frontend Transport; Thu, 23 Feb 2023 16:27:15 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by BN8NAM11FT010.mail.protection.outlook.com (10.13.177.53) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6134.21 via Frontend Transport; Thu, 23 Feb 2023 16:27:15 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Thu, 23 Feb 2023 08:27:07 -0800 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Thu, 23 Feb 2023 08:27:06 -0800 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.986.36 via Frontend Transport; Thu, 23 Feb 2023 08:27:02 -0800 From: Krishna Yarlagadda To: , , , , , , , , , CC: , , , , Krishna Yarlagadda Subject: [Patch V3 3/3] spi: tegra210-quad: Enable TPM wait polling Date: Thu, 23 Feb 2023 21:56:35 +0530 Message-ID: <20230223162635.19747-4-kyarlagadda@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230223162635.19747-1-kyarlagadda@nvidia.com> References: <20230223162635.19747-1-kyarlagadda@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT010:EE_|DM4PR12MB5246:EE_ X-MS-Office365-Filtering-Correlation-Id: d9fa8154-79a5-46f0-646e-08db15bad312 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: q7yM+FfPaPjy7S8KxPpZEUmT027XBxnfdd10uWOA0DCPa0wmEj2DR8p578YOI2nH9JX5qWIhClbN0+bWcjmeDLa0B6pr0FClwXlbGHIGDXq9slTRXaJpSsTK709y9TH0jCAzHM8bfE4BO8r4UT+bFl89dPE61V7/KEkf32oOfHHC1WeJzZT7ewf9IQrECptc4xhB5Oys9MYh0Mt8ESSlHRLw1u86wX7rAl3msLtF4bf9cFeaMo1SXmhbUATvRGmFKEm2KKJ78YE95Q6M0oELvM6NcfLkJ3JEwaUc1n+LMme52CGo6U0CQoHQAqAkcm68DM7eK+/JHAoLTcYBEDP3XhU2PRxhI3HwIFPC9rwYR6N6ycnG0Btce5rsMSY2hdyFq0AyieZG2erk54YpE+ARwzJK7LmJYC40EEaaVIexMeeOXt+CGX/cu09+gatgMh0dM9RpsMrS6uSDTy5vE7DsV9774ww/HpQ6pl9AEjXDoQrWrjvKMw3aMqHWZEGXSIRM9CPBe0BmOMYZM7tp1M8H9ME3vfBJX/j0QuttvTb2AC4uYQXXclmz81DyP7Cy3aV1xr51sAgc2maa3yTelmxxRxBB5zzS+VKD+3pz7W8oopFbcEaSbFDh2hYRyQy4WJdtA13SSBqxANEX2GFxqbidYqTzz4ZKJxVsYxmnUHlXxg58dxTYBebA/+sdcdPugRaiisjFe124EbYyDFgTovYMCPkjEa+AcfClzQziRni6RaryrO8NIUtsvW9T5C0fL20i7iihfvo6t1CN/JkiQJ9cEjGL4bkV0Ioh3FcjCwY2ZZq4qe+XIgBhCZ7bbF3RtPFHhyGe5IlSJxcmBTEJfkEC0g== X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(346002)(376002)(136003)(396003)(39860400002)(5400799012)(451199018)(36840700001)(46966006)(40470700004)(2906002)(5660300002)(7416002)(36756003)(83380400001)(1076003)(426003)(47076005)(82310400005)(356005)(26005)(2616005)(186003)(40480700001)(921005)(336012)(34020700004)(82740400003)(7636003)(70586007)(70206006)(8676002)(4326008)(8936002)(40460700003)(41300700001)(6666004)(36860700001)(86362001)(107886003)(7696005)(316002)(478600001)(110136005)(54906003)(83996005)(2101003)(12100799015);DIR:OUT;SFP:1501; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2023 16:27:15.0168 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d9fa8154-79a5-46f0-646e-08db15bad312 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT010.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5246 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758639970772214190?= X-GMAIL-MSGID: =?utf-8?q?1758639970772214190?= Trusted Platform Module requires flow control. As defined in TPM interface specification, client would drive MISO line at same cycle as last address bit on MOSI. Tegra241 QSPI controller has TPM wait state detection feature which is enabled for TPM client devices reported in SPI device mode bits. Set half duplex flag for TPM device to detect and send entire message to controller in one shot. Signed-off-by: Krishna Yarlagadda --- drivers/spi/spi-tegra210-quad.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index b967576b6c96..fe15fa6eecd1 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -142,6 +142,7 @@ #define QSPI_GLOBAL_CONFIG 0X1a4 #define QSPI_CMB_SEQ_EN BIT(0) +#define QSPI_TPM_WAIT_POLL_EN BIT(1) #define QSPI_CMB_SEQ_ADDR 0x1a8 #define QSPI_ADDRESS_VALUE_SET(X) (((x) & 0xFFFF) << 0) @@ -164,6 +165,7 @@ struct tegra_qspi_soc_data { bool has_dma; bool cmb_xfer_capable; + bool tpm_wait_poll; unsigned int cs_count; }; @@ -991,6 +993,14 @@ static void tegra_qspi_dump_regs(struct tegra_qspi *tqspi) dev_dbg(tqspi->dev, "TRANS_STAT: 0x%08x | FIFO_STATUS: 0x%08x\n", tegra_qspi_readl(tqspi, QSPI_TRANS_STATUS), tegra_qspi_readl(tqspi, QSPI_FIFO_STATUS)); + dev_dbg(tqspi->dev, "GLOBAL_CFG: 0x%08x\n", + tegra_qspi_readl(tqspi, QSPI_GLOBAL_CONFIG)); + dev_dbg(tqspi->dev, "CMB_CMD: 0x%08x | CMB_CMD_CFG: 0x%08x\n", + tegra_qspi_readl(tqspi, QSPI_CMB_SEQ_CMD), + tegra_qspi_readl(tqspi, QSPI_CMB_SEQ_CMD_CFG)); + dev_dbg(tqspi->dev, "CMB_ADDR: 0x%08x | CMB_ADDR_CFG: 0x%08x\n", + tegra_qspi_readl(tqspi, QSPI_CMB_SEQ_ADDR), + tegra_qspi_readl(tqspi, QSPI_CMB_SEQ_ADDR_CFG)); } static void tegra_qspi_handle_error(struct tegra_qspi *tqspi) @@ -1065,6 +1075,12 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi, /* Enable Combined sequence mode */ val = tegra_qspi_readl(tqspi, QSPI_GLOBAL_CONFIG); + if (spi->mode & SPI_TPM_HW_FLOW) { + if (tqspi->soc_data->tpm_wait_poll) + val |= QSPI_TPM_WAIT_POLL_EN; + else + return -EIO; + } val |= QSPI_CMB_SEQ_EN; tegra_qspi_writel(tqspi, val, QSPI_GLOBAL_CONFIG); /* Process individual transfer list */ @@ -1192,6 +1208,7 @@ static int tegra_qspi_non_combined_seq_xfer(struct tegra_qspi *tqspi, /* Disable Combined sequence mode */ val = tegra_qspi_readl(tqspi, QSPI_GLOBAL_CONFIG); val &= ~QSPI_CMB_SEQ_EN; + val &= ~QSPI_TPM_WAIT_POLL_EN; tegra_qspi_writel(tqspi, val, QSPI_GLOBAL_CONFIG); list_for_each_entry(transfer, &msg->transfers, transfer_list) { struct spi_transfer *xfer = transfer; @@ -1450,24 +1467,28 @@ static irqreturn_t tegra_qspi_isr_thread(int irq, void *context_data) static struct tegra_qspi_soc_data tegra210_qspi_soc_data = { .has_dma = true, .cmb_xfer_capable = false, + .tpm_wait_poll = false, .cs_count = 1, }; static struct tegra_qspi_soc_data tegra186_qspi_soc_data = { .has_dma = true, .cmb_xfer_capable = true, + .tpm_wait_poll = false, .cs_count = 1, }; static struct tegra_qspi_soc_data tegra234_qspi_soc_data = { .has_dma = false, .cmb_xfer_capable = true, + .tpm_wait_poll = true, .cs_count = 1, }; static struct tegra_qspi_soc_data tegra241_qspi_soc_data = { .has_dma = false, .cmb_xfer_capable = true, + .tpm_wait_poll = true, .cs_count = 4, };