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[2620:137:e000::1:20]) by mx.google.com with ESMTP id y16-20020a170902b49000b001782bd6c443si12424725plr.621.2022.10.17.21.05.14; Mon, 17 Oct 2022 21:05:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=m3Yt3QI6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229891AbiJRD5p (ORCPT + 99 others); Mon, 17 Oct 2022 23:57:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229898AbiJRD5l (ORCPT ); Mon, 17 Oct 2022 23:57:41 -0400 Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAF1187095 for ; Mon, 17 Oct 2022 20:57:39 -0700 (PDT) Received: by mail-pl1-x62c.google.com with SMTP id b2so12654482plc.7 for ; Mon, 17 Oct 2022 20:57:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/5SY8Nah0OJo40Eqd9ufrxakceznyXcaJJucJXEE6R0=; b=m3Yt3QI6+Z/DrLslxPJ/GzJKEJbJxlIPy8KAYZmEIRcp609iOKz/1AXizo0Chsx+uk ldcx7+d5tpLrsL/TW3piXuuC9bCYwaXfh7MoSV69B5rEG0ycLHN/v2/PNpBvwi03yFqu gFUwj9zrzvuH1GSY26F8RA0v/zQ7eMhlGc7ko= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/5SY8Nah0OJo40Eqd9ufrxakceznyXcaJJucJXEE6R0=; b=IMMok14L1I80y6SRb/0ecYESjVEgQYY7CHgs7iJozm86Ts7nK/6KM8F2zPq8wu9qLa bFoAYF5M0osRJkhW0oW9vHYJEFmunvagQG/OD321Hi7zjEPFvPX4wSg/ByiVQDXw/+HA tH3D7oU1ysEKO9nKKf0lB/pkVY+LTQSNY2CKSwthWuczgssS0ND/nIOrmJi+xSq87mSY fObPsMhPUZ//X9Kj4DOYzpoRuC6UBlIaWgD3s79SISGZTt+f7qepQr9VeoCxCT5TorVH LliaodepI1TzoqX1hltGcncDLvpVRaNZPboBHC1lQBaKsZktcZG5uQ45acsZ/vlV7KGJ Ek1A== X-Gm-Message-State: ACrzQf07CZ9xx8RAvXdR2jbCvw1cqzI07QRWLuUhzzo0gGg3b8tR8MSo MOdMqpu19FUYO8Y7R0n8LUtV/007la5JSg== X-Received: by 2002:a17:902:8e84:b0:178:71f2:113c with SMTP id bg4-20020a1709028e8400b0017871f2113cmr948888plb.79.1666065459409; Mon, 17 Oct 2022 20:57:39 -0700 (PDT) Received: from localhost ([2620:15c:9d:2:2ac3:f4e2:e908:c393]) by smtp.gmail.com with UTF8SMTPSA id h9-20020aa79f49000000b00537fb1f9f25sm7972272pfr.110.2022.10.17.20.57.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 Oct 2022 20:57:38 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Lin , Adrian Hunter , Shawn Guo , Fabio Estevam , Faiz Abbas , NXP Linux Team , Haibo Chen , Al Cooper , linux-mmc@vger.kernel.org, Pengutronix Kernel Team , linux-kernel@vger.kernel.org, Florian Fainelli , Sascha Hauer , Thierry Reding , Michal Simek , Jonathan Hunter , Sowjanya Komatineni , linux-arm-kernel@lists.infradead.org, Broadcom internal kernel review list , Brian Norris , stable@vger.kernel.org Subject: [PATCH 1/5] mmc: sdhci-of-arasan: Fix SDHCI_RESET_ALL for CQHCI Date: Mon, 17 Oct 2022 20:57:20 -0700 Message-Id: <20221017205610.1.I29f6a2189e84e35ad89c1833793dca9e36c64297@changeid> X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog In-Reply-To: <20221018035724.2061127-1-briannorris@chromium.org> References: <20221018035724.2061127-1-briannorris@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746996744834927112?= X-GMAIL-MSGID: =?utf-8?q?1746996744834927112?= SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but one particular case I hit commonly enough: mmc_suspend() -> mmc_power_off(). Typically we will eventually deactivate CQE (cqhci_suspend() -> cqhci_deactivate()), but that's not guaranteed -- in particular, if we perform a partial (e.g., interrupted) system suspend. The same bug was already found and fixed for two other drivers, in v5.7 and v5.9: 5cf583f1fb9c mmc: sdhci-msm: Deactivate CQE during SDHC reset df57d73276b8 mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers The latter is especially prescient, saying "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." So like these other patches, deactivate CQHCI when resetting the controller. Also, move around the DT/caps handling, because sdhci_setup_host() performs resets before we've initialized CQHCI. This is the pattern followed in other SDHCI/CQHCI drivers. Fixes: 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1") Cc: Signed-off-by: Brian Norris Reviewed-by: Guenter Roeck --- drivers/mmc/host/sdhci-of-arasan.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 3997cad1f793..1988a703781a 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -366,6 +366,10 @@ static void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && + sdhci_arasan->has_cqe) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); if (sdhci_arasan->quirks & SDHCI_ARASAN_QUIRK_FORCE_CDTEST) { @@ -1521,7 +1525,8 @@ static int sdhci_arasan_register_sdclk(struct sdhci_arasan_data *sdhci_arasan, return 0; } -static int sdhci_arasan_add_host(struct sdhci_arasan_data *sdhci_arasan) +static int sdhci_arasan_add_host(struct sdhci_arasan_data *sdhci_arasan, + struct device_node *np) { struct sdhci_host *host = sdhci_arasan->host; struct cqhci_host *cq_host; @@ -1549,6 +1554,10 @@ static int sdhci_arasan_add_host(struct sdhci_arasan_data *sdhci_arasan) if (dma64) cq_host->caps |= CQHCI_TASK_DESC_SZ_128; + host->mmc->caps2 |= MMC_CAP2_CQE; + if (!of_property_read_bool(np, "disable-cqe-dcmd")) + host->mmc->caps2 |= MMC_CAP2_CQE_DCMD; + ret = cqhci_init(cq_host, host->mmc, dma64); if (ret) goto cleanup; @@ -1705,13 +1714,9 @@ static int sdhci_arasan_probe(struct platform_device *pdev) host->mmc_host_ops.start_signal_voltage_switch = sdhci_arasan_voltage_switch; sdhci_arasan->has_cqe = true; - host->mmc->caps2 |= MMC_CAP2_CQE; - - if (!of_property_read_bool(np, "disable-cqe-dcmd")) - host->mmc->caps2 |= MMC_CAP2_CQE_DCMD; } - ret = sdhci_arasan_add_host(sdhci_arasan); + ret = sdhci_arasan_add_host(sdhci_arasan, np); if (ret) goto err_add_host; From patchwork Tue Oct 18 03:57:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 3919 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1765030wrs; Mon, 17 Oct 2022 21:05:30 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5GJTFiB7usL5iYBBy8LtKtb+QikEaCP3kYKY7wp62xOboWkddCmsRZIgKuh6f+dKbJ4ed3 X-Received: by 2002:a62:a512:0:b0:536:e2bd:e15e with SMTP id v18-20020a62a512000000b00536e2bde15emr946594pfm.1.1666065930010; Mon, 17 Oct 2022 21:05:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666065930; cv=none; d=google.com; s=arc-20160816; b=KL58ZvEUQSopUd7GcWI7KvlOiTtOSB6NpjuCmJ4QWcCdHcpOd1xPXde3HjbSO55HnD ZdQgpws4vDbgBUYk1Gied3ATD3PG/RInY6ZXEEVFASeNiSqLTH4Li+WRPRhssg7RvDVQ bEWwpnbHc/9eYINB6PGBLXbgPnRfEL0bGd5gdvKZxVZ35TaD6SYpO/38F6r/eLiynWy1 8tE+/WdogKIHJ6JpM178QgPx8E6/rWHMkLH3exDByY3DLlImZ3+zSD/oK6MNgTvVSmvm DZVg1dJkOU/6YxysnPUMxw/+B8qdWN4LJrk64l/IcwF/3+2qjaliNzTXxIszp+ig5zjW 9fkQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Ij4KWz/xfjwjagiNwbsSS9W+22RRneq0xL/Tg7OEAHQ=; b=oUIAqkJz3nbSx1qxG804xtX5R9VhgX2FDK7n1aMcgYJ+30ZG6k6huC/auJBOqikDXQ sUpf5lcKJbrte9Ud1LxTCqqUEPcAJ9wAha903OV+zy/iXzjjIAHTijkBGtqJ324WXB3Z OF9fQp546xvhDgyjZxquTkDB0zavQ0aBo8fgQRCV8+r8lzbCSpzgjsHrQJtE+XE90gMq 42BxomK5tYbpmHjpZAt8F6Hy+B9gwpoJSq0g9erpn6sWzRpKDrRFZcpfkx495xCtO9po YA22Bpl8zbfXn19c/P6haCp504EEm5rwnjjQX4wcX8DIwstxK6UDsdYmgsd2BK3qvT+Q mziQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=IMZnm0At; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k14-20020a633d0e000000b0043a20d557a9si15784242pga.229.2022.10.17.21.05.17; Mon, 17 Oct 2022 21:05:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=IMZnm0At; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230016AbiJRD5u (ORCPT + 99 others); Mon, 17 Oct 2022 23:57:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53768 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229935AbiJRD5n (ORCPT ); Mon, 17 Oct 2022 23:57:43 -0400 Received: from mail-pg1-x532.google.com (mail-pg1-x532.google.com [IPv6:2607:f8b0:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1B9187F99 for ; Mon, 17 Oct 2022 20:57:42 -0700 (PDT) Received: by mail-pg1-x532.google.com with SMTP id q1so12213349pgl.11 for ; Mon, 17 Oct 2022 20:57:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ij4KWz/xfjwjagiNwbsSS9W+22RRneq0xL/Tg7OEAHQ=; b=IMZnm0AtLYkB5SOiYzwzKdVoh765CWB45APSqYyjXFUWB0VArkwtlA4V2j6wR8MSaC FIJ1wTsDtiZ2ZfLdjdfv9K7mFoBFeDwQ9LxETzRM2vgBqtc1oOif8WxtzeiyfT7lSIRL vujMRT8CAcW5c3MDzJubCEejTmZKjl719zp9o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ij4KWz/xfjwjagiNwbsSS9W+22RRneq0xL/Tg7OEAHQ=; b=5j/nKDpwJ5Tkgzbsot4TmuplIf5g3OsyCT00jfkDtK93Dyf2JHT66VJFcLcxdHAmWH mzeCexrkM+Bqqzdm6oHpXJW8kPktIL4gm+guZQtPz9RwlxcP3zH9ignnafYWmO2neqYk IcJAU2uzgjGeKHKcsXcf4H1XFA/V94AoYJOFxSK5dxwPSe1z4XjXX234BO5DW9hxEMcT Z6JfzSYUVtQLj976JwKKwI8OVbxIDGPkT+N+xZ09xYIKzxM9H5XhuLBwrppjwxwlZgFc lM8qTifsxrCedfuDgUvAN/+Y6Ly6sizz0H8swQqTznHdrmAzy803TYHWcn7VlCYiytdw t6BA== X-Gm-Message-State: ACrzQf0jSAtmztOxaIiiRxGAM2LQcRH/F4c4Qpsr0c1n6T1aYT737x6I Nh66RwIT46g68B5W5xWRw/HkFg== X-Received: by 2002:a63:6a09:0:b0:43a:20d4:85fe with SMTP id f9-20020a636a09000000b0043a20d485femr929157pgc.625.1666065462001; Mon, 17 Oct 2022 20:57:42 -0700 (PDT) Received: from localhost ([2620:15c:9d:2:2ac3:f4e2:e908:c393]) by smtp.gmail.com with UTF8SMTPSA id r8-20020aa79628000000b0056699fcdf6bsm7127084pfg.84.2022.10.17.20.57.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 Oct 2022 20:57:41 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Lin , Adrian Hunter , Shawn Guo , Fabio Estevam , Faiz Abbas , NXP Linux Team , Haibo Chen , Al Cooper , linux-mmc@vger.kernel.org, Pengutronix Kernel Team , linux-kernel@vger.kernel.org, Florian Fainelli , Sascha Hauer , Thierry Reding , Michal Simek , Jonathan Hunter , Sowjanya Komatineni , linux-arm-kernel@lists.infradead.org, Broadcom internal kernel review list , Brian Norris Subject: [PATCH 2/5] mmc: sdhci-brcmstb: Fix SDHCI_RESET_ALL for CQHCI Date: Mon, 17 Oct 2022 20:57:21 -0700 Message-Id: <20221017205610.2.I6a715feab6d01f760455865e968ecf0d85036018@changeid> X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog In-Reply-To: <20221018035724.2061127-1-briannorris@chromium.org> References: <20221018035724.2061127-1-briannorris@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746996748449263292?= X-GMAIL-MSGID: =?utf-8?q?1746996748449263292?= [[ NOTE: this is completely untested by the author, but included solely because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Move around the CQE caps handling, because sdhci_setup_host() performs resets before we've initialized CQHCI. This is the pattern followed in other SDHCI/CQHCI drivers. Fixes: d46ba2d17f90 ("mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)") Signed-off-by: Brian Norris --- drivers/mmc/host/sdhci-brcmstb.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index aff36a933ebe..7f4bb362b923 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -55,6 +55,10 @@ static void brcmstb_reset(struct sdhci_host *host, u8 mask) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && + (priv->flags & BRCMSTB_PRIV_FLAGS_HAS_CQE)) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); /* Reset will clear this, so re-enable it */ @@ -209,7 +213,6 @@ static int sdhci_brcmstb_add_host(struct sdhci_host *host, return sdhci_add_host(host); dev_dbg(mmc_dev(host->mmc), "CQE is enabled\n"); - host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD; ret = sdhci_setup_host(host); if (ret) return ret; @@ -230,6 +233,8 @@ static int sdhci_brcmstb_add_host(struct sdhci_host *host, cq_host->caps |= CQHCI_TASK_DESC_SZ_128; } + host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD; + ret = cqhci_init(cq_host, host->mmc, dma64); if (ret) goto cleanup; From patchwork Tue Oct 18 03:57:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 3920 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1765114wrs; Mon, 17 Oct 2022 21:05:44 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7kiw4rjEB8w+v2ci0g0NGr/+fTuQqDGNKEZs56IXBsPdiZtFEBFay6adNOPlCPoHpPh71x X-Received: by 2002:a63:1718:0:b0:447:9ff3:66c0 with SMTP id x24-20020a631718000000b004479ff366c0mr964117pgl.521.1666065944172; Mon, 17 Oct 2022 21:05:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666065944; cv=none; d=google.com; s=arc-20160816; b=o5g1YwCdF/FUSx4tnv1I5w6dmiZNoUFPbvWf+Q90Urb5BMa4wmp6b3MDkQWCq+DTZW X/Sa/dYtJVGu5Yz7Gioe7R+JU5fGvjGY45iGT8sq4XK+VkZUk4fi6dTaviDPhm2IF1BN TUrNqjcUQTtknvs2gugoXzJ11pMrigL1qDLzMKUplk0ZkGRmceklzwP2v+kJDkqUx6uZ KdgCKQLq1eDxVLRNiv4RhCgXgPGXLcpIfddTLCLmBrSfyP2kXD8x/nxEaDbLE3S+5cYM oRe2sgduKjoVP3G4/gLzsV93YVbR2OLIwLfvPzcTkGHgoJxbwZL/4QG2/vd1UdUaPx3o bAcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=8bYbVaurNHZoKZuiVprhZUwyKptjwry92NaACiNGGbI=; b=pQ/1iCUz8qxcRYCuApfDyw4OymkbLuP8j2qGXkkPCZWWNMuConIzngm1iSx6hrmBYg 4E2QK3U01uQLNzf9vpNWBD4mGLBl3SIIjy/qN2Uc0Zlbckc3VfIwh37bLNYmSBpIg1WK fIJZhC/diQczOpsr0pPAMzzsvdeAQOLTYcsOY15Bw+IPA/r6eEOIOErgrPGUoYsHRc0d La8N91VVUe9bfhIzeLpEVhbDjOqyBrJcg+QWnieh9ocWzKu0BuTdMHSDCopqgh+SpbaI rOC/3IOvOFA+HMFB5MIzEnkhhrSkIZmi5zjzsd5p5hYLlUyJVzNOn699kidbtgMWduTl 6Nhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=biCG5g3P; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Fixes: bb6e358169bf ("mmc: sdhci-esdhc-imx: add CMDQ support") Signed-off-by: Brian Norris --- drivers/mmc/host/sdhci-esdhc-imx.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 55981b0f0b10..222c83929e20 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1288,6 +1288,13 @@ static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing) static void esdhc_reset(struct sdhci_host *host, u8 mask) { + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); + + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && + imx_data->socdata->flags & ESDHC_FLAG_CQHCI) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); From patchwork Tue Oct 18 03:57:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 3921 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1765119wrs; Mon, 17 Oct 2022 21:05:45 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6QCsVXCIZV0cux8EppDwOJiOXUDwsSeFLXZKCTNj1AN7coToBnxC1DR+yZza5uB0n1AW4F X-Received: by 2002:a63:d34c:0:b0:462:589b:b27e with SMTP id u12-20020a63d34c000000b00462589bb27emr1029502pgi.418.1666065944745; Mon, 17 Oct 2022 21:05:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666065944; cv=none; d=google.com; s=arc-20160816; b=uQlzqaiL3ixHYWE4/Leqcy+9AwSmNjTGrw68zE2Q5kN5Wm93w6M3xM3n6SBgw6nsMp eyolxKaEOpDr8ysBN0Q97FKx2Sk4ixmjZ8mh89tan9t+gu5EMFeRMstJqwo5ysGlAovT eR7zBrFh+HOC5Uecfq5h+CZ8GvXQxeZ3TLSbToRMQAIbgKpGsRuw9XPbaMGo2WNm7hhV bWJM2fViPgslWbxyHm7wCl7lyOZj25OB6LXMWMJlAr9dpzA01k3EpdENJnri4HeG8uOn 6Th7dIZ2i9bj7VFTF4qZkfKcq6iKRsgqFCboGkoCm9QjMOdK/JS7itegzI/YdA4I/34o 1h+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LqIOfq4+r44BDEcAbAIaLunotKmu+d/0VAL/CFG/GZs=; b=xJqCgJA7AWmwfid2KekUDt2Dk7ReSr6eB4slPT81Vr/LUAVgZluUCO2S07PDZTZfhg QJtnDDTX89zh7WKXHeCXgnycABY6xbgMMog8yZXhn6UrHVfvC76iPWXCU7GzvAfr8hn6 mxSnBrloOeq9jdLOGTbBYVBUa5RXQbRH+dtMVJfN5iS+IKrKSuXHZ4hkCDG0OuxO5Azo NEOYcRMgok9tmkiZZPNrv5ll+JX2zNa7q+0usCJ9hb+co4gm8dXcUdHa0+FMtMuftZjA tLji9Ej1Qh3zMUISS56vxc0meD/NvlpzWoJDgHmSh8GNfYkU+b4+6/qVwM7WoMX8cum0 ps7Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=UekqlQkG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 2-20020a630002000000b00455d13a2a6dsi12266347pga.571.2022.10.17.21.05.32; Mon, 17 Oct 2022 21:05:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=UekqlQkG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229963AbiJRD6Y (ORCPT + 99 others); Mon, 17 Oct 2022 23:58:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229939AbiJRD5v (ORCPT ); Mon, 17 Oct 2022 23:57:51 -0400 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4948A87F99 for ; Mon, 17 Oct 2022 20:57:48 -0700 (PDT) Received: by mail-pf1-x42b.google.com with SMTP id y8so12910373pfp.13 for ; Mon, 17 Oct 2022 20:57:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LqIOfq4+r44BDEcAbAIaLunotKmu+d/0VAL/CFG/GZs=; b=UekqlQkGh6UA8fFw7UouK9kSktK5V9gIlB1tDGL6hleXWJrwAzg8cmt1FAgpk8CgWl a3uPfVhIqkx3w5XeROlfWH4A16t0gISqd0MOKefaZXYRf+hQ1/yA6Gu57WPgkCwc3tpv 7V4LoIT4ltSkFehTqR+xHgMgI+oJkDSxXtuqA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LqIOfq4+r44BDEcAbAIaLunotKmu+d/0VAL/CFG/GZs=; b=qs//kOwh29a8J6aPryNoEQjaaSs7sf7rOoUtWhQZsYdB0yc0JQTmgDg3qwWhdGM4Qa aBGYvFfL8s+ujTTS4+d2VhDmUMMBPXFfjVnWhHRkKE7t95kvLqVSiTLSYX0aJxdIng8l +S30SHpPlLx1iaDE5skQe1I9GrLB3eZ6ofjjKXYBAsPf9oPVmKlOPHVqUH1Z6fzKb+3/ M9KOdyFfNnoEd+RLJnciLX9edMc5JqAaJ3fCOMQhV9sZBBuMUXgAPwrfdnUIRi+TAw40 MDn1ccPfqLrZ1F+J/7xNR1q6bY0RV/j+uy/r7Eyn+ouVQOoB5XpwhqMqac90SP9oo8XM 6jdw== X-Gm-Message-State: ACrzQf1BUsmwCs3faAf3FWTi2K2k2/JaLL/K4I2ev9QzGPZ3ijRhX/Ic LNbyi/zV6LJxJAVs0wzPD3jfYw== X-Received: by 2002:a63:f07:0:b0:440:5c6e:5833 with SMTP id e7-20020a630f07000000b004405c6e5833mr972776pgl.375.1666065467479; Mon, 17 Oct 2022 20:57:47 -0700 (PDT) Received: from localhost ([2620:15c:9d:2:2ac3:f4e2:e908:c393]) by smtp.gmail.com with UTF8SMTPSA id y69-20020a62ce48000000b0054124008c14sm7955449pfg.154.2022.10.17.20.57.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 Oct 2022 20:57:47 -0700 (PDT) From: Brian Norris To: Ulf Hansson Cc: Shawn Lin , Adrian Hunter , Shawn Guo , Fabio Estevam , Faiz Abbas , NXP Linux Team , Haibo Chen , Al Cooper , linux-mmc@vger.kernel.org, Pengutronix Kernel Team , linux-kernel@vger.kernel.org, Florian Fainelli , Sascha Hauer , Thierry Reding , Michal Simek , Jonathan Hunter , Sowjanya Komatineni , linux-arm-kernel@lists.infradead.org, Broadcom internal kernel review list , Brian Norris Subject: [PATCH 4/5] mmc: sdhci-tegra: Fix SDHCI_RESET_ALL for CQHCI Date: Mon, 17 Oct 2022 20:57:23 -0700 Message-Id: <20221017205610.4.I418c9eaaf754880fcd2698113e8c3ef821a944d7@changeid> X-Mailer: git-send-email 2.38.0.413.g74048e4d9e-goog In-Reply-To: <20221018035724.2061127-1-briannorris@chromium.org> References: <20221018035724.2061127-1-briannorris@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746996764231174775?= X-GMAIL-MSGID: =?utf-8?q?1746996764231174775?= [[ NOTE: this is completely untested by the author, but included solely because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other drivers using CQHCI might benefit from a similar change, if they also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Fixes: 3c4019f97978 ("mmc: tegra: HW Command Queue Support for Tegra SDMMC") Signed-off-by: Brian Norris --- drivers/mmc/host/sdhci-tegra.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 2d2d8260c681..d1d1ae9b2a86 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -367,6 +367,10 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask) const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; u32 misc_ctrl, clk_ctrl, pad_ctrl; + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && + tegra_host->enable_hwcq) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); if (!(mask & SDHCI_RESET_ALL)) From patchwork Tue Oct 18 03:57:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 3922 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1765206wrs; Mon, 17 Oct 2022 21:06:00 -0700 (PDT) X-Google-Smtp-Source: AMsMyM51jIicJSZ76181JIbGHad3RjCFaQeIKIjmtwapc45XekoQ/Bu20aEwwwyRNnN31pL8kO7x X-Received: by 2002:a63:91c2:0:b0:460:609c:e60f with SMTP id l185-20020a6391c2000000b00460609ce60fmr987956pge.447.1666065959850; Mon, 17 Oct 2022 21:05:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666065959; cv=none; d=google.com; s=arc-20160816; b=wNENRhfgjr96fnB0UzIVnIyabkOfVDoJj96pkIuLhl3T7JHR8IlydI3g7PzUzXVGNw Zqhl42zSYNDguy3AYUmjbWMlTjWT7wc6p5JR87FWfO46SXsSrsQDpIcK0vXRHlpktKmN 7BG+2tPpu5Z2AWWgP8itWoLjDyaVS93/+qkRzGFr+8LOx8dVJ9fmP1a8WIEAVIEQl/Hv OLMJRZzUb8N1CBWLhWkrg2Rds93pgleXb1CMAmzVImB1wUosTxCciiKkrkSXCmjN0sOv MUwxsFrcS3dCP4Tz4g9q+d1C0JYpNY+VM6b5zgTzImO6T8ZE+H8U4caW+C3ZQivdltsl JTOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9p3m7T6e0mIj8rcCXtywVHD8sGWIzKCyjF4TP7KLyZQ=; b=0gvROL7V7Ob2hIJlElWjg+0vIhTHu45LNKTGXS5CVpNVr0OIA78uVCYmPhRcYEt+KY yBQizZ7eI5SgkZKDSD1avCDedMhf1aoIM3sD3+fWPk+rT38vV5jFpNWb3tJBE/ET8q/l n/xhWp3y96i07e9SqcpBtDF1GDQCcx5Gd07owtIwIQKemeKyHXMzaaTkaZEjogwXtdMP XncjSaYuYUhYFTTbFX8PnmqEpHxdxd1q5l0N+1Pv/D4CeRv6Ob1s8iVXL7RVh9UvpaZN TmUNTULqsiyJJTHd974rtZCg4ZfSdzLGpEdjuy14VAWbTVEOHEUh8vqwLpCWvbeTp3cN moEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=F4EZTL9t; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (out1.vger.email. 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We've now seen the same bug on at least MSM, Arasan, and Intel hardware. ]] SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't tracking that properly in software. When out of sync, we may trigger various timeouts. It's not typical to perform resets while CQE is enabled, but this may occur in some suspend or error recovery scenarios. Fixes: f545702b74f9 ("mmc: sdhci_am654: Add Support for Command Queuing Engine to J721E") Signed-off-by: Brian Norris --- drivers/mmc/host/sdhci_am654.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index 8f1023480e12..187a21086791 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -378,6 +378,9 @@ static void sdhci_am654_reset(struct sdhci_host *host, u8 mask) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)) + cqhci_deactivate(host->mmc); + sdhci_reset(host, mask); if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) {