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Mon, 17 Oct 2022 17:26:11 -0500 Subject: [PATCH v7 01/12] x86/cpufeatures: Add Slow Memory Bandwidth Allocation feature flag From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:26:11 -0500 Message-ID: <166604557098.5345.506719195181543985.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT086:EE_|SJ0PR12MB6782:EE_ X-MS-Office365-Filtering-Correlation-Id: 819b0636-76f7-465f-c32f-08dab08e9993 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ILQD466BywDQy5894ZxmjJoBOlM/UfUbERSf47UPTLLFGA5pe4W1qJXNKk69D5V5sJ1KjTdxiTZmriCD3dhufb1ttiRn6L4zkZYR7JOmX4gvbP0PhCeuR9kkpNOUjlL6c8Jsgy52RXb+2RxmFxfERsPQWqIrBzmBsUV1UWeLsMesOik7u0vM3zTR/qTaErmvuzw5TdVcxPpZLQpl81RthedILb702xuvHA7MPzZJ0WL+kksNrTz5BYS0huDC1ZVL508MHPlXLERdMMdAvyhV1j+GG68evUueSoIiGDGJKUlRbEVmfVALMHuvZfnpBeMMzy9YfyEA41Xq1fYVjiRlVRamKCay+CiZckBp/kbu7GNUZZI4+OViSmIQI5rmpEg1t2eJfPHtZ1zc4f4KOlJ17STT9BSmw6I+YAgO0EqEx9DGwXpL/TWHvao6SaCIfHvhrn4OYPB3AoMAX3kGrEQ3w9FgxO6yO6FofzvwleHKBwBjn9mw4ACSqy6h7aQT4OVwzo0kv1FhU3DY8OKNXW/9WKI+HxsvO2hplAzwLzano99v0jo2zol+LPcW64CtDMf+wutNvNGJiLaNArtWgpmOjTSP+ll4nxYIo2xYTkeCxuyQR+wwQTWPs/Pat6TH3WaKDc9Tbyll36LfaXZQEkANVuLz1XQ4a+pdpZO7s4jAyjs/C0Z71iVP3bDiEfASvkx2anDuMo/ieFSx8GJ1DIxgbiE/KI3UHVAKUdJqcxfjrjp4TzAk6H/0MMUezExJVyULNKxzrjdIL8SwbkbeeWjRIRT0F6GcWCouItBAUl5WH/k5feDuSg/oMSpo6adrMQHj/fk1krqEQSj9dx33049EaIj7ecLwHrSm0/FAiXjjy9ErYP6mVYj3t+oHNW6Y/3RO3kFVf7AgVKWbPFPBp6k+Mg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(7916004)(39860400002)(376002)(346002)(136003)(396003)(451199015)(40470700004)(36840700001)(46966006)(16526019)(40480700001)(2906002)(4326008)(26005)(9686003)(82740400003)(16576012)(186003)(33716001)(8936002)(70206006)(86362001)(110136005)(336012)(54906003)(8676002)(103116003)(478600001)(966005)(356005)(82310400005)(5660300002)(44832011)(316002)(7416002)(40460700003)(70586007)(81166007)(36860700001)(426003)(47076005)(83380400001)(41300700001)(71626007)(36900700001);DIR:OUT;SFP:1101; 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With this feature, the QOS enforcement policies can be applied to external slow memory connected to the host. QOS enforcement is accomplished by assigning a Class Of Service (COS) to a processor and specifying allocations or limits for that COS for each resource to be allocated. This feature is identified by the CPUID Function 8000_0020_EBX_x0. CPUID Fn8000_0020_EBX_x0 AMD Bandwidth Enforcement Feature Identifiers (ECX=0) Bits Field Name Description 2 L3SBE L3 external slow memory bandwidth enforcement Currently, CXL.memory is the only supported "slow" memory device. With the support of SMBA feature, the hardware enables bandwidth allocation on the slow memory devices. If there are multiple slow memory devices in the system, then the throttling logic groups all the slow sources together and applies the limit on them as a whole. The presence of the SMBA feature(with CXL.memory) is independent of whether slow memory device is actually present in the system. If there is no slow memory in the system, then setting a SMBA limit will have no impact on the performance of the system. Presence of CXL memory can be identified by numactl command. $numactl -H available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 node 0 size: 63678 MB node 0 free: 59542 MB node 1 cpus: node 1 size: 16122 MB node 1 free: 15627 MB node distances: node 0 1 0: 10 50 1: 50 10 CPU list for CXL memory will be empty. The cpu-cxl node distance is greater than cpu-to-cpu distances. Node 1 has the CXL memory in this case. CXL memory can also be identified using ACPI SRAT table and memory maps. Feature description is available in the specification, "AMD64 Technology Platform Quality of Service Extensions, Revision: 1.03 Publication # 56375 Revision: 1.03 Issue Date: February 2022". Link: https://www.amd.com/en/support/tech-docs/amd64-technology-platform-quality-service-extensions Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Signed-off-by: Babu Moger --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index b71f4f2ecdd5..583b88bcc7e1 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -304,6 +304,7 @@ #define X86_FEATURE_UNRET (11*32+15) /* "" AMD BTB untrain return */ #define X86_FEATURE_USE_IBPB_FW (11*32+16) /* "" Use IBPB during runtime firmware calls */ #define X86_FEATURE_RSB_VMEXIT_LITE (11*32+17) /* "" Fill RSB on VM exit when EIBRS is enabled */ +#define X86_FEATURE_SMBA (11*32+18) /* Slow Memory Bandwidth Allocation */ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index fc01f81f6e2a..5a5f17ed69a2 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -44,6 +44,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, + { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { 0, 0, 0, 0, 0 } From patchwork Mon Oct 17 22:26:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 3774 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1669469wrs; Mon, 17 Oct 2022 15:29:01 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7Jl0sKU2GuFv+3cQWNW7W4BpjpA2n8gdE2uOMMCjEjkKUSOUXP3DTyt8NBMVIUNxseDkq5 X-Received: by 2002:a17:902:f693:b0:17f:6974:cf7f with SMTP id l19-20020a170902f69300b0017f6974cf7fmr13534131plg.60.1666045740867; Mon, 17 Oct 2022 15:29:00 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1666045740; cv=pass; d=google.com; s=arc-20160816; b=U4S37OGC/oNxKa4bQ/n4jzpq2iWZrOrlp57yIfBq0nGx/04/plxJVGGAb9LTmLokZk bm/jOwA4SUZkVpHMLGbH06s65TKRw7Xd7IMI/xP0QpEoj0dJb6w7iDBrrxZiNVz7UyU2 JjIJqDWOnZsAGSSk2s4101xgamAYlnjt/0VDdF5p5zk5bqGgJh0gJb9ADfoi8P+OvMIJ WlyxxuaUJVbz5zG/rBl9ea5XXOAzi5/LlCkRFZbDt3CdCC2FOlzelmPtJ1ODsf5mjfRa hPRxU0pBNl+IVLr5R9PM/u2yM5y9HIeDw4Xr0L7ZMkO18xhxqw/L7BYvfnKufiR5Sj6v oAnw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:cc:to:from :subject:dkim-signature; bh=eXUWND517tmbByaWEbc2CT2bAWf2K7vLcbL3Ozw2Fjc=; b=s6yg6zYRZcaoyp9Kv1+peFZiRa8Gt4zTPU2BeWFTpA5KcQoi66aGoe810vUADikGiz amJfOHpOonw4mohOmsEx2bqMfySLBpKzS2Y7D2Ehjj+5uLOc74NBRzo8pf5xwMKeQVAT D1wntXKRkqsrANHrMRhaWkT1z8P4/NvzwKL4jgz9NEu5xi2aIGhW/Se7/1tflNNL9N27 B5uI8YvQchTVJyes3/KSF0rYe/WS5eWn/UcCR8EgHLW+REb2G3s7Bwf9aiNt7OzgUu77 48oABNc7ruNFkoHLzYOBSI+IyqaipZJR7N2hQ233NQA446xU8X2FdWdV9S7hiQnJcYiR GyWA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=0BF8Q8q6; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Mon, 17 Oct 2022 17:26:18 -0500 Subject: [PATCH v7 02/12] x86/resctrl: Add a new resource type RDT_RESOURCE_SMBA From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:26:18 -0500 Message-ID: <166604557814.5345.10995820967282890535.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT025:EE_|CY8PR12MB7244:EE_ X-MS-Office365-Filtering-Correlation-Id: 48c85109-db11-4930-d2eb-08dab08e9dce X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: TzAZGozJII5MupL/0pJd6vCC2vPd4ZhggQDouLnJ196wqGN2AFTUiEFA8i97gN74dHq5SR6yTI1gJNStI+MsFzMuFbM3F9ZhOtGsTYZyA+0UMe4OfLVI/oYto47JzAy+2JS2EwTQBSxqrG/Q+4U2ZiauVZVt3AVpsI8dBL27snN+IQWVJV5Zhg8yaRtEYtfRWL7E4jazHxo53OfsCYVXIs7JeZRxxmgp6MaSVZMUYYfdQ5FSNJMPN6GjO8RydWJgGGK8FUHnYJBSPI5hzUTJY3SZIqa2FykS/+gl+48xeIEzA4b6g4PA0Nf0FmUtUyNMRwom6tip5SmZJpOOFFsRmNCVBc/4xeElaZPr7jDfrf6ywxKA2uUxfxn3P3/wOW3MH05XibS7OT2+qpX5FlUDstl5Lql4OdIHXJjD+3AGcOQTSoWjoUB3M4XwZ5lgJ4u3SQa1gNVykoKzjoDtxXZpS8PrCnutHN9wjpPpWosChlrlSsVEcT6BAlVPURWA0fADuQfmyuzFPEkWCeJrK9aXB/YqPWJhD3EX9uCm1NQZYVi4WkLTZoJC060zDBFMGyzG62kwQpli1VD5DLGbuX6J8wWqyH+QpEIblYsntDcPpDZKqgsL0AqziCF664+Xapf2s79BdZWDqBXevmnvyzb7oTYPw/zgeFaXjW3m7ztvwm2Hh2r/FZQ8SfIfpv1jXIiEQ6U+EZBOAbQODklyJIvZ0ZXeWr1PLzA2VSAsOUcyKvUJ4jUQwvh0U5RkyGab65U1woEHU95LivpNtqw9pGwfyra1vUGI+ogi/SbwRsJLmsg/mLSaQnsW9J96eaLhqOOGfHvfAgPlRtYfkphminMY3A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(7916004)(136003)(396003)(346002)(39860400002)(376002)(451199015)(40470700004)(46966006)(36840700001)(47076005)(426003)(81166007)(82310400005)(82740400003)(33716001)(356005)(40480700001)(86362001)(103116003)(40460700003)(36860700001)(70206006)(70586007)(110136005)(316002)(16576012)(8676002)(7416002)(44832011)(54906003)(5660300002)(16526019)(186003)(336012)(2906002)(8936002)(4326008)(478600001)(9686003)(26005)(41300700001)(71626007)(36900700001);DIR:OUT;SFP:1101; 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Signed-off-by: Babu Moger Reviewed-by: Ingo Molnar --- arch/x86/kernel/cpu/resctrl/core.c | 12 ++++++++++++ arch/x86/kernel/cpu/resctrl/internal.h | 1 + 2 files changed, 13 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index de62b0b87ced..efffce716f3a 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -106,6 +106,18 @@ struct rdt_hw_resource rdt_resources_all[] = { .fflags = RFTYPE_RES_MB, }, }, + [RDT_RESOURCE_SMBA] = + { + .r_resctrl = { + .rid = RDT_RESOURCE_SMBA, + .name = "SMBA", + .cache_level = 3, + .domains = domain_init(RDT_RESOURCE_SMBA), + .parse_ctrlval = parse_bw, + .format_str = "%d=%*u", + .fflags = RFTYPE_RES_MB, + }, + }, }; /* diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 5f7128686cfd..43d9f6f5a931 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -419,6 +419,7 @@ enum resctrl_res_level { RDT_RESOURCE_L3, RDT_RESOURCE_L2, RDT_RESOURCE_MBA, + RDT_RESOURCE_SMBA, /* Must be the last */ RDT_NUM_RESOURCES, From patchwork Mon Oct 17 22:26:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 3775 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1669552wrs; Mon, 17 Oct 2022 15:29:20 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6sidkNiyvD2ln4wuArorWuPFpbyUlDP5qBd6Ng4hzG0c1baqG4zS2C4tPPdw99Nuz5OpMd X-Received: by 2002:a17:902:f643:b0:185:3e6d:6171 with SMTP id m3-20020a170902f64300b001853e6d6171mr13852802plg.123.1666045760674; Mon, 17 Oct 2022 15:29:20 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1666045760; cv=pass; d=google.com; s=arc-20160816; b=AiAyx8tgIEsU0jDj42EDq+V64KfmY7HkEszov4JCWdp0dnTiViTno+iz/5jtcKfFos 5pPnP5mqW9FBLO2OjvYGLGhX/ikiGa92GIz8oZ6Z+oMtd9o4uwZxdGx1DY0XLyTfCRU0 1E3sBA/VNcsl2fYSh3JIBu9hI/aKUbLh4UXHbFJNPnU3ZoKQeXrE2rEU3xjph9tP9xiZ zUS5s7Tb2eTqPrpbocYCrXeBrGIYrS14j7NonhjRdZ6n45SAxQR6IgLCVcPo0Tt9AKCG 22YtxI9kXXZzctuvnNWVQSZgqqC7gvkKyDYr4E8TozEsJ8pMCAmQOwgUSFsL7umTSh1c zjhA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:cc:to:from :subject:dkim-signature; bh=jSm02XV3XZEFn04nLHzL7xnXTw3Dm4EvTrmeFsesXnk=; b=cCgYsRuwOJgpc8z+D9yilLiFkgNWDvTKZ0s5+VPszIjFCAG05G3LbrO/rDN5eIVAhm wruWfJFq7nRxkXDhiwBiZPS7YSRIKPY3ulSpjDUKBZVdBpklmUDm9gDH3qHL8kQjIXXY BtR5pSKz3BKhoAOlqNSj9+aLsN1Cz1aEvkD2/fQ5VOymQbln2/ky1DtTUFwXVcAd15Rn 3qY3GfGLmnr0ptlE3Jf/wSCri3ewlumYt1kk/Fitw03N0tPQ1MtdKwWqtARVNme7GOuG kO/r3OnHfb+QTYHK43+LYftZQ8TR9mKBGO3xWb8MR2n94gfIHAbp3XL6W2kVr2NyTNoc zpmw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=BvIMmDZt; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Mon, 17 Oct 2022 17:26:25 -0500 Subject: [PATCH v7 03/12] x86/cpufeatures: Add Bandwidth Monitoring Event Configuration feature flag From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:26:25 -0500 Message-ID: <166604558527.5345.9308279363992246757.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT063:EE_|BL1PR12MB5208:EE_ X-MS-Office365-Filtering-Correlation-Id: 4dd98b17-abcb-43ba-9051-08dab08ea20d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: J+WceEQZoKApUnvvU4WNGjrxW+r8g242aO/hmKGIES6yBeeW6F/sxwkFuzYqD+k0J1kWm5zyQL0DA6FubUrwUx/1KQGqhxnFt1IUK1ZDxwKLgTsRNLg6MonTwLlvghxdDOwW9YQekV1FU+uCZ62HVZcdOvkYH/9rxMuXek88AgCnda9xGQhv0kj2RI1agv2vLgl09/TNyGfxJZbLt3gFTwM0zoqQjybrUfVs43EaDQ93HScw7mxUbeD8XSbxuGecJoHmXtT5grf850Hg56moP7vyd5eaVl3gNBpXPeJTVfaBMtBRZ9c9s/oUT3x1cWSTFDCgOihecxgIpqkcna7uGSeDI7pdZo1B+9RSZZn6gnvbiAUd5yjt/d2yMU9pU2YDCUDl0o44b0QHHtkSwcdvYokuG2lNTPNnHDe6h0j4q3Y7BVekHNpF9I/GYbdsUpBoHnzQiB7fIMSvtYuTZoVMSxx2yMWD5psWOxmLl37lou8oQV//AF9ekxxaxmt45s+PYOIH/xJnVFyLKvXl5QxEHIr/tAk7M8nqdGkQjYviONZXESPU0+So4foFuMbwV6As92LNNrGwuL4ceNupu0sFXsSVg5/x0a5myqi/XSPjtm+J8zRJdEHJEPEQ+08IWsiI3DqPRDfzgEOdqaA1cBcLsYGMCNWNkIVVDSEyzDlU5uLbM1dlLxNbQHZKnHi1qlw5fVbBz8HzcjmdYUptGLaDW6THG8AnsL9lw8+/XcgaeYZ42BPHsBHM346s7yyCzKWEb7RoKzD/K2K+xbClkLA/7Ox4g2h+lwt+uCIGKln88Z1trisYtOymeeOyus/KFW9xlyleOz/Zx+IpMimj1gITYdCaag5KUKqJ/bfmtaOmVtWkOJ8ZyVu7jrkLKoNJpscP3LiJfaXJSoa7FzHUC0vEjQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(7916004)(346002)(376002)(39860400002)(396003)(136003)(451199015)(46966006)(40470700004)(36840700001)(33716001)(26005)(9686003)(103116003)(186003)(426003)(336012)(70206006)(82310400005)(316002)(16576012)(70586007)(47076005)(478600001)(16526019)(966005)(83380400001)(54906003)(40480700001)(356005)(40460700003)(110136005)(2906002)(36860700001)(81166007)(86362001)(8676002)(8936002)(82740400003)(41300700001)(7416002)(5660300002)(4326008)(44832011)(71626007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Oct 2022 22:26:27.6520 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4dd98b17-abcb-43ba-9051-08dab08ea20d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT063.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5208 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746975599811139963?= X-GMAIL-MSGID: =?utf-8?q?1746975599811139963?= Newer AMD processors support the new feature Bandwidth Monitoring Event Configuration (BMEC). The feature support is identified via CPUID Fn8000_0020_EBX_x0 (ECX=0). Bits Field Name Description 3 EVT_CFG Bandwidth Monitoring Event Configuration (BMEC) Currently, the bandwidth monitoring events mbm_total_bytes and mbm_local_bytes are set to count all the total and local reads/writes respectively. With the introduction of slow memory, the two counters are not enough to count all the different types of memory events. With the feature BMEC, the users have the option to configure mbm_total_bytes and mbm_local_bytes to count the specific type of events. Each BMEC event has a configuration MSR, QOS_EVT_CFG (0xc000_0400h + EventID) which contains one field for each bandwidth type that can be used to configure the bandwidth event to track any combination of supported bandwidth types. The event will count requests from every bandwidth type bit that is set in the corresponding configuration register. Following are the types of events supported: ==== ======================================================== Bits Description ==== ======================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== ======================================================== By default, the mbm_total_bytes configuration is set to 0x7F to count all the event types and the mbm_local_bytes configuration is set to 0x15 to count all the local memory events. Feature description is available in the specification, "AMD64 Technology Platform Quality of Service Extensions, Revision: 1.03 Publication Link: https://www.amd.com/en/support/tech-docs/amd64-technology-platform-quality-service-extensions Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 Signed-off-by: Babu Moger --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/cpuid-deps.c | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 3 files changed, 3 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 583b88bcc7e1..bf0fd022e80a 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -305,6 +305,7 @@ #define X86_FEATURE_USE_IBPB_FW (11*32+16) /* "" Use IBPB during runtime firmware calls */ #define X86_FEATURE_RSB_VMEXIT_LITE (11*32+17) /* "" Fill RSB on VM exit when EIBRS is enabled */ #define X86_FEATURE_SMBA (11*32+18) /* Slow Memory Bandwidth Allocation */ +#define X86_FEATURE_BMEC (11*32+19) /* AMD Bandwidth Monitoring Event Configuration (BMEC) */ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c index c881bcafba7d..4555f9596ccf 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c @@ -68,6 +68,7 @@ static const struct cpuid_dep cpuid_deps[] = { { X86_FEATURE_CQM_OCCUP_LLC, X86_FEATURE_CQM_LLC }, { X86_FEATURE_CQM_MBM_TOTAL, X86_FEATURE_CQM_LLC }, { X86_FEATURE_CQM_MBM_LOCAL, X86_FEATURE_CQM_LLC }, + { X86_FEATURE_BMEC, X86_FEATURE_CQM_LLC }, { X86_FEATURE_AVX512_BF16, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_FP16, X86_FEATURE_AVX512BW }, { X86_FEATURE_ENQCMD, X86_FEATURE_XSAVES }, diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 5a5f17ed69a2..67c4d24e06ef 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -45,6 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, + { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { 0, 0, 0, 0, 0 } From patchwork Mon Oct 17 22:26:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 3777 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1669569wrs; Mon, 17 Oct 2022 15:29:25 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6O5d6a8RNWO7L67B+UFbU2w4GPAIiHX5h2CBjniXWzwPy+G9+mPQ4pI3uxBzl6MdIjVgZ6 X-Received: by 2002:a63:2a97:0:b0:457:23e9:586d with SMTP id q145-20020a632a97000000b0045723e9586dmr17574pgq.190.1666045765585; Mon, 17 Oct 2022 15:29:25 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1666045765; cv=pass; d=google.com; s=arc-20160816; b=BRQ4rYlxUQdPLM5yGwbdy7mfx3/1OzYFt+CaWvccpcpVq2TyJEVjAHtIzgOnmDgJH8 JqsfGgCcMyQxJEYghfysEI+GgtDuS4GW0HTMimS2+gSGca2tXPPXiUhJ27EYVTpY6kt7 DZiIkzTRLOMklC/iG2ebaFAFgIl+tdg6LKuT4rk6PtTQpmnX0jIDgWc3FD9+ByDQ2Wmf jEMxAU41TTVQNTh4eq7iwPNFrrKTkQRmmav8A54Eb3XK9Hlvq21/TqdHuokbwVEEMXSL Xx/Bv11iX7zGIVpqYEMBU68gkXAuO5aaepJ5ATgmyNhCcXiTH+pGM4FZO7IrcgA6jZNX wmIQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:cc:to:from :subject:dkim-signature; bh=Jy3+hTc1t55/XP3rywOlpjYoxQgTRAR725Zddfore9Y=; b=L5+3gqwoiU2zEvjrYTk5yZ47SIj1Eloys5nGx6ajrN1j7JhlvXJLpxf4PNcSjiDxB1 d/QgIyTQV/aXabvbdxHwnWgYaVfAZQIpB981KPd4iTanPyLfXTFH8u5ZGlXUmvypWYwR lcysnWkfgiUM6RcQ+n34borJOTTp8N7u9IfFqnX4h9XLCEgWh0w/5RuerAdcn/ePAdhx 2YIJAGnYtvUD837cidohApV1fO8jRk6QZroKucVLgXjbXKi2gj5l1v+v6p5H3JUmnOKv KPrHKhWfj0nB1wtcq8/Me4MuFnHr82ZN7jXEMEPHbNbD5rb3KzhJ6eOk2229Biu3BFiQ waJQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=k8vE4vHr; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Mon, 17 Oct 2022 17:26:32 -0500 Subject: [PATCH v7 04/12] x86/resctrl: Include new features in command line options From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:26:32 -0500 Message-ID: <166604559240.5345.4467065841093036343.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT089:EE_|PH7PR12MB6491:EE_ X-MS-Office365-Filtering-Correlation-Id: 5a627430-1050-45ed-1cb3-08dab08ea652 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: wHC1C0dv0fNE9g2Dv9FDilJmkIdRI4cy/FTedRJuTfsO/MMeCUaQkRrHXXaVneWb9dbQTSWLJKdrZjQhqAbJUk+PY0H8zMWojRZ8C93BMmIE3RVL0u2l6wC7oapVeqg9+1wFLNVUgVyXP5dkCqdRVo8/R0hOuOa33UhcB7kcLAPK42ysE7MkPsbKEgTCysSjPp4hK7jNd1muYt7tjG+fA6FGhVFPxUY1odVjihzDYFPzs31ZPUhB/C4uEsYyO/KO5sclhSia4itDQYAsiLQ/tpwOm/z1TvzhMCcM6Mc4Ub0wAUkV01Rwswgy2CvQezlA7XGkuwEfLuR6x1iXcNfYmSPIehsvqhKkut3tsy0qA8OFGY6dMjQD/+o92KVW5ffX1/X1/Djj0pMYLN7PBan2OaWqn5/wlDNSXX5ZKm0J/KBZcsN1h7EY6bg033WHR7nZYQcKCtsVk+qvLIdGAluNAvpjeR7ek3TtMOX26ZvFuuEHtP9kolj7/cVROuRB9iRDZbamblRoiEhavtJx+AEsKQlsjoVPKzXrlhEH1js0+leBrwqSEpSsYXx8iH4zCJ1cJFwCz3FfU5nmaW3bAO2SJaCSidjh7/ZY1e0CmAMGAHG0My9lzp9wyMoeaAXRoAPkvuiBIPETRQVq9HsQ8hFyFXcjDh71fhFsjdxCNKhgyhz/pbzXrZnREE+OJrX8EDSXgE96WzZUgs7yQTea+VkvDylhZzOYYs1DUateWBip3+xZAu9iIt1H3pXzUeWu8mr0S4alQEA/d6150u6ntT6fy4k4Pf2yyCj8rfiTVBC1bhTJgmBSn1XYiVXXARzor1ry6dibs0Wdtq7gdSbzsPA6TA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(7916004)(39860400002)(396003)(136003)(346002)(376002)(451199015)(46966006)(36840700001)(40470700004)(103116003)(86362001)(81166007)(356005)(82740400003)(16576012)(2906002)(40480700001)(83380400001)(7416002)(40460700003)(5660300002)(44832011)(16526019)(9686003)(26005)(186003)(426003)(47076005)(36860700001)(336012)(8936002)(478600001)(33716001)(316002)(4326008)(82310400005)(54906003)(110136005)(70206006)(8676002)(70586007)(41300700001)(71626007)(36900700001);DIR:OUT;SFP:1101; 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Signed-off-by: Babu Moger --- Documentation/admin-guide/kernel-parameters.txt | 2 +- arch/x86/kernel/cpu/resctrl/core.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index a465d5242774..f3f0870144fb 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -5190,7 +5190,7 @@ rdt= [HW,X86,RDT] Turn on/off individual RDT features. List is: cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, - mba. + mba, smba, bmec. E.g. to turn on cmt and turn off mba use: rdt=cmt,!mba diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index efffce716f3a..c7561c613209 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -665,6 +665,8 @@ enum { RDT_FLAG_L2_CAT, RDT_FLAG_L2_CDP, RDT_FLAG_MBA, + RDT_FLAG_SMBA, + RDT_FLAG_BMEC, }; #define RDT_OPT(idx, n, f) \ @@ -688,6 +690,8 @@ static struct rdt_options rdt_options[] __initdata = { RDT_OPT(RDT_FLAG_L2_CAT, "l2cat", X86_FEATURE_CAT_L2), RDT_OPT(RDT_FLAG_L2_CDP, "l2cdp", X86_FEATURE_CDP_L2), RDT_OPT(RDT_FLAG_MBA, "mba", X86_FEATURE_MBA), + RDT_OPT(RDT_FLAG_SMBA, "smba", X86_FEATURE_SMBA), + RDT_OPT(RDT_FLAG_BMEC, "bmec", X86_FEATURE_BMEC), }; #define NUM_RDT_OPTIONS ARRAY_SIZE(rdt_options) From patchwork Mon Oct 17 22:26:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 3778 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1669615wrs; Mon, 17 Oct 2022 15:29:37 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5XZ7Ngad6Ho9pJtoIhvfwq7xsF74mr6wvdfukUYLWr1KXy2HbKZnxs0pe0qcq+a2HUcyJQ X-Received: by 2002:a05:6a00:bc7:b0:562:d2e5:adfd with SMTP id x7-20020a056a000bc700b00562d2e5adfdmr31768pfu.4.1666045777731; Mon, 17 Oct 2022 15:29:37 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1666045777; cv=pass; d=google.com; s=arc-20160816; b=nM6WHquheSldR2Tb5aQwJwgJGjT8897IYbvuPbHlI30dSCD7jd1aoOFgWml+BPDldz a1DaUjMv308Y40MkHquHRAqj/Bq6uR9bLjmqRfUvlT13vX3TpnBoRUYx80omWkdfGE1/ gxxbjmzIGLTHNWdQTJNbGOOVIhCP7Ww2fdxMI5VQgB8vg8hkDL+L1ImVVsZb3i6LJQH+ 6bT2ej9jf2iFGY5vNjvr+3fk4oxezvkTGO0PKnKjeMQe9S6AS7jiGbXBEQ7xrybZd/uD t2dGqlwvTRVAItHBszmq0PJJR0SsnXJfsDPXJW8aPJhNAiWfzbYMVQQGEOQGp8ChyPyU Vo/w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:cc:to:from :subject:dkim-signature; bh=JfBGki9HRVqT7przs0JHfyPLhzpAd1Zf8oMs+cVxOWY=; b=Y8bXsTwZ/pyXi1WrD5PfdK7IC3YbTuVmn9URgTjrvhDzn0Ml0+SdK1v1Bc6slNR7vL BW1gJlNSE1K/yzXtdfNO39g0bH4RysNupK3g7o9WTMLY8uO7B91hpDSaBcRhoGoBEzQ+ hjB+MY46OzzTjYlOFSBqxPPqTCnwamfm+WpBVb+a5M7iJkrcr3ulfY5K7+xIRgE5tUFO M7EGilV04Q9ZOjaDH+8QzjskcfEK8qoIH6SkjllEJD84BiRgQ0M5IZDkCYZVthdssudc dW0YM8zquS/oCUs66RHev0q3YgFKxoZBJjfwK0qakirvK9E87AcgSjLEpVWPn/gQgR7q vVLA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=KYxctwft; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Mon, 17 Oct 2022 17:26:40 -0500 Subject: [PATCH v7 05/12] x86/resctrl: Detect and configure Slow Memory Bandwidth allocation From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:26:39 -0500 Message-ID: <166604559954.5345.14619487558472213422.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT021:EE_|CH2PR12MB4970:EE_ X-MS-Office365-Filtering-Correlation-Id: 999886e7-6780-4f2e-537b-08dab08eaa8e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: DerA3sPrPoqXYwvZb4jEBDJ0zWIodrVyhONBgP6vV2X8OsNu1ZB+qe6mhKIMuQlPOlISV21mmXlU93KnLd+OMbT1FvwhOpK4hXb8+RA+GTVYbmLJaHLF1qKs3m82VgxZOMN1X+xaMdgAsA7dXH8fW/TJG2HIAfB1ftqyOh23jge9Fgl5yOyl179I5GW+t+xQ+5koLojAOiizaXMsT2mMFYwurqbfm+ADa/rQC001FJIQe/lDgYETH9XcbMJL9h5B1lCi0UknjOwFndaJ5/ldDA+PdXPYlw7wL75aUOULXnEEdWGqq+is1NQ8VUmLl5KPZ32Ipk0VaBM7vhXcAa508UAHQ00dHDa58wSKYAVvyx/ThSIy7UjbjCp9OSedZG285uZ3tiX2KME/EfMksP+pxhP+OnqA2MfBR9BIW3S8GDNPL++m0ZnqctvYf3cZq3NqeLVOQRQJzOCryKoU5NKa1vkMZIHi0PqvCwjTxPFTd9f2d2I+ZBPcXYpourWq3qfj8Q4pb8YdyLMq17ZteuM8mPjUNe16vTzZX72l88CQ0Ot46tvpEeZFvFc6n52qgnT1w7RIZzTQzofhnGXNMM/b/8z3BmPuKLXzgkjOcdhkPt12HBOEIZTMs/q4GmcbRnQPOp574djbDugJMeIop5g8GnQA3I1KY6/F5cGUbA44OTXSztB37yjPJLS8jvkvadGkWHAHb9He3ZVCudHWPqAa/Nf3m5RhiSsUPConvRPg4BWAw9IIsBxOxX1KEYT3Ef5LvZ7grp+Nu65x6GPrQc6LUjfjybfu1f01lqegi2RXGd+k+dJQNpTWgx0t/GpQH5PH/PbMor7+fYmRjGlzvNHE3Q== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(7916004)(4636009)(376002)(136003)(39860400002)(346002)(396003)(451199015)(36840700001)(46966006)(40470700004)(9686003)(26005)(478600001)(36860700001)(83380400001)(336012)(44832011)(186003)(16526019)(2906002)(5660300002)(7416002)(40480700001)(40460700003)(16576012)(33716001)(82310400005)(54906003)(110136005)(316002)(4326008)(8676002)(8936002)(41300700001)(70206006)(70586007)(47076005)(426003)(86362001)(103116003)(81166007)(356005)(82740400003)(71626007)(36900700001);DIR:OUT;SFP:1101; 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Detect the available details and initialize the rest to defaults. Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/core.c | 29 +++++++++++++++++++++++++++-- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 2 +- arch/x86/kernel/cpu/resctrl/internal.h | 1 + arch/x86/kernel/cpu/resctrl/rdtgroup.c | 16 ++++++++++------ 4 files changed, 39 insertions(+), 9 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index c7561c613209..d79f494a4e91 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -231,9 +231,15 @@ static bool __rdt_get_mem_config_amd(struct rdt_resource *r) struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); union cpuid_0x10_3_eax eax; union cpuid_0x10_x_edx edx; - u32 ebx, ecx; + u32 ebx, ecx, subleaf; + + /* + * Query CPUID_Fn80000020_EDX_x01 for MBA and + * CPUID_Fn80000020_EDX_x02 for SMBA + */ + subleaf = (r->rid == RDT_RESOURCE_SMBA) ? 2 : 1; - cpuid_count(0x80000020, 1, &eax.full, &ebx, &ecx, &edx.full); + cpuid_count(0x80000020, subleaf, &eax.full, &ebx, &ecx, &edx.full); hw_res->num_closid = edx.split.cos_max + 1; r->default_ctrl = MAX_MBA_BW_AMD; @@ -756,6 +762,19 @@ static __init bool get_mem_config(void) return false; } +static __init bool get_slow_mem_config(void) +{ + struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_SMBA]; + + if (!rdt_cpu_has(X86_FEATURE_SMBA)) + return false; + + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) + return __rdt_get_mem_config_amd(&hw_res->r_resctrl); + + return false; +} + static __init bool get_rdt_alloc_resources(void) { struct rdt_resource *r; @@ -786,6 +805,9 @@ static __init bool get_rdt_alloc_resources(void) if (get_mem_config()) ret = true; + if (get_slow_mem_config()) + ret = true; + return ret; } @@ -875,6 +897,9 @@ static __init void rdt_init_res_defs_amd(void) } else if (r->rid == RDT_RESOURCE_MBA) { hw_res->msr_base = MSR_IA32_MBA_BW_BASE; hw_res->msr_update = mba_wrmsr_amd; + } else if (r->rid == RDT_RESOURCE_SMBA) { + hw_res->msr_base = MSR_IA32_SMBA_BW_BASE; + hw_res->msr_update = mba_wrmsr_amd; } } } diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c index 1dafbdc5ac31..42e2ef6fbdb8 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -210,7 +210,7 @@ static int parse_line(char *line, struct resctrl_schema *s, unsigned long dom_id; if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP && - r->rid == RDT_RESOURCE_MBA) { + (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA)) { rdt_last_cmd_puts("Cannot pseudo-lock MBA resource\n"); return -EINVAL; } diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 43d9f6f5a931..16e3c6e03c79 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -14,6 +14,7 @@ #define MSR_IA32_L2_CBM_BASE 0xd10 #define MSR_IA32_MBA_THRTL_BASE 0xd50 #define MSR_IA32_MBA_BW_BASE 0xc0000200 +#define MSR_IA32_SMBA_BW_BASE 0xc0000280 #define MSR_IA32_QM_CTR 0x0c8e #define MSR_IA32_QM_EVTSEL 0x0c8d diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index e5a48f05e787..1271fd1ae2f3 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1213,7 +1213,7 @@ static bool rdtgroup_mode_test_exclusive(struct rdtgroup *rdtgrp) list_for_each_entry(s, &resctrl_schema_all, list) { r = s->res; - if (r->rid == RDT_RESOURCE_MBA) + if (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA) continue; has_cache = true; list_for_each_entry(d, &r->domains, list) { @@ -1402,7 +1402,8 @@ static int rdtgroup_size_show(struct kernfs_open_file *of, ctrl = resctrl_arch_get_config(r, d, closid, type); - if (r->rid == RDT_RESOURCE_MBA) + if (r->rid == RDT_RESOURCE_MBA || + r->rid == RDT_RESOURCE_SMBA) size = ctrl; else size = rdtgroup_cbm_to_size(r, d, ctrl); @@ -2845,7 +2846,8 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtgrp) list_for_each_entry(s, &resctrl_schema_all, list) { r = s->res; - if (r->rid == RDT_RESOURCE_MBA) { + if (r->rid == RDT_RESOURCE_MBA || + r->rid == RDT_RESOURCE_SMBA) { rdtgroup_init_mba(r, rdtgrp->closid); if (is_mba_sc(r)) continue; @@ -3287,7 +3289,8 @@ void resctrl_offline_domain(struct rdt_resource *r, struct rdt_domain *d) { lockdep_assert_held(&rdtgroup_mutex); - if (supports_mba_mbps() && r->rid == RDT_RESOURCE_MBA) + if (supports_mba_mbps() && + (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA)) mba_sc_domain_destroy(r, d); if (!r->mon_capable) @@ -3354,8 +3357,9 @@ int resctrl_online_domain(struct rdt_resource *r, struct rdt_domain *d) lockdep_assert_held(&rdtgroup_mutex); - if (supports_mba_mbps() && r->rid == RDT_RESOURCE_MBA) - /* RDT_RESOURCE_MBA is never mon_capable */ + if (supports_mba_mbps() && + (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_MBA)) + /* RDT_RESOURCE_MBA (or SMBA) is never mon_capable */ return mba_sc_domain_allocate(r, d); if (!r->mon_capable) From patchwork Mon Oct 17 22:26:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 3779 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1669626wrs; Mon, 17 Oct 2022 15:29:40 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4cajJFUg4vSJsfK4aQ2f9fr5GE8ZFfrIeoPxpZ4nzH7wmtjGtzOQzwox+1QuNhlmWT47fI X-Received: by 2002:a63:2ac9:0:b0:457:24a2:6fa7 with SMTP id q192-20020a632ac9000000b0045724a26fa7mr5279pgq.484.1666045779927; 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Mon, 17 Oct 2022 17:26:47 -0500 Subject: [PATCH v7 06/12] x86/resctrl: Introduce data structure to support monitor configuration From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:26:46 -0500 Message-ID: <166604560666.5345.17936133716540279017.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT013:EE_|PH7PR12MB5952:EE_ X-MS-Office365-Filtering-Correlation-Id: 2cb674fc-a675-42a1-7d8a-08dab08eaed1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ROEm9rrqo0ftJy+Mb8b3wmDI8XWrOvRYt6k6l1gKcINDFE7Or7JhBd11PJyubPPpQ26qWYKyM9rTCF+m2klnl8GkupbAzS+FcedrIRqS0yY73EdXN4jse0hE0tpb1a+c/BBw0v0gLuckPZ48/9i8pk6rZ2JOQ1PAqe8MuugM6gJqPvxHBqeZTYmMnVSqgvv6lS/vEtJzZYI0v5gwiLi8gZSBCR13MbFDshQqZN3P0yQf03cV9g4lDipuIZ9dsYMB1V2rgQD7kPeZj468ppeMlyMRn+iqKaQgkKSJVOdX0lXgzFUBwGoDX7hnbFLjoVLFmzxHL5emCB7gqtISei3r202x/M0rzS/wNp1325YMn+3Pl70GznEIB6ZY09CJ2vXENy5dEbcRjTquVV78CadkeDtNiJcEp5TlpppvQDsn4NB54/n/y2GMJCH+jz+XK96gyc7BEK10bUaHFUOUGpMd+eUtwbgqwbq7caOdO7qr3hm8PmJxNgwMGs/RiYVlYiGSkaRQN9/v/KQCqCbsM0IljcQBp7ZzlZZZGDm+nf2O4GG5lrnYTRwsX3L4BnZS9kNbHJ9pyApYYMS9bcPidBruQHu3p//ckPxG7tswVrpPHpTAJDpzgRwrlUkaFeTBXyUYhLhAmdWqAjRJC0/TUv2/N12fvxkI3mDDDwcHAX5vGC2Fw2fe4X3tDj1xNjxAkPc5Ul/UQkK668Df/09OT6UNB7IQhOTCFT71y64pWxFv0XnFsAkKxA0VvjfB9REzn3NJJDZqsSiURtFvvroWEGmKW7pj0f74T8VAehIT6wPki0eMTMhUk45ZSpK8mziD8bq3glgy6C92y1sT4tM6k273KA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(7916004)(376002)(136003)(396003)(346002)(39860400002)(451199015)(46966006)(40470700004)(36840700001)(26005)(9686003)(41300700001)(40460700003)(186003)(478600001)(33716001)(336012)(16526019)(44832011)(4326008)(2906002)(103116003)(7416002)(5660300002)(8936002)(82310400005)(86362001)(36860700001)(110136005)(16576012)(54906003)(82740400003)(316002)(47076005)(426003)(8676002)(81166007)(70206006)(83380400001)(356005)(40480700001)(70586007)(71626007)(36900700001);DIR:OUT;SFP:1101; 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The sysfs file "mon_features" will display the monitor configuration if supported. Before the change. $cat /sys/fs/resctrl/info/L3_MON/mon_features llc_occupancy mbm_total_bytes mbm_local_bytes After the change if BMEC is supported. $cat /sys/fs/resctrl/info/L3_MON/mon_features llc_occupancy mbm_total_bytes mbm_total_config mbm_local_bytes mbm_local_config Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/core.c | 3 ++- arch/x86/kernel/cpu/resctrl/internal.h | 4 +++- arch/x86/kernel/cpu/resctrl/monitor.c | 7 ++++++- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 5 ++++- 4 files changed, 15 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index d79f494a4e91..46813b1c50c2 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -814,6 +814,7 @@ static __init bool get_rdt_alloc_resources(void) static __init bool get_rdt_mon_resources(void) { struct rdt_resource *r = &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; + bool mon_configurable = rdt_cpu_has(X86_FEATURE_BMEC); if (rdt_cpu_has(X86_FEATURE_CQM_OCCUP_LLC)) rdt_mon_features |= (1 << QOS_L3_OCCUP_EVENT_ID); @@ -825,7 +826,7 @@ static __init bool get_rdt_mon_resources(void) if (!rdt_mon_features) return false; - return !rdt_get_mon_l3_config(r); + return !rdt_get_mon_l3_config(r, mon_configurable); } static __init void __check_quirks_intel(void) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 16e3c6e03c79..b458f768f30c 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -63,11 +63,13 @@ DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key); * struct mon_evt - Entry in the event list of a resource * @evtid: event id * @name: name of the event + * @configurable: true if the event is configurable * @list: entry in &rdt_resource->evt_list */ struct mon_evt { enum resctrl_event_id evtid; char *name; + bool configurable; struct list_head list; }; @@ -522,7 +524,7 @@ int closids_supported(void); void closid_free(int closid); int alloc_rmid(void); void free_rmid(u32 rmid); -int rdt_get_mon_l3_config(struct rdt_resource *r); +int rdt_get_mon_l3_config(struct rdt_resource *r, bool configurable); void mon_event_count(void *info); int rdtgroup_mondata_show(struct seq_file *m, void *arg); void mon_event_read(struct rmid_read *rr, struct rdt_resource *r, diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c index efe0c30d3a12..4b8adb7f1c5c 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -746,7 +746,7 @@ static void l3_mon_evt_init(struct rdt_resource *r) list_add_tail(&mbm_local_event.list, &r->evt_list); } -int rdt_get_mon_l3_config(struct rdt_resource *r) +int rdt_get_mon_l3_config(struct rdt_resource *r, bool configurable) { unsigned int mbm_offset = boot_cpu_data.x86_cache_mbm_width_offset; struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); @@ -783,6 +783,11 @@ int rdt_get_mon_l3_config(struct rdt_resource *r) if (ret) return ret; + if (configurable) { + mbm_total_event.configurable = true; + mbm_local_event.configurable = true; + } + l3_mon_evt_init(r); r->mon_capable = true; diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index 1271fd1ae2f3..5f0ef1bf4c78 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1001,8 +1001,11 @@ static int rdt_mon_features_show(struct kernfs_open_file *of, struct rdt_resource *r = of->kn->parent->priv; struct mon_evt *mevt; - list_for_each_entry(mevt, &r->evt_list, list) + list_for_each_entry(mevt, &r->evt_list, list) { seq_printf(seq, "%s\n", mevt->name); + if (mevt->configurable) + seq_printf(seq, "%s_config\n", mevt->name); + } return 0; } From patchwork Mon Oct 17 22:26:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 3785 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1670541wrs; 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Mon, 17 Oct 2022 17:26:59 -0500 Subject: [PATCH v7 07/12] x86/resctrl: Add sysfs interface to read mbm_total_bytes event configuration From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:26:53 -0500 Message-ID: <166604561380.5345.17668177010598977321.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT010:EE_|MN2PR12MB4440:EE_ X-MS-Office365-Filtering-Correlation-Id: 7ff6a9f2-6240-43b5-d03a-08dab08eb884 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tgZHywpcPFrj6OeJpntb7TGgciC+2eDlRlRhi86pzFFzLgh9oBlKV62aZ4aOWui/mmThvg1d9vqnsSDLt632ipQ8B46a3Ky7RN667+CxyprV/1odg+TrAphRvMDAWB1rI75ba5dJHD5DgUa2Vw4iys2+SGEpWFqx2rO5SbxcMcsuTs+/p7a008sZKjPx+pGp0tY9F7ayyxNmOnZVE7F8Wqn4hGMZhk6VEKHbY0uWaRBVvBUn0Kz1lK5wpuiyRPafcV1eLWBbzOs+50t09Nd+M20V8UmR/KKkp5Pmgt9W8mcbWtqD8NO2t+dqvD0ULJC9B2NrOYMgAafCWJBhisD6r0uHY9e1mpBapAKAMHEIIo17HjcYH0uNCJkdJmL9qbEF03O/8puZgo/jUDmIJ9F3EfStanaMUNZrKeXnl3qSqAYE4tEEqTmoAM3bueJnQYevVtR6OEcEwFkRG09NZm4I845qWyBPWWZJ8f1drEvllgRQPJRZ2K4o+ZKu3C6ZAEJ5HKQq6MhcN13HKfQ8Q763mjogIqvgXB3PYNByPW785QYg2m1bDmUc4qqXJJlDvOo+3G3WbXBEguPWvxE4PuSMcnxGkCe+dlCW4hWWStd76qY/m9dUlsVrTX9ZcbuBOoj58yTbY2u5f6SEZEnWVM+14ylBnXjA8+DqRDxoiSA/xGe5jypXHB78FLzs1vhfbmj7t1fX/rLjrGNJG6Zq79KgK5ZLz5EvwhN4OZ9vekjx19BVw6cAw0LsEIvb93bqvMjTXLBGzteagKevbGBvFtgDn+2VJKEAjQW1amjLc0jO6yTpRm53uZ8uHaCPXGJ+y+mMDCZe/CvqFvyNdOTMtmgf0g== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(7916004)(346002)(376002)(396003)(39860400002)(136003)(451199015)(36840700001)(46966006)(40470700004)(356005)(426003)(47076005)(336012)(186003)(2906002)(16526019)(83380400001)(82740400003)(33716001)(40480700001)(40460700003)(82310400005)(36860700001)(103116003)(86362001)(81166007)(16576012)(54906003)(110136005)(44832011)(41300700001)(8936002)(316002)(7416002)(5660300002)(478600001)(26005)(9686003)(70206006)(8676002)(70586007)(4326008)(6666004)(71626007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Oct 2022 22:27:05.3434 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7ff6a9f2-6240-43b5-d03a-08dab08eb884 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT010.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4440 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746975786604941254?= X-GMAIL-MSGID: =?utf-8?q?1746975786604941254?= The current event configuration can be viewed by the user by reading the configuration file /sys/fs/resctrl/info/L3_MON/mbm_total_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== By default, the mbm_total_bytes configuration is set to 0x7f to count all the event types. For example: $cat /sys/fs/resctrl/info/L3_MON/mbm_total_config 0=0x7f;1=0x7f;2=0x7f;3=0x7f In this case, the event mbm_total_bytes is currently configured with 0x7f on domains 0 to 3. Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/core.c | 3 + arch/x86/kernel/cpu/resctrl/internal.h | 2 + arch/x86/kernel/cpu/resctrl/rdtgroup.c | 76 ++++++++++++++++++++++++++++++++ 3 files changed, 81 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 46813b1c50c2..758c5d7553a4 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -826,6 +826,9 @@ static __init bool get_rdt_mon_resources(void) if (!rdt_mon_features) return false; + if (mon_configurable) + mbm_config_rftype_init(); + return !rdt_get_mon_l3_config(r, mon_configurable); } diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index b458f768f30c..326a1b582f38 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -15,6 +15,7 @@ #define MSR_IA32_MBA_THRTL_BASE 0xd50 #define MSR_IA32_MBA_BW_BASE 0xc0000200 #define MSR_IA32_SMBA_BW_BASE 0xc0000280 +#define MSR_IA32_EVT_CFG_BASE 0xc0000400 #define MSR_IA32_QM_CTR 0x0c8e #define MSR_IA32_QM_EVTSEL 0x0c8d @@ -541,5 +542,6 @@ bool has_busy_rmid(struct rdt_resource *r, struct rdt_domain *d); void __check_limbo(struct rdt_domain *d, bool force_free); void rdt_domain_reconfigure_cdp(struct rdt_resource *r); void __init thread_throttle_mode_init(void); +void __init mbm_config_rftype_init(void); #endif /* _ASM_X86_RESCTRL_INTERNAL_H */ diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index 5f0ef1bf4c78..0982845594d0 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1423,6 +1423,67 @@ static int rdtgroup_size_show(struct kernfs_open_file *of, return ret; } +struct mon_config_info { + u32 evtid; + u32 mon_config; +}; + +static void mon_event_config_read(void *info) +{ + struct mon_config_info *mon_info = info; + u32 h, msr_index; + + switch (mon_info->evtid) { + case QOS_L3_MBM_TOTAL_EVENT_ID: + msr_index = 0; + break; + case QOS_L3_MBM_LOCAL_EVENT_ID: + msr_index = 1; + break; + default: + /* Not expected to come here */ + return; + } + + rdmsr(MSR_IA32_EVT_CFG_BASE + msr_index, mon_info->mon_config, h); +} + +static void mondata_config_read(struct rdt_domain *d, struct mon_config_info *mon_info) +{ + smp_call_function_any(&d->cpu_mask, mon_event_config_read, mon_info, 1); +} + +static int mbm_config_show(struct seq_file *s, struct rdt_resource *r, u32 evtid) +{ + struct mon_config_info mon_info = {0}; + struct rdt_domain *dom; + bool sep = false; + + list_for_each_entry(dom, &r->domains, list) { + if (sep) + seq_puts(s, ";"); + + mon_info.evtid = evtid; + mondata_config_read(dom, &mon_info); + + seq_printf(s, "%d=0x%02x", dom->id, mon_info.mon_config); + sep = true; + } + seq_puts(s, "\n"); + + return 0; +} + +static int mbm_total_config_show(struct kernfs_open_file *of, + struct seq_file *seq, void *v) +{ + struct rdt_resource *r = of->kn->parent->priv; + + mbm_config_show(seq, r, QOS_L3_MBM_TOTAL_EVENT_ID); + + return 0; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1521,6 +1582,12 @@ static struct rftype res_common_files[] = { .seq_show = max_threshold_occ_show, .fflags = RF_MON_INFO | RFTYPE_RES_CACHE, }, + { + .name = "mbm_total_config", + .mode = 0644, + .kf_ops = &rdtgroup_kf_single_ops, + .seq_show = mbm_total_config_show, + }, { .name = "cpus", .mode = 0644, @@ -1627,6 +1694,15 @@ void __init thread_throttle_mode_init(void) rft->fflags = RF_CTRL_INFO | RFTYPE_RES_MB; } +void __init mbm_config_rftype_init(void) +{ + struct rftype *rft; + + rft = rdtgroup_get_rftype_by_name("mbm_total_config"); + if (rft) + rft->fflags = RF_MON_INFO | RFTYPE_RES_CACHE; +} + /** * rdtgroup_kn_mode_restrict - Restrict user access to named resctrl file * @r: The resource group with which the file is associated. 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Mon, 17 Oct 2022 17:27:06 -0500 Subject: [PATCH v7 08/12] x86/resctrl: Add sysfs interface to read mbm_local_bytes event configuration From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:27:05 -0500 Message-ID: <166604562588.5345.8522911881213355951.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT079:EE_|DM6PR12MB4057:EE_ X-MS-Office365-Filtering-Correlation-Id: f72fade5-c9b1-46dc-6c4a-08dab08eba4e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: /NFwFSB80bKTSqNj3JYZ8GdnRRYhDZMer/tYkVPgJYHdNmvuSJgz9pgR08JEzI8exblPB0RvD03JMPIu1tf9AtSA+gBTk1mEc3gP28Y21ooAI/Gl7queu6W5D9Mc0RyZsOzCs7BOAeJ5FEkBv6yZcTtnXd+uFrAPOFu9HCObRMlHAVTL5smiXFov7HxxKEwcXMy3VM3BzEaWiHWSGrzunCsCjGanpIMkyTVLtvEDW9Vr3TZSQl4V8/nNSzNTsbQVAGvfpgnv0y/PKL3ANJINUYgSSdA1a6IaKWZtFIK3EJPdrQg/yBpf02SjElZYF+1UcH/Xo6o9FIS4YwKe6KHLE2ZEFlNVnyapuDHLkWA1mQb75YIst/gf7ykP34BcEoMBUUb/tGTdlb7Kr853lO6mFIrU3+owlutxDQRc0ywjLPyezuGGga0Ly1g9p5SJdoa9JQuAvQL7DJnQQPioPj4DQQh+p6y7EMfIG5G5Y6EXkUCD3696S9ub5XGFWjdX0tunDzEv41BGbLCyCVJJV2cNwbqgdulMEu+ZfKw98qPFPdwezDgovcGXIkwtoQTGr+/pXDuAb9Er9c5dL6HGRLFm/2c6jVKuCK/2UjHSEamJ1O7Hyjqvm/ITv9edzegN7D4TKG1ohrwyY9PYcAKtKZldRFSIIhMRnZVF4JTNBHaOFlxcEQKq3awZRulryvVjXot7dszBD02jOubKQH9qnQ33XyhJOVThSO8NvjysbU9D6Gcq2wDKIsK0JoawZdc1l5vxBIHUltgACZX8xjqRd376FND62DhzhY64yxJakgpdnR0uAAs6TSwQWmY3+Dm04+3PsSKd9mnEscIBiHR/xMI9eQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(7916004)(396003)(39860400002)(376002)(346002)(136003)(451199015)(36840700001)(40470700004)(46966006)(316002)(16576012)(110136005)(9686003)(8936002)(54906003)(2906002)(336012)(5660300002)(26005)(16526019)(186003)(103116003)(40460700003)(7416002)(36860700001)(44832011)(70586007)(70206006)(86362001)(8676002)(47076005)(82310400005)(41300700001)(4326008)(426003)(40480700001)(82740400003)(33716001)(81166007)(478600001)(356005)(71626007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Oct 2022 22:27:08.3424 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f72fade5-c9b1-46dc-6c4a-08dab08eba4e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT079.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4057 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746975660352237190?= X-GMAIL-MSGID: =?utf-8?q?1746975660352237190?= The current event configuration can be viewed by the user by reading the configuration file /sys/fs/resctrl/info/L3_MON/mbm_local_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== By default, the mbm_local_bytes configuration is set to 0x15 to count all the local event types. For example: $cat /sys/fs/resctrl/info/L3_MON/mbm_local_config 0=0x15;1=0x15;2=0x15;3=0x15 In this case the event mbm_local_bytes is currently configured with 0x15 on domains 0 to 3. Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index 0982845594d0..305fb0475970 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1484,6 +1484,16 @@ static int mbm_total_config_show(struct kernfs_open_file *of, return 0; } +static int mbm_local_config_show(struct kernfs_open_file *of, + struct seq_file *seq, void *v) +{ + struct rdt_resource *r = of->kn->parent->priv; + + mbm_config_show(seq, r, QOS_L3_MBM_LOCAL_EVENT_ID); + + return 0; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1588,6 +1598,12 @@ static struct rftype res_common_files[] = { .kf_ops = &rdtgroup_kf_single_ops, .seq_show = mbm_total_config_show, }, + { + .name = "mbm_local_config", + .mode = 0644, + .kf_ops = &rdtgroup_kf_single_ops, + .seq_show = mbm_local_config_show, + }, { .name = "cpus", .mode = 0644, @@ -1701,6 +1717,10 @@ void __init mbm_config_rftype_init(void) rft = rdtgroup_get_rftype_by_name("mbm_total_config"); if (rft) rft->fflags = RF_MON_INFO | RFTYPE_RES_CACHE; + + rft = rdtgroup_get_rftype_by_name("mbm_local_config"); + if (rft) + rft->fflags = RF_MON_INFO | RFTYPE_RES_CACHE; } /** From patchwork Mon Oct 17 22:27:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 3781 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1669885wrs; Mon, 17 Oct 2022 15:30:25 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5o+YEKNdJ7S0fM1s0+O8DoFechTEu/jbcXADvdJGJmtXfkTArzJwXVpWrEKKAq7JO0uVJx X-Received: by 2002:a17:902:f786:b0:180:6f9e:23b with SMTP id q6-20020a170902f78600b001806f9e023bmr76460pln.37.1666045825366; Mon, 17 Oct 2022 15:30:25 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1666045825; cv=pass; d=google.com; s=arc-20160816; b=XIE9aasDZksqcPn4WVXXxiXnneAj8hmkvF/qdIYa3FOV6p5CSADODfw23oL+ZDBIz/ oPQ3wlVvqlkpw0q7J21KbsaR1XMn8sVcdKAuI/5a34MX4peEamHpRqdkd2RRdRZjm7jh Hml0aNUp5rfS7WSNQPMD8iNdbgb5l8IEkQ32eUusQhJpO2tplrZamyJNFwsn6WbeaFSq baFPsO/WjjW7mHpLGjRYZvYlvhIPAIj9QWDexWZof+3dcaDYUgUnitI7aibryiOBrsv8 jts7XkiDZkmVhoHTBox2P4u9/dGWw42uL39Yqazq50WxlO4Xtxnh6B5KGi08X2w6swgy sJPw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:cc:to:from :subject:dkim-signature; bh=6bv7CzDbWswhhZMyEbNoAAkCOs7/1eJj6H82m1ZpCyk=; b=UHzB+XNZjGTvoSoAhy12yhrgcAYqsac6P9e0wWplq5v+UKZP4AG1agJU3LG1RIWO6w QAioCWT17Osf7Vbz9cGiFtmV+eNTNg24t/eMoXzoK4UFA+sBx3mapDrOVhlMQnrowd7V ATtP/UUSz0nvb5PxFF/bEZNvICTcCuluL+LVsGGBocgPsaTimw8DPUJgvdPbLnFbSQzR u8Gy+GhuIEOdRVv1GAZF1bHutRrulxHbT6MV7t2SnVgdBmxztmxsyFmwwMyUtycX3i/v 933W+yi0epAkVOtjD7WMYtJn+cGgW7c6cj5rGUQmPxL1kLSwYNlMXPwH5NvOBY7hseyb ByKQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=jGT2zPT+; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Mon, 17 Oct 2022 17:27:13 -0500 Subject: [PATCH v7 09/12] x86/resctrl: Add sysfs interface to write mbm_total_bytes event configuration From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:27:13 -0500 Message-ID: <166604563304.5345.2402589906956965706.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT086:EE_|BL1PR12MB5222:EE_ X-MS-Office365-Filtering-Correlation-Id: ac366786-2979-423a-1cfb-08dab08ebea9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 8QclPc0lSZWBi1OPFJ79Ni1i+cF0TeY09XyAenS+5l5tFzJwnbVr7oyBpmCvfDrLj7aGCXiOgHfl0+tiwwuKHxAlPGJjG46NXdeOaWkcEPmTHz8f1/0H9GNL//E1HyYdtWvE76AFygQ9pgBeQPEJzyVfqVyRCFHhEnWwVnL2UF3X9cAbPIXd5kplP+XPD7qBTVhvWgEPKfBcIif9l+Tw+NNOr0Z3c+3hFFCHK/9czs0Gpnvl4Yzp5IQvhNo4yxyhHvo3lgKLmTZpFNFaO7Zo26Mbrf6MTmnOaD7bBKECf/mehjMOeUwH8qDo9wOMNT6RrLpMDcibIexSK3RgHW9m1PI++cheZVagOfJvirSMbyoA4NF+kQuowmVItejfjNFrIC7jDsCw1j2CSVVlImnM4RjVQZbxxjP+j9hzO8IhZEjXrA0YAQnGtDiKIWfHR32reA69Up1ZxhvM5q9B7O9/VelMHyAUrmXx09aP56FCpogx1ItEs8o0BRlTScC+4K53nV1cxGFuLsS3h3MEHHDL5wXr0MtzPLxmmLPEwuqwz92XMqRluMbpMZEBFOQUViHnsAQQa7O6L9oQLcTCqrTGPiISpd1NQ7qpHqyr5l67j4drbHB1WvRrHYhrx67qE38wltPlIH2PtTD07xO+8GMWxBES1gZ7HSzzvXuRdjv8KcNCP1bGMlG7AZOGLIcJC46kmrs4BjLIi+VcHLvb4Fy4ua92vJlT2Vy/qRFXTmRR2qicSUTeZitng5kUAv7Lemxxmb785BvnyNp7d86/wLXneREWOdWnJvFFJchTlYCNv7a0ZT+v8tu0Y0RndklaLJJs1bB4GjvexVy7GJNcatufqQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(7916004)(346002)(136003)(396003)(39860400002)(376002)(451199015)(46966006)(40470700004)(36840700001)(16576012)(316002)(110136005)(186003)(40460700003)(44832011)(103116003)(4326008)(54906003)(2906002)(26005)(8936002)(16526019)(41300700001)(86362001)(83380400001)(9686003)(7416002)(336012)(70206006)(70586007)(426003)(47076005)(40480700001)(8676002)(5660300002)(82740400003)(33716001)(82310400005)(36860700001)(356005)(81166007)(478600001)(71626007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Oct 2022 22:27:15.6476 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ac366786-2979-423a-1cfb-08dab08ebea9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT086.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5222 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746975667533851255?= X-GMAIL-MSGID: =?utf-8?q?1746975667533851255?= The current event configuration can be changed by the user by writing to the configuration file /sys/fs/resctrl/info/L3_MON/mbm_total_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== For example: To change the mbm_total_bytes to count only reads on domain 0, the bits 0, 1, 4 and 5 needs to be set, which is 110011b (in hex 0x33). Run the command. $echo 0=0x33 > /sys/fs/resctrl/info/L3_MON/mbm_total_config To change the mbm_total_bytes to count all the slow memory reads on domain 1, the bits 4 and 5 needs to be set which is 110000b (in hex 0x30). Run the command. $echo 1=0x30 > /sys/fs/resctrl/info/L3_MON/mbm_total_config Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/internal.h | 23 +++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 146 ++++++++++++++++++++++++++++++++ 2 files changed, 169 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h index 326a1b582f38..c42b12934a0e 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -42,6 +42,29 @@ */ #define MBM_CNTR_WIDTH_OFFSET_MAX (62 - MBM_CNTR_WIDTH_BASE) +/* Reads to Local DRAM Memory */ +#define READS_TO_LOCAL_MEM BIT(0) + +/* Reads to Remote DRAM Memory */ +#define READS_TO_REMOTE_MEM BIT(1) + +/* Non-Temporal Writes to Local Memory */ +#define NON_TEMP_WRITE_TO_LOCAL_MEM BIT(2) + +/* Non-Temporal Writes to Remote Memory */ +#define NON_TEMP_WRITE_TO_REMOTE_MEM BIT(3) + +/* Reads to Local Memory the system identifies as "Slow Memory" */ +#define READS_TO_LOCAL_S_MEM BIT(4) + +/* Reads to Remote Memory the system identifies as "Slow Memory" */ +#define READS_TO_REMOTE_S_MEM BIT(5) + +/* Dirty Victims to All Types of Memory */ +#define DIRTY_VICTIMS_TO_ALL_MEM BIT(6) + +/* Max event bits supported */ +#define MAX_EVT_CONFIG_BITS GENMASK(6, 0) struct rdt_fs_context { struct kernfs_fs_context kfc; diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index 305fb0475970..25ff56ecb817 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1494,6 +1494,151 @@ static int mbm_local_config_show(struct kernfs_open_file *of, return 0; } +static void mon_event_config_write(void *info) +{ + struct mon_config_info *mon_info = info; + u32 msr_index; + + switch (mon_info->evtid) { + case QOS_L3_MBM_TOTAL_EVENT_ID: + msr_index = 0; + break; + case QOS_L3_MBM_LOCAL_EVENT_ID: + msr_index = 1; + break; + default: + /* Not expected to come here */ + return; + } + + wrmsr(MSR_IA32_EVT_CFG_BASE + msr_index, mon_info->mon_config, 0); +} + +static int mbm_config_write(struct rdt_resource *r, struct rdt_domain *d, + u32 evtid, u32 val) +{ + struct mon_config_info mon_info = {0}; + cpumask_var_t cpu_mask; + int ret = 0, cpu; + + rdt_last_cmd_clear(); + + /* mon_config cannot be more than the supported set of events */ + if (val > MAX_EVT_CONFIG_BITS) { + rdt_last_cmd_puts("Invalid event configuration\n"); + return -EINVAL; + } + + cpus_read_lock(); + + if (!zalloc_cpumask_var(&cpu_mask, GFP_KERNEL)) { + rdt_last_cmd_puts("cpu_mask allocation failed\n"); + ret = -ENOMEM; + goto e_unlock; + } + + /* + * Read the current config value first. If both are same then + * we dont need to write it again. + */ + mon_info.evtid = evtid; + mondata_config_read(d, &mon_info); + if (mon_info.mon_config == val) + goto e_cpumask; + + mon_info.mon_config = val; + + /* Pick all the CPUs in the domain instance */ + for_each_cpu(cpu, &d->cpu_mask) + cpumask_set_cpu(cpu, cpu_mask); + + /* + * Update MSR_IA32_EVT_CFG_BASE MSRs on all the CPUs in + * cpu_mask. The MSRs offset from MSR MSR_IA32_EVT_CFG_BASE + * are scoped at the domain level. Writing any of these MSRs + * on one CPU is supposed to be observed by all CPUs in the + * domain. However, the hardware team recommends to update + * these MSRs on all the CPUs in the domain. + */ + on_each_cpu_mask(cpu_mask, mon_event_config_write, &mon_info, 1); + + /* + * When an Event Configuration is changed, the bandwidth counters + * for all RMIDs and Events will be cleared by the hardware. The + * hardware also sets MSR_IA32_QM_CTR.Unavailable (bit 62) for + * every RMID on the next read to any event for every RMID. + * Subsequent reads will have MSR_IA32_QM_CTR.Unavailable (bit 62) + * cleared while it is tracked by the hardware. Clear the + * mbm_local and mbm_total counts for all the RMIDs. + */ + memset(d->mbm_local, 0, sizeof(struct mbm_state) * r->num_rmid); + memset(d->mbm_total, 0, sizeof(struct mbm_state) * r->num_rmid); + +e_cpumask: + free_cpumask_var(cpu_mask); + +e_unlock: + cpus_read_unlock(); + + return ret; +} + +static int mon_config_parse(struct rdt_resource *r, char *tok, u32 evtid) +{ + char *dom_str = NULL, *id_str; + struct rdt_domain *d; + unsigned long dom_id, val; + int ret = 0; + +next: + if (!tok || tok[0] == '\0') + return 0; + + /* Start processing the strings for each domain */ + dom_str = strim(strsep(&tok, ";")); + id_str = strsep(&dom_str, "="); + + if (!dom_str || kstrtoul(id_str, 10, &dom_id)) { + rdt_last_cmd_puts("Missing '=' or non-numeric domain id\n"); + return -EINVAL; + } + + if (!dom_str || kstrtoul(dom_str, 16, &val)) { + rdt_last_cmd_puts("Missing '=' or non-numeric event configuration value\n"); + return -EINVAL; + } + + list_for_each_entry(d, &r->domains, list) { + if (d->id == dom_id) { + ret = mbm_config_write(r, d, evtid, val); + if (ret) + return -EINVAL; + goto next; + } + } + + return -EINVAL; +} + +static ssize_t mbm_total_config_write(struct kernfs_open_file *of, + char *buf, size_t nbytes, loff_t off) +{ + struct rdt_resource *r = of->kn->parent->priv; + int ret; + + /* Valid input requires a trailing newline */ + if (nbytes == 0 || buf[nbytes - 1] != '\n') + return -EINVAL; + + rdt_last_cmd_clear(); + + buf[nbytes - 1] = '\0'; + + ret = mon_config_parse(r, buf, QOS_L3_MBM_TOTAL_EVENT_ID); + + return ret ?: nbytes; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1597,6 +1742,7 @@ static struct rftype res_common_files[] = { .mode = 0644, .kf_ops = &rdtgroup_kf_single_ops, .seq_show = mbm_total_config_show, + .write = mbm_total_config_write, }, { .name = "mbm_local_config", From patchwork Mon Oct 17 22:27:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 3782 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1670015wrs; Mon, 17 Oct 2022 15:30:40 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5/PKULMRJNYnnyFXy0wtBMttIIlDpsg+uNZxVmGrM069wjpZPLlQKDjnPscUqScz7PEuc0 X-Received: by 2002:a17:902:b598:b0:184:e49d:3042 with SMTP id a24-20020a170902b59800b00184e49d3042mr119725pls.16.1666045839931; Mon, 17 Oct 2022 15:30:39 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1666045839; cv=pass; d=google.com; s=arc-20160816; b=huButJaN2eV2E/aInx9VKTSA9Nn823UUjD33b0+gygMEJXVo/iB6sclZmqNN0EwMSg jqVHAsOWybnzB7g1C7zio1q5tq6+mPJcCP6ty9dITyvuW0Onk6IDMRlKPyCGsBIqX7kh b5ilOlTudJOcWfoVCpJ+tSYi9eKKGHq3GoP6gKe0MGtSYhFrDk14+nV5ihQhFbTjfV62 o9fLllovyAZ2/5mL73HzMm1LpUQUkHVfHVDPlvI4FWo1IkIOJcLEDJmDo/GwB03sCGaW 8AlRvkVgvkpQtu2jt8GnOzBVklIkDcEfy7nLtGV8eEunPd8dSIm5r8lVbqgL4oOeyBrw Vtjw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:cc:to:from :subject:dkim-signature; bh=Yq4oa+3zc/PBbhZYxnQdCj1S9LIubhbyf6Ixk9YWFLM=; b=OFN8UaAA370Rb11bz2OjPaM+vDv2TqtGACr4vlwrtykyrrTgzssYbsEDsOl0aJN9go LnosIYQlin31m0yYlKq33cN3wA2IoHjQWBChSKFMI2/82c542fvGyLW5l2Jq5wb70nWe EDVXX0c8x0iL/XQQy/PqTYlZm0lJsWCqPeXVcgWIAs5cCQcPFl3VFHSywJRPBzkL8vD+ 4A6TAxWeCz/Kgj7MPyXbSIf5PJ9Ia9xRXbESmwgzrCJgpL1kcLXoATuRpxEqvUv5T8eI 4gULQEAFGMQ1TXMP/stIjDcEWeEHNNVHRbq8hNZ/arEDAkYg4e2Rmhl6BC0AW8gRYjc2 vrFA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b="G/1Mp/Pu"; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Mon, 17 Oct 2022 17:27:20 -0500 Subject: [PATCH v7 10/12] x86/resctrl: Add sysfs interface to write mbm_local_bytes event configuration From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:27:20 -0500 Message-ID: <166604564017.5345.6396405092493072988.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT107:EE_|CY5PR12MB6347:EE_ X-MS-Office365-Filtering-Correlation-Id: 85c3bef5-342d-442d-bd15-08dab08ec2cf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: NmFYNOw9AxDmTv6CgWazU+cG0bgeD6lfq/232Dj7/TGVceOL7/gxZjSaktxrt/OCA+sZarFaXRfCbhRBejrSWpSIJdWfClSPATFRSap72R0k9QdQj66iuRKgKZwfNAYA8uxOglEMSouLtiKcx06g84MScNA5nexk/06O6nLktk5Cf11wW+N2wp93EjXG9Vae4t6xzPRMo++a5jporY10+0e4V6GkDBwdQsJMxT/u3cfQd0XufeCZgoAbA0HRmo1qIRhBivGkajO0FVY3XgLav32dZYvbX3KDrJjAUWlq5xfCSTa3DHO2R99MJcSsk+e1cg6YFejTuB0TKxHIEwhQFR7TeYHczqJ29yyGqnRTfw/RFjk1cpgsSaFVBVo53VT0ZPrSVj9UFVAZb0zN85k0nrqa2BAY1xkYBl4tN3diDp5tyFZ67i9w0YkYX/AlpxM3PqwAOkhjkWztt9vyu1MEDXaR8DRBy1+wTcjgoNreUZe/syrcfoZ7/yUe/O+dSB1Be2nyOTm04ojwJ2Qqhb0IWfW6vHTdSl6eGB5Vs7+9BcBoO61ldblrnD55mmTXFZhTdi37Y1yj12ttFH9xx0XfUxhnvfDWgUmvUjAdbDk3n4ES9XZS1WKaqBCD9yr1U1HjHqtpHndx3TCat2jooRiL7xfPqrbGf3e2scgjBi20Ox49Zt+c71/Wd30S2PdJI9mLuqSqYsVoaPT21QYGPiwxKH8i+a/tAQSGUQCub53A4xaAOq4q8zXASHeMV1AJh5EFJXyuNfXGS5pfufaKGu9xXBehrOUcrSBgvd00ZveSBH0jEofjts4/1OvFhJZGues9/stB9RB+Bno9xVihI8W3tw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(7916004)(346002)(376002)(39860400002)(396003)(136003)(451199015)(40470700004)(36840700001)(46966006)(16526019)(2906002)(336012)(186003)(426003)(40460700003)(103116003)(8676002)(26005)(4326008)(33716001)(82740400003)(47076005)(40480700001)(86362001)(81166007)(356005)(82310400005)(9686003)(16576012)(316002)(54906003)(36860700001)(7416002)(41300700001)(5660300002)(8936002)(44832011)(110136005)(70206006)(70586007)(478600001)(71626007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Oct 2022 22:27:22.6116 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 85c3bef5-342d-442d-bd15-08dab08ec2cf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT107.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6347 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746975683070676040?= X-GMAIL-MSGID: =?utf-8?q?1746975683070676040?= The current event configuration can be changed by the user by writing to the configuration file /sys/fs/resctrl/info/L3_MON/mbm_local_config. The event configuration settings are domain specific and will affect all the CPUs in the domain. Following are the types of events supported: ==== =========================================================== Bits Description ==== =========================================================== 6 Dirty Victims from the QOS domain to all types of memory 5 Reads to slow memory in the non-local NUMA domain 4 Reads to slow memory in the local NUMA domain 3 Non-temporal writes to non-local NUMA domain 2 Non-temporal writes to local NUMA domain 1 Reads to memory in the non-local NUMA domain 0 Reads to memory in the local NUMA domain ==== =========================================================== For example: To change the mbm_local_bytes to count all the non-temporal writes on domain 0, the bits 2 and 3 needs to be set which is 1100b (in hex 0xc). Run the command. $echo 0=0xc > /sys/fs/resctrl/info/L3_MON/mbm_local_config To change the mbm_local_bytes to count only reads to local NUMA domain 1, the bit 0 needs to be set which 1b (in hex 0x1). Run the command. $echo 1=0x1 > /sys/fs/resctrl/info/L3_MON/mbm_local_config Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index 25ff56ecb817..e744db5dc057 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1639,6 +1639,26 @@ static ssize_t mbm_total_config_write(struct kernfs_open_file *of, return ret ?: nbytes; } +static ssize_t mbm_local_config_write(struct kernfs_open_file *of, + char *buf, size_t nbytes, + loff_t off) +{ + struct rdt_resource *r = of->kn->parent->priv; + int ret; + + /* Valid input requires a trailing newline */ + if (nbytes == 0 || buf[nbytes - 1] != '\n') + return -EINVAL; + + rdt_last_cmd_clear(); + + buf[nbytes - 1] = '\0'; + + ret = mon_config_parse(r, buf, QOS_L3_MBM_LOCAL_EVENT_ID); + + return ret ?: nbytes; +} + /* rdtgroup information files for one cache resource. */ static struct rftype res_common_files[] = { { @@ -1749,6 +1769,7 @@ static struct rftype res_common_files[] = { .mode = 0644, .kf_ops = &rdtgroup_kf_single_ops, .seq_show = mbm_local_config_show, + .write = mbm_local_config_write, }, { .name = "cpus", From patchwork Mon Oct 17 22:27:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 3783 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1670119wrs; Mon, 17 Oct 2022 15:30:54 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5O5GTz3jo4FtCo+L9RZL4mesTlhJ5ok4zWZHv1gTrjeZPt0a5eCmV8nbBHmuqBrkc12iPQ X-Received: by 2002:a17:902:8c81:b0:178:1701:cd with SMTP id t1-20020a1709028c8100b00178170100cdmr14357305plo.138.1666045853978; Mon, 17 Oct 2022 15:30:53 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1666045853; cv=pass; d=google.com; s=arc-20160816; b=KBTDSgpZIeqcQdRQrxFfYLILVzBFXq69uQIoLwryfRS2cOp1PM9UzQmv/4IBuMLUMr XIxWoXikn+FAK9ffGFJz2EW0AoL98QCYnuX2Zyt0SuluyYj+LJrDyRzuCoXIlfRr9v08 ulzMCu/xN35M6zpZPhC/7KzLoLaOUUpxUL0WytoVB+6JLwhnNf07UV0vOwG1sSpRJrt+ vcetHpigJQ1G2fGf+hSzkwKx1o/j78ihkqcwO9uQzw932YpsqsT8U8lp2n6MN9m46jl6 clnMJgavkcYodN5oo9wSSXhPCjj0WXo0SG11XyDQ+nX3K3x3HXiT8b9uFldl96B03ZXJ JS6Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:cc:to:from :subject:dkim-signature; bh=NICPXrq+QsQoxlNMsQMMrBhT49k4nzEuqoTHOywL1uA=; b=xDyCzA1kON2kFZgYbkj/U6oNVAmphV24eR0kRDuA89isPQ7sjEeQp7ZxdEPwH6mCXR gxrPuizdXYuWn3qFOCbxwI9zDynbFzx0ZqZ5zTR/a2qyMYIFp1qnbTOSz9SGhYa7MLio 9aMJxOM6k/9Kof8hqusYdoR4jp9AZlJTYbww8lAsztpOhQ67VWMLlFKIxU9gjV2gRTdD xvWxo1r98jsASwx/5m46kAaYPL++jwSytRbNly6/mReVmGxxd/f0s66xu+Ookl2ks+7n BFYTTO6SHOicLTWsEK8W/YBSS6LO38Ev+m2WuyUlXqaEZHDFW81D8wivt77RZntgGX3E OdfA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=J68xD7SB; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Mon, 17 Oct 2022 17:27:27 -0500 Subject: [PATCH v7 11/12] x86/resctrl: Replace smp_call_function_many() with on_each_cpu_mask() From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:27:27 -0500 Message-ID: <166604564729.5345.14834531439162556392.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT071:EE_|CH0PR12MB5042:EE_ X-MS-Office365-Filtering-Correlation-Id: 29b24d8a-a7df-4b67-945a-08dab08ec6fe X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: vTMQ5IWjcM3Lj3FwhPWWkfi/c0mdwDygq0Pnn+dqD1tx9hrrcOSVatHTAP7k8tz1x1X4GzyjrFH0VL7Ziv/qvqzvIZOSccnRrV0xcfhgznQz5w4tv139r0Nh/e1zdPtpz3PFNjybo2fz8ZX+78bzBNoqE+g8rCqQbnhsM9N9AQUeHpmYhwJMI9AO2byOeL0n3DyNiALTetTkJKUHg+jMtX08Ez5AVWrzoZ5yx2vcg4E0wvq2UbpaInm6iwGbO77R/lgyEo/IuPFalXdHYVKyuM5ReT66T/kgMRlk5rrR2JkS7DO3hdol4zh7l1csFijmu9Acqw2s5L7B2gdCL9uT8uQL4led+mSsu0v5ibOFWT0Qq/Gtxk9g3OOskRNCWRS3Ry2/6hhf7x7iACGJAJJlzqGrNYI0ht+qfltH/2+3lZEVpn18L57GwKNlbzqn4Lklp/eKdW+4KGIoKv8or9MDGQzERODOl1WclCamkrQ8LKQ+y0Aq4HzSa0yzgz/wN2LDT/YEwyd26e2kBrx3hO4r2LIGuJNIp+Xa9x43nQmB2jnPx9x8BA9d93HjxEwgfYEevrjh3XJexHbh7pg1FBJInnVkuvRHEtjz+QOfmhrHrwuz5YMMzAF8NMVlCcTe6WNOeKPYsRd5ge3yeCH5bOjchkdvaibFvJ+poyR0bMSrCb508BwVSw7Uy4nDCBXYHgT7DyjvYNkYBQAIesP2u7Gan2+G92xPpwwfgQnqAcOkere/GGUf8PjzFXNARQekvQvAwEs69s0ghwgf4kAfQCOLIvBNvOm6FLnsy2NZGUb7I+bQ78OQpK5waZvtKEGistNyO9t5SgSqeNSAKmeaxTkn1A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(7916004)(4636009)(346002)(136003)(376002)(396003)(39860400002)(451199015)(36840700001)(46966006)(40470700004)(54906003)(110136005)(5660300002)(44832011)(7416002)(70586007)(70206006)(316002)(16576012)(478600001)(41300700001)(8676002)(9686003)(4326008)(26005)(16526019)(336012)(2906002)(186003)(8936002)(83380400001)(81166007)(82740400003)(356005)(33716001)(82310400005)(47076005)(426003)(36860700001)(40480700001)(86362001)(40460700003)(103116003)(71626007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Oct 2022 22:27:29.6295 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 29b24d8a-a7df-4b67-945a-08dab08ec6fe X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT071.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5042 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746975697277492134?= X-GMAIL-MSGID: =?utf-8?q?1746975697277492134?= The call on_each_cpu_mask() can run the function on each CPU specified by cpumask, which may include the local processor. So, replace the call smp_call_function_many() with on_each_cpu_mask() to simplify the code. Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 29 ++++++++--------------------- 1 file changed, 8 insertions(+), 21 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c index e744db5dc057..4f8a1c9c3e7a 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -325,12 +325,7 @@ static void update_cpu_closid_rmid(void *info) static void update_closid_rmid(const struct cpumask *cpu_mask, struct rdtgroup *r) { - int cpu = get_cpu(); - - if (cpumask_test_cpu(cpu, cpu_mask)) - update_cpu_closid_rmid(r); - smp_call_function_many(cpu_mask, update_cpu_closid_rmid, r, 1); - put_cpu(); + on_each_cpu_mask(cpu_mask, update_cpu_closid_rmid, r, 1); } static int cpus_mon_write(struct rdtgroup *rdtgrp, cpumask_var_t newmask, @@ -2131,13 +2126,9 @@ static int set_cache_qos_cfg(int level, bool enable) /* Pick one CPU from each domain instance to update MSR */ cpumask_set_cpu(cpumask_any(&d->cpu_mask), cpu_mask); } - cpu = get_cpu(); - /* Update QOS_CFG MSR on this cpu if it's in cpu_mask. */ - if (cpumask_test_cpu(cpu, cpu_mask)) - update(&enable); - /* Update QOS_CFG MSR on all other cpus in cpu_mask. */ - smp_call_function_many(cpu_mask, update, &enable, 1); - put_cpu(); + + /* Update QOS_CFG MSR on all the CPUs in cpu_mask */ + on_each_cpu_mask(cpu_mask, update, &enable, 1); free_cpumask_var(cpu_mask); @@ -2614,7 +2605,7 @@ static int reset_all_ctrls(struct rdt_resource *r) struct msr_param msr_param; cpumask_var_t cpu_mask; struct rdt_domain *d; - int i, cpu; + int i; if (!zalloc_cpumask_var(&cpu_mask, GFP_KERNEL)) return -ENOMEM; @@ -2635,13 +2626,9 @@ static int reset_all_ctrls(struct rdt_resource *r) for (i = 0; i < hw_res->num_closid; i++) hw_dom->ctrl_val[i] = r->default_ctrl; } - cpu = get_cpu(); - /* Update CBM on this cpu if it's in cpu_mask. */ - if (cpumask_test_cpu(cpu, cpu_mask)) - rdt_ctrl_update(&msr_param); - /* Update CBM on all other cpus in cpu_mask. */ - smp_call_function_many(cpu_mask, rdt_ctrl_update, &msr_param, 1); - put_cpu(); + + /* Update CBM on all the CPUs in cpu_mask */ + on_each_cpu_mask(cpu_mask, rdt_ctrl_update, &msr_param, 1); free_cpumask_var(cpu_mask); From patchwork Mon Oct 17 22:27:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Moger, Babu" X-Patchwork-Id: 3784 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1670129wrs; Mon, 17 Oct 2022 15:30:56 -0700 (PDT) X-Google-Smtp-Source: AMsMyM41dMoFk9ZRr7xJpM6hylC/4VSbbxWb7T1kRWhpz9MVJW5YQhqqz+OgjsHP8D6IFfhEYkgn X-Received: by 2002:a17:90a:f417:b0:20b:6d04:a502 with SMTP id ch23-20020a17090af41700b0020b6d04a502mr37006369pjb.76.1666045856437; Mon, 17 Oct 2022 15:30:56 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1666045856; cv=pass; d=google.com; s=arc-20160816; b=Pyk3LS1PBwkuQVuSA3UzClm6uhzWWIATm7UIh89bNOEk91Ai+oNEv5T0zTX0ldmDo8 xiA/E6WNTR49jRHAb1I6GyTOEolMjrILPUZZPg6zapG4HcAMldQLQwhDNvcwQG5ACZro GHM5S0xKspeCPpPZaKO/lE9UH5A8x02B4FStN6p/8yIag78vV/iSJHEFnqwN/A3SExcW nIjt/wE4pkAZNsUhEmoqKGkNyrpF4hXSh6RrfYJqndcpz7K99eK1/5VQxXEGFQ04E+LM Tx2t0mf2Gx0aNdX2XD+7Gz1ZT9NHzzjFNPcXRVYaG5OnhkPuxf76twRsC4J/58n8Gj01 zbzA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:cc:to:from :subject:dkim-signature; bh=RmUmdOUT/+idtnOSNOzH0DTMOQ4xeQprS5+AjbtNBc8=; b=pgIOscSXCRN9ESOhvQ0f3WZIgSaYXtQ2tuzyg8J5nqRcjscehj0LqNVZebB+/yA+P3 DH1x8Qe59gQtPyOmFQDx80N16aPjoCDlnQFObGIxnrYaLJ6wdhjSaTWEzjq03sQSYSQe AO5DDiGUF4dHwii3ogRAhbVyabIDx78XgFQbPUPDy65qmRMPmL+2FWC2fjAfkW9ZIJLO ZsFERI7uKGHN3wegTjlKCt6LCUmWy1RQz7aqGTO/sq0nKqvEg1/bIVOmeqEDVEP1jlBF wt3cqW9hc9aM4brs/daekd2n5i4Q3Rx2SAa6LyfJeI7zAN2bImSvxu5hlDYW++5Moi+6 +F2w== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=37zUg8wQ; arc=pass (i=1 spf=pass spfdomain=amd.com dmarc=pass fromdomain=amd.com); spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Received: from out1.vger.email (out1.vger.email. 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Mon, 17 Oct 2022 17:27:34 -0500 Subject: [PATCH v7 12/12] Documentation/x86: Update resctrl.rst for new features From: Babu Moger To: , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , Date: Mon, 17 Oct 2022 17:27:34 -0500 Message-ID: <166604565437.5345.14867510739122394750.stgit@bmoger-ubuntu> In-Reply-To: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT048:EE_|PH7PR12MB7260:EE_ X-MS-Office365-Filtering-Correlation-Id: b739b5cc-791d-47f0-0aed-08dab08ecbaf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: lI2tudMtwB/+u7Acas2dFTfHCy+65lxRFS7swMw8W/Q8tfuI8S5Th8JwPS+pJnP/ARp6l6X2bBLTPPiv3hGG600uVEW77E9e8APvL1n4InFM2cTotoLJq83cbyzFAaHsLOMgOXm3EWtGxQ15sZ0nX0aKRt/w+EkmpOZ8Vh1HJ7MRilWjWEXpe45jCnzQTV93Mcfud+aOynJ3gR3nsZb/urI0VE/9xkhG0d9/imjEDM4pYzuSKMxcjSppCcjgfXWpihGerbxdrDdqmd14IYEUyWECQqVDv9wFgRfKviho06ugGLwvcrDHXtPgja2Mp4dFFjZJBrHyWiuNc98+HVJFjnTEVfXlARX+s1BPDcfI1BJVaBP1RfSCCImY92L3vJgMVICgjN4jAA/jyV9Op8WWyiZyqh6SBM+8Y4CR00MlFg5nbFA9lvraks4bqhl5ZauE/aIQkNhO0FXh2EN94qUKA4XeHqgCd+ECK3jPGU2Jo19z/n20j0TDqdSBt2xcm3oOG482Muk+kQKC58ZS5jeots5Ejo6RqKJpQGtVgjBxSpe2d1An/4LFUDco5WLjynJCQ2RbJyENlhdGBICny4c75FL7pGE/WijmnQZRLF7aDS8F8urgI+pXwpW2fBZuWm6JkdxJW4ndQyDlMk99YZa/toVOzncH1gpaD4nJlfEuHqfkcHHlJl/0O0u3DEaJP/jZyN0rZPgZ0EvK2KwF9JG3yq6zZ4HIRlqYjKMmTfw7Fvq8aAJ9QAY67aOyud5veF0YwqvcRrovltMwJUCGESWQeuSto8w13PaNuo4xmD7yC+a3fyo+TyUM4FIKGpzPKnFL X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(7916004)(4636009)(346002)(136003)(376002)(396003)(39860400002)(451199015)(36840700001)(46966006)(40470700004)(54906003)(110136005)(5660300002)(44832011)(7416002)(70586007)(70206006)(316002)(16576012)(41300700001)(478600001)(8676002)(9686003)(26005)(4326008)(16526019)(336012)(2906002)(186003)(8936002)(15650500001)(83380400001)(81166007)(82740400003)(356005)(33716001)(82310400005)(426003)(47076005)(36860700001)(40480700001)(86362001)(40460700003)(103116003)(71626007)(36900700001);DIR:OUT;SFP:1101; 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Slow Memory Bandwidth allocation (SMBA). With this feature, the QOS enforcement policies can be applied to the external slow memory connected to the host. QOS enforcement is accomplished by assigning a Class Of Service (COS) to a processor and specifying allocations or limits for that COS for each resource to be allocated. 2. Bandwidth Monitoring Event Configuration (BMEC). The bandwidth monitoring events mbm_total_bytes and mbm_local_bytes are set to count all the total and local reads/writes respectively. With the introduction of slow memory, the two counters are not enough to count all the different types of memory events. With the feature BMEC, the users have the option to configure mbm_total_bytes and mbm_local_bytes to count the specific type of events. Also add configuration instructions with examples. Signed-off-by: Babu Moger Reviewed-by: Bagas Sanjaya --- Documentation/x86/resctrl.rst | 139 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 137 insertions(+), 2 deletions(-) diff --git a/Documentation/x86/resctrl.rst b/Documentation/x86/resctrl.rst index 71a531061e4e..d0b4e1a2cb8d 100644 --- a/Documentation/x86/resctrl.rst +++ b/Documentation/x86/resctrl.rst @@ -17,14 +17,16 @@ AMD refers to this feature as AMD Platform Quality of Service(AMD QoS). This feature is enabled by the CONFIG_X86_CPU_RESCTRL and the x86 /proc/cpuinfo flag bits: -============================================= ================================ +=============================================== ================================ RDT (Resource Director Technology) Allocation "rdt_a" CAT (Cache Allocation Technology) "cat_l3", "cat_l2" CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2" CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc" MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local" MBA (Memory Bandwidth Allocation) "mba" -============================================= ================================ +SMBA (Slow Memory Bandwidth Allocation) "smba" +BMEC (Bandwidth Monitoring Event Configuration) "bmec" +=============================================== ================================ To use the feature mount the file system:: @@ -161,6 +163,79 @@ with the following files: "mon_features": Lists the monitoring events if monitoring is enabled for the resource. + Example:: + + # cat /sys/fs/resctrl/info/L3_MON/mon_features + llc_occupancy + mbm_total_bytes + mbm_local_bytes + + If the system supports Bandwidth Monitoring Event + Configuration (BMEC), then the bandwidth events will + be configurable. The output will be:: + + # cat /sys/fs/resctrl/info/L3_MON/mon_features + llc_occupancy + mbm_total_bytes + mbm_total_config + mbm_local_bytes + mbm_local_config + +"mbm_total_config", "mbm_local_config": + These files contain the current event configuration for the events + mbm_total_bytes and mbm_local_bytes, respectively, when the + Bandwidth Monitoring Event Configuration (BMEC) feature is supported. + The event configuration settings are domain specific and will affect + all the CPUs in the domain. + + Following are the types of events supported: + + ==== ======================================================== + Bits Description + ==== ======================================================== + 6 Dirty Victims from the QOS domain to all types of memory + 5 Reads to slow memory in the non-local NUMA domain + 4 Reads to slow memory in the local NUMA domain + 3 Non-temporal writes to non-local NUMA domain + 2 Non-temporal writes to local NUMA domain + 1 Reads to memory in the non-local NUMA domain + 0 Reads to memory in the local NUMA domain + ==== ======================================================== + + By default, the mbm_total_bytes configuration is set to 0x7f to count + all the event types and the mbm_local_bytes configuration is set to + 0x15 to count all the local memory events. + + Examples: + + * To view the current configuration:: + :: + + # cat /sys/fs/resctrl/info/L3_MON/mbm_total_config + 0=0x7f;1=0x7f;2=0x7f;3=0x7f + + # cat /sys/fs/resctrl/info/L3_MON/mbm_local_config + 0=0x15;1=0x15;3=0x15;4=0x15 + + * To change the mbm_total_bytes to count only reads on domain 0, + the bits 0, 1, 4 and 5 needs to be set, which is 110011b in binary + (in hexadecimal 0x33): + :: + + # echo "0=0x33" > /sys/fs/resctrl/info/L3_MON/mbm_total_config + + # cat /sys/fs/resctrl/info/L3_MON/mbm_total_config + 0=0x33;1=0x7f;2=0x7f;3=0x7f + + * To change the mbm_local_bytes to count all the slow memory reads + on domain 1, the bits 4 and 5 needs to be set, which is 110000b + in binary (in hexadecimal 0x30): + :: + + # echo "1=0x30" > /sys/fs/resctrl/info/L3_MON/mbm_local_config + + # cat /sys/fs/resctrl/info/L3_MON/mbm_local_config + 0=0x15;1=0x30;3=0x15;4=0x15 "max_threshold_occupancy": Read/write file provides the largest value (in @@ -464,6 +539,26 @@ Memory bandwidth domain is L3 cache. MB:=bw_MBps0;=bw_MBps1;... +Slow Memory bandwidth Allocation (SMBA) +--------------------------------------- +AMD hardwares support Slow Memory bandwidth Allocation (SMBA) feature. +Currently, CXL.memory is the only supported "slow" memory device. +With the support of SMBA, the hardware enables bandwidth allocation +on the slow memory devices. If there are multiple such devices in the +system, the throttling logic groups all the slow sources together +and applies the limit on them as a whole. + +The presence of SMBA (with CXL.memory) is independent of slow memory +devices presence. If there is no such devices on the system, then +setting the configuring SMBA will have no impact on the performance +of the system. + +The bandwidth domain for slow memory is L3 cache. Its schemata file +is formatted as: +:: + + SMBA:=bandwidth0;=bandwidth1;... + Reading/writing the schemata file --------------------------------- Reading the schemata file will show the state of all resources @@ -479,6 +574,46 @@ which you wish to change. E.g. L3DATA:0=fffff;1=fffff;2=3c0;3=fffff L3CODE:0=fffff;1=fffff;2=fffff;3=fffff +Reading/writing the schemata file (on AMD systems) +-------------------------------------------------- +Reading the schemata file will show the current bandwidth limit on all +domains. The allocated resources are in multiples of one eighth GB/s. +When writing to the file, you need to specify what cache id you wish to +configure the bandwidth limit. + +For example, to allocate 2GB/s limit on the first cache id: + +:: + + # cat schemata + MB:0=2048;1=2048;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + + # echo "MB:1=16" > schemata + # cat schemata + MB:0=2048;1= 16;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + +Reading/writing the schemata file (on AMD systems) with SMBA feature +-------------------------------------------------------------------- +Reading and writing the schemata file is the same as without SMBA in +above section. + +For example, to allocate 8GB/s limit on the first cache id: + +:: + + # cat schemata + SMBA:0=2048;1=2048;2=2048;3=2048 + MB:0=2048;1=2048;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + + # echo "SMBA:1=64" > schemata + # cat schemata + SMBA:0=2048;1= 64;2=2048;3=2048 + MB:0=2048;1=2048;2=2048;3=2048 + L3:0=ffff;1=ffff;2=ffff;3=ffff + Cache Pseudo-Locking ==================== CAT enables a user to specify the amount of cache space that an