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[94.197.187.145]) by smtp.gmail.com with ESMTPSA id d21-20020a05600c34d500b003daffc2ecdesm6794420wmq.13.2023.02.16.14.22.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 14:22:41 -0800 (PST) From: Aidan MacDonald To: agross@kernel.org, andersson@kernel.org, lee@kernel.org Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/4] mfd: qcom-pm8008: Fix swapped mask/unmask in irq chip Date: Thu, 16 Feb 2023 22:22:11 +0000 Message-Id: <20230216222214.138671-2-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20230216222214.138671-1-aidanmacdonald.0x0@gmail.com> References: <20230216222214.138671-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758028674385954962?= X-GMAIL-MSGID: =?utf-8?q?1758028674385954962?= The usual behavior of mask registers is writing a '1' bit to disable (mask) an interrupt; similarly, writing a '1' bit to an unmask register enables (unmasks) an interrupt. Due to a longstanding issue in regmap-irq, mask and unmask registers were inverted when both kinds of registers were present on the same chip, ie. regmap-irq actually wrote '1's to the mask register to enable an IRQ and '1's to the unmask register to disable an IRQ. This was fixed by commit e8ffb12e7f06 ("regmap-irq: Fix inverted handling of unmask registers") but the fix is opt-in via mask_unmask_non_inverted = true because it requires manual changes for each affected driver. The new behavior will become the default once all drivers have been updated. The PM8008 appears to rely on the inverted behavior. It has separate set & clear registers for a register called INT_EN, which presumably enables interrupts by writing '1's. Opt in to the new non-inverted behavior & swap mask_base/unmask_base. Signed-off-by: Aidan MacDonald --- drivers/mfd/qcom-pm8008.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 9f3c4a01b4c1..39fd2a792e73 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -45,8 +45,8 @@ enum { #define PM8008_GPIO2_ADDR PM8008_PERIPH_3_BASE #define PM8008_STATUS_BASE (PM8008_PERIPH_0_BASE | INT_LATCHED_STS_OFFSET) -#define PM8008_MASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_SET_OFFSET) -#define PM8008_UNMASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_CLR_OFFSET) +#define PM8008_MASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_CLR_OFFSET) +#define PM8008_UNMASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_SET_OFFSET) #define PM8008_TYPE_BASE (PM8008_PERIPH_0_BASE | INT_SET_TYPE_OFFSET) #define PM8008_ACK_BASE (PM8008_PERIPH_0_BASE | INT_LATCHED_CLR_OFFSET) #define PM8008_POLARITY_HI_BASE (PM8008_PERIPH_0_BASE | INT_POL_HIGH_OFFSET) @@ -131,6 +131,7 @@ static struct regmap_irq_chip pm8008_irq_chip = { .status_base = PM8008_STATUS_BASE, .mask_base = PM8008_MASK_BASE, .unmask_base = PM8008_UNMASK_BASE, + .mask_unmask_non_inverted = true, .type_base = PM8008_TYPE_BASE, .ack_base = PM8008_ACK_BASE, .virt_reg_base = pm8008_virt_regs, From patchwork Thu Feb 16 22:22:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aidan MacDonald X-Patchwork-Id: 58263 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp562971wrn; Thu, 16 Feb 2023 14:32:43 -0800 (PST) X-Google-Smtp-Source: AK7set/LlyqqaJT6Pyw1wxBAeXqSZqNRaxYjHIpJyncbgehwoAp6w6OEsQ9mD/OKEmnU/WyuJyrx X-Received: by 2002:aa7:d597:0:b0:4ac:d2bc:4695 with SMTP id r23-20020aa7d597000000b004acd2bc4695mr7377991edq.33.1676586763803; Thu, 16 Feb 2023 14:32:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676586763; cv=none; d=google.com; s=arc-20160816; b=aX9jUrwoOxdNcE/6NHObxLp4RhQbU3C51TLv05kGUNVXkPjrm1n0SA1caZ1VXA8kA0 fc9y97xzah4uUR/Klcw3YJA9W2TEHdffYLEtoqw8zlcfIkGxMMf7SD8jacQM8p3dMiVl 8aMBBF+Znw407pCfwOwpcojdK3OCw0KxLdLcJMQ+A10DERfj4z+ojzL72EY5o5a/gSJ1 Fa8ocSrpfQbOyZfeasG/PEHDsp2Fq9uJW2/ny4wviE3X9pR5iQ6XePbS+D+budcsk76w wyyKuJH3tdO2bZIujzOtFPSmLQwFmCVddiVzVtAqlv3JedXuqzCQrQsKytJf8vaOVZal AZOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=GB5CWEtRRQ/o56HacmvmZRAx5GJevROntZ+kKSL5iO8=; b=j5YizxUskdKQtbRb4JqA7SQNtjIRupxFznOwBlQBWTO7xodkS4PfdKYaTg6gr0UiYX 1SyQOvNZCvLsTwWKCWl3u8TpSzoxaQnAXnxu4kYJtK90kICnP2GHjDk4C0ogkl64TtRD d+qsJfNZ+2+Ijy3rOzpeUy4M5m1QBmYON7AzKvEECa8nNkiGq9BS3fHVnRciFVtWiBYx vuG8mZZxR+pK1s48SkQGbdvoGFO1KQ/IHb/5yGDeGwbAUUPxY0aRqpSvVJhILGAYPxn6 sNvc6/Wnkm9LTtjEt6TTuq9Y5v86YmZIkzWUR4uqYCUmM7m/R3NKM5d7ljhzI//ouoEW AWZQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=qqpYGGbA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[94.197.187.145]) by smtp.gmail.com with ESMTPSA id g9-20020adff3c9000000b002c54d8b89efsm2696211wrp.26.2023.02.16.14.22.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 14:22:42 -0800 (PST) From: Aidan MacDonald To: agross@kernel.org, andersson@kernel.org, lee@kernel.org Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/4] mfd: qcom-pm8008: Convert irq chip to config regs Date: Thu, 16 Feb 2023 22:22:12 +0000 Message-Id: <20230216222214.138671-3-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20230216222214.138671-1-aidanmacdonald.0x0@gmail.com> References: <20230216222214.138671-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758028642785841490?= X-GMAIL-MSGID: =?utf-8?q?1758028642785841490?= Replace type and virtual registers, which are both deprecated, with config registers. This also simplifies the driver because IRQ types are set in one place, the set_type_config() callback. Signed-off-by: Aidan MacDonald --- drivers/mfd/qcom-pm8008.c | 50 +++++++++++++++++++-------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 39fd2a792e73..2b6763605cd7 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -66,15 +66,16 @@ static struct regmap_irq_sub_irq_map pm8008_sub_reg_offsets[] = { REGMAP_IRQ_MAIN_REG_OFFSET(p3_offs), }; -static unsigned int pm8008_virt_regs[] = { - PM8008_POLARITY_HI_BASE, - PM8008_POLARITY_LO_BASE, -}; - enum { + SET_TYPE_INDEX, POLARITY_HI_INDEX, POLARITY_LO_INDEX, - PM8008_NUM_VIRT_REGS, +}; + +static unsigned int pm8008_config_regs[] = { + PM8008_TYPE_BASE, + PM8008_POLARITY_HI_BASE, + PM8008_POLARITY_LO_BASE, }; static struct regmap_irq pm8008_irqs[] = { @@ -88,32 +89,36 @@ static struct regmap_irq pm8008_irqs[] = { REGMAP_IRQ_REG(PM8008_IRQ_GPIO2, PM8008_GPIO2, BIT(0)), }; -static int pm8008_set_type_virt(unsigned int **virt_buf, - unsigned int type, unsigned long hwirq, - int reg) +static int pm8008_set_type_config(unsigned int **buf, unsigned int type, + const struct regmap_irq *irq_data, int idx) { switch (type) { case IRQ_TYPE_EDGE_FALLING: case IRQ_TYPE_LEVEL_LOW: - virt_buf[POLARITY_HI_INDEX][reg] &= ~pm8008_irqs[hwirq].mask; - virt_buf[POLARITY_LO_INDEX][reg] |= pm8008_irqs[hwirq].mask; + buf[POLARITY_HI_INDEX][idx] &= ~irq_data->mask; + buf[POLARITY_LO_INDEX][idx] |= irq_data->mask; break; case IRQ_TYPE_EDGE_RISING: case IRQ_TYPE_LEVEL_HIGH: - virt_buf[POLARITY_HI_INDEX][reg] |= pm8008_irqs[hwirq].mask; - virt_buf[POLARITY_LO_INDEX][reg] &= ~pm8008_irqs[hwirq].mask; + buf[POLARITY_HI_INDEX][idx] |= irq_data->mask; + buf[POLARITY_LO_INDEX][idx] &= ~irq_data->mask; break; case IRQ_TYPE_EDGE_BOTH: - virt_buf[POLARITY_HI_INDEX][reg] |= pm8008_irqs[hwirq].mask; - virt_buf[POLARITY_LO_INDEX][reg] |= pm8008_irqs[hwirq].mask; + buf[POLARITY_HI_INDEX][idx] |= irq_data->mask; + buf[POLARITY_LO_INDEX][idx] |= irq_data->mask; break; default: return -EINVAL; } + if (type & IRQ_TYPE_EDGE_BOTH) + buf[SET_TYPE_INDEX][idx] |= irq_data->mask; + else + buf[SET_TYPE_INDEX][idx] &= ~irq_data->mask; + return 0; } @@ -121,21 +126,20 @@ static struct regmap_irq_chip pm8008_irq_chip = { .name = "pm8008_irq", .main_status = I2C_INTR_STATUS_BASE, .num_main_regs = 1, - .num_virt_regs = PM8008_NUM_VIRT_REGS, .irqs = pm8008_irqs, .num_irqs = ARRAY_SIZE(pm8008_irqs), .num_regs = PM8008_NUM_PERIPHS, .not_fixed_stride = true, .sub_reg_offsets = pm8008_sub_reg_offsets, - .set_type_virt = pm8008_set_type_virt, .status_base = PM8008_STATUS_BASE, .mask_base = PM8008_MASK_BASE, .unmask_base = PM8008_UNMASK_BASE, .mask_unmask_non_inverted = true, - .type_base = PM8008_TYPE_BASE, .ack_base = PM8008_ACK_BASE, - .virt_reg_base = pm8008_virt_regs, - .num_type_reg = PM8008_NUM_PERIPHS, + .config_base = pm8008_config_regs, + .num_config_bases = ARRAY_SIZE(pm8008_config_regs), + .num_config_regs = PM8008_NUM_PERIPHS, + .set_type_config = pm8008_set_type_config, }; static struct regmap_config qcom_mfd_regmap_cfg = { @@ -185,11 +189,7 @@ static int pm8008_probe_irq_peripherals(struct device *dev, for (i = 0; i < ARRAY_SIZE(pm8008_irqs); i++) { type = &pm8008_irqs[i].type; - type->type_reg_offset = pm8008_irqs[i].reg_offset; - type->type_rising_val = pm8008_irqs[i].mask; - type->type_falling_val = pm8008_irqs[i].mask; - type->type_level_high_val = 0; - type->type_level_low_val = 0; + type->type_reg_offset = pm8008_irqs[i].reg_offset; if (type->type_reg_offset == PM8008_MISC) type->types_supported = IRQ_TYPE_EDGE_RISING; From patchwork Thu Feb 16 22:22:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aidan MacDonald X-Patchwork-Id: 58261 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp562715wrn; Thu, 16 Feb 2023 14:32:08 -0800 (PST) X-Google-Smtp-Source: AK7set9m2rsd8OaIfX5/RExy6DEnFeZxMbAtOPSHR0Xjne1+MqvjfwC92LVLV3J8RjeH2UpabCfb X-Received: by 2002:a17:903:2281:b0:199:4a00:9788 with SMTP id b1-20020a170903228100b001994a009788mr9614077plh.19.1676586727985; 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[94.197.187.145]) by smtp.gmail.com with ESMTPSA id t15-20020a1c770f000000b003dc3f195abesm2894346wmi.39.2023.02.16.14.22.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 14:22:44 -0800 (PST) From: Aidan MacDonald To: agross@kernel.org, andersson@kernel.org, lee@kernel.org Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/4] mfd: qcom-pm8008: Use .get_irq_reg() for irq chip Date: Thu, 16 Feb 2023 22:22:13 +0000 Message-Id: <20230216222214.138671-4-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20230216222214.138671-1-aidanmacdonald.0x0@gmail.com> References: <20230216222214.138671-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758028604991528581?= X-GMAIL-MSGID: =?utf-8?q?1758028604991528581?= Replace the deprecated not_fixed_stride flag and the associated hierarchy of offsets with a .get_irq_reg() callback. Signed-off-by: Aidan MacDonald --- drivers/mfd/qcom-pm8008.c | 56 +++++++++++++++++---------------------- 1 file changed, 25 insertions(+), 31 deletions(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 2b6763605cd7..4bcdf0e50c40 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -44,28 +44,6 @@ enum { #define PM8008_GPIO1_ADDR PM8008_PERIPH_2_BASE #define PM8008_GPIO2_ADDR PM8008_PERIPH_3_BASE -#define PM8008_STATUS_BASE (PM8008_PERIPH_0_BASE | INT_LATCHED_STS_OFFSET) -#define PM8008_MASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_CLR_OFFSET) -#define PM8008_UNMASK_BASE (PM8008_PERIPH_0_BASE | INT_EN_SET_OFFSET) -#define PM8008_TYPE_BASE (PM8008_PERIPH_0_BASE | INT_SET_TYPE_OFFSET) -#define PM8008_ACK_BASE (PM8008_PERIPH_0_BASE | INT_LATCHED_CLR_OFFSET) -#define PM8008_POLARITY_HI_BASE (PM8008_PERIPH_0_BASE | INT_POL_HIGH_OFFSET) -#define PM8008_POLARITY_LO_BASE (PM8008_PERIPH_0_BASE | INT_POL_LOW_OFFSET) - -#define PM8008_PERIPH_OFFSET(paddr) (paddr - PM8008_PERIPH_0_BASE) - -static unsigned int p0_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_0_BASE)}; -static unsigned int p1_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_1_BASE)}; -static unsigned int p2_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_2_BASE)}; -static unsigned int p3_offs[] = {PM8008_PERIPH_OFFSET(PM8008_PERIPH_3_BASE)}; - -static struct regmap_irq_sub_irq_map pm8008_sub_reg_offsets[] = { - REGMAP_IRQ_MAIN_REG_OFFSET(p0_offs), - REGMAP_IRQ_MAIN_REG_OFFSET(p1_offs), - REGMAP_IRQ_MAIN_REG_OFFSET(p2_offs), - REGMAP_IRQ_MAIN_REG_OFFSET(p3_offs), -}; - enum { SET_TYPE_INDEX, POLARITY_HI_INDEX, @@ -73,9 +51,9 @@ enum { }; static unsigned int pm8008_config_regs[] = { - PM8008_TYPE_BASE, - PM8008_POLARITY_HI_BASE, - PM8008_POLARITY_LO_BASE, + INT_SET_TYPE_OFFSET, + INT_POL_HIGH_OFFSET, + INT_POL_LOW_OFFSET, }; static struct regmap_irq pm8008_irqs[] = { @@ -89,6 +67,23 @@ static struct regmap_irq pm8008_irqs[] = { REGMAP_IRQ_REG(PM8008_IRQ_GPIO2, PM8008_GPIO2, BIT(0)), }; +static const unsigned int pm8008_periph_base[] = { + PM8008_PERIPH_0_BASE, + PM8008_PERIPH_1_BASE, + PM8008_PERIPH_2_BASE, + PM8008_PERIPH_3_BASE, +}; + +static unsigned int pm8008_get_irq_reg(struct regmap_irq_chip_data *data, + unsigned int base, int index) +{ + /* Simple linear addressing for the main status register */ + if (base == I2C_INTR_STATUS_BASE) + return base + index; + + return pm8008_periph_base[index] + base; +} + static int pm8008_set_type_config(unsigned int **buf, unsigned int type, const struct regmap_irq *irq_data, int idx) { @@ -129,17 +124,16 @@ static struct regmap_irq_chip pm8008_irq_chip = { .irqs = pm8008_irqs, .num_irqs = ARRAY_SIZE(pm8008_irqs), .num_regs = PM8008_NUM_PERIPHS, - .not_fixed_stride = true, - .sub_reg_offsets = pm8008_sub_reg_offsets, - .status_base = PM8008_STATUS_BASE, - .mask_base = PM8008_MASK_BASE, - .unmask_base = PM8008_UNMASK_BASE, + .status_base = INT_LATCHED_STS_OFFSET, + .mask_base = INT_EN_CLR_OFFSET, + .unmask_base = INT_EN_SET_OFFSET, .mask_unmask_non_inverted = true, - .ack_base = PM8008_ACK_BASE, + .ack_base = INT_LATCHED_CLR_OFFSET, .config_base = pm8008_config_regs, .num_config_bases = ARRAY_SIZE(pm8008_config_regs), .num_config_regs = PM8008_NUM_PERIPHS, .set_type_config = pm8008_set_type_config, + .get_irq_reg = pm8008_get_irq_reg, }; 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[94.197.187.145]) by smtp.gmail.com with ESMTPSA id q9-20020a1ce909000000b003e00c453447sm5935410wmc.48.2023.02.16.14.22.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 14:22:45 -0800 (PST) From: Aidan MacDonald To: agross@kernel.org, andersson@kernel.org, lee@kernel.org Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 4/4] mfd: qcom-pm8008: Remove workaround for a regmap-irq quirk Date: Thu, 16 Feb 2023 22:22:14 +0000 Message-Id: <20230216222214.138671-5-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20230216222214.138671-1-aidanmacdonald.0x0@gmail.com> References: <20230216222214.138671-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758028630559362967?= X-GMAIL-MSGID: =?utf-8?q?1758028630559362967?= Remove pm8008_init(), which according to the comments exists only as a workaround for regmap-irq's odd treatment of type registers. This workaround shouldn't be needed anymore because this driver uses config registers, which are always programmed by regmap-irq no matter what the initial register state is. Signed-off-by: Aidan MacDonald --- drivers/mfd/qcom-pm8008.c | 30 ------------------------------ 1 file changed, 30 deletions(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 4bcdf0e50c40..a33fbc42ac8e 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -142,30 +142,6 @@ static struct regmap_config qcom_mfd_regmap_cfg = { .max_register = 0xFFFF, }; -static int pm8008_init(struct regmap *regmap) -{ - int rc; - - /* - * Set TEMP_ALARM peripheral's TYPE so that the regmap-irq framework - * reads this as the default value instead of zero, the HW default. - * This is required to enable the writing of TYPE registers in - * regmap_irq_sync_unlock(). - */ - rc = regmap_write(regmap, (PM8008_TEMP_ALARM_ADDR | INT_SET_TYPE_OFFSET), BIT(0)); - if (rc) - return rc; - - /* Do the same for GPIO1 and GPIO2 peripherals */ - rc = regmap_write(regmap, (PM8008_GPIO1_ADDR | INT_SET_TYPE_OFFSET), BIT(0)); - if (rc) - return rc; - - rc = regmap_write(regmap, (PM8008_GPIO2_ADDR | INT_SET_TYPE_OFFSET), BIT(0)); - - return rc; -} - static int pm8008_probe_irq_peripherals(struct device *dev, struct regmap *regmap, int client_irq) @@ -174,12 +150,6 @@ static int pm8008_probe_irq_peripherals(struct device *dev, struct regmap_irq_type *type; struct regmap_irq_chip_data *irq_data; - rc = pm8008_init(regmap); - if (rc) { - dev_err(dev, "Init failed: %d\n", rc); - return rc; - } - for (i = 0; i < ARRAY_SIZE(pm8008_irqs); i++) { type = &pm8008_irqs[i].type;