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[8.43.85.97]) by mx.google.com with ESMTPS id w4-20020a056402128400b004acc613462asi12095536edv.78.2023.02.15.12.38.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Feb 2023 12:38:05 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=o6Ld0d0H; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7AFFA385840D for ; Wed, 15 Feb 2023 20:38:04 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7AFFA385840D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1676493484; bh=15LsOLc/8wgRX93uuhGSmKR7/nSg33yR5eLoF0rxRhQ=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=o6Ld0d0H0ivVxcFlA7K4/pwRwyKwTXykJttDebSszsRA3BCxgmsyTLGHHQlx1JfF6 4nn0GwAVBl6fwvwQ864UnYjFzARBPDkyQGNULdPC/6rR/2DrFyvItONryFVUbWRK4j L4s/xlkMSvZRKQpXKjctq2HKOCbBZKfZd9qujpo8= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-yb1-xb2e.google.com (mail-yb1-xb2e.google.com [IPv6:2607:f8b0:4864:20::b2e]) by sourceware.org (Postfix) with ESMTPS id E01F13858D33 for ; Wed, 15 Feb 2023 20:37:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E01F13858D33 Received: by mail-yb1-xb2e.google.com with SMTP id l201so19423951ybf.10 for ; Wed, 15 Feb 2023 12:37:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=15LsOLc/8wgRX93uuhGSmKR7/nSg33yR5eLoF0rxRhQ=; b=LiaGGN+SSj1QBJ+mz+d7bVoZkMAIQ3fL9UfoTWGedEKWVO4VAjNHFoMtFAYto6A+BY mPhtq/tNyCxHFEIShVVT3sr5amhdwDsK6CJhKGCCb1jTSurUIWlGGtxfvZDk+bLzVonz 1+zpiuoWNflsvXg1+dE3mxb/czEkJaVc73P4yIMwMTxtIuM9KmcpuDaWVXKydlduur56 RobAFNwp/pxs9dvwDyXXHe1ELs0AOGZ9NtQtafqKo3sFvgILFPu890zO/xZXJjv5P5cQ OQNGm9fVtk8uO6OLUe+TJr5+Ta7t7JyQlxLFVjFfxWco75QtK+zX56h9rWduxoEXZgIb d/hw== X-Gm-Message-State: AO0yUKWVNnmVsgHuyH1O10oxdqi5nZwNoIj8JBtknuUcjjqeqnZXF2UH fMNJ1RojqCnOSwtb7SaJB/aql8tKmuQSui30kRToqEC9KBoZGQ== X-Received: by 2002:a25:8e86:0:b0:898:355e:570e with SMTP id q6-20020a258e86000000b00898355e570emr426499ybl.14.1676493437474; Wed, 15 Feb 2023 12:37:17 -0800 (PST) MIME-Version: 1.0 Date: Wed, 15 Feb 2023 21:37:06 +0100 Message-ID: Subject: [PATCH] i386: Relax extract location operand mode requirements To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757930833086502416?= X-GMAIL-MSGID: =?utf-8?q?1757930833086502416?= There is no requirement on the mode of the location operand, so any supported integer mode is valid. We can relax extract location operand mode requirement of other patterns involving zero_extract RTX. 2023-02-15 Uroš Bizjak gcc/ChangeLog: * config/i386/i386.md (*cmpqi_ext_1): Use int248_register_operand predicate in zero_extract sub-RTX. (*cmpqi_ext_2): Ditto. (*cmpqi_ext_3): Ditto. (*cmpqi_ext_4): Ditto. (*extzvqi_mem_rex64): Ditto. (*extzvqi): Ditto. (*insvqi_1_mem_rex64): Ditto. (@insv_1): Ditto. (*insvqi_1): Ditto. (*insvqi_2): Ditto. (*insvqi_3): Ditto. (*extendqi_ext_1): Ditto. (*addqi_ext_1): Ditto. (*addqi_ext_2): Ditto. (*subqi_ext_2): Ditto. (*testqi_ext_1): Ditto. (*testqi_ext_2): Ditto. (*andqi_ext_1): Ditto. (*andqi_ext_1_cc): Ditto. (*andqi_ext_2): Ditto. (*qi_ext_1): Ditto. (*qi_ext_2): Ditto. (*xorqi_ext_1_cc): Ditto. (*negqi_ext_2): Ditto. (*ashlqi_ext_2): Ditto. (*qi_ext_2): Ditto. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index e37bc8dca53..198f06e0769 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1459,7 +1459,7 @@ (match_operand:QI 0 "nonimmediate_operand" "QBc,m") (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q,Q") + (match_operand 1 "int248_register_operand" "Q,Q") (const_int 8) (const_int 8)) 0)))] "ix86_match_ccmode (insn, CCmode)" @@ -1473,7 +1473,7 @@ (compare (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "Q") + (match_operand 0 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0) (match_operand:QI 1 "const0_operand")))] @@ -1498,7 +1498,7 @@ (compare (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "Q,Q") + (match_operand 0 "int248_register_operand" "Q,Q") (const_int 8) (const_int 8)) 0) (match_operand:QI 1 "general_operand" "QnBc,m")))] @@ -1513,12 +1513,12 @@ (compare (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "Q") + (match_operand 0 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q") + (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)))] "ix86_match_ccmode (insn, CCmode)" @@ -3192,7 +3192,7 @@ [(set (match_operand:QI 0 "norex_memory_operand" "=Bn") (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q") + (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0))] "TARGET_64BIT && reload_completed" @@ -3214,7 +3214,7 @@ [(set (match_operand:QI 0 "nonimmediate_operand" "=QBc,?R,m") (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q,Q,Q") + (match_operand 1 "int248_register_operand" "Q,Q,Q") (const_int 8) (const_int 8)) 0))] "" @@ -3242,7 +3242,7 @@ (define_peephole2 [(set (match_operand:QI 0 "register_operand") (subreg:QI - (zero_extract:SWI248 (match_operand:SWI248 1 "register_operand") + (zero_extract:SWI248 (match_operand 1 "int248_register_operand") (const_int 8) (const_int 8)) 0)) (set (match_operand:QI 2 "norex_memory_operand") (match_dup 0))] @@ -3289,7 +3289,7 @@ (define_insn "*insvqi_1_mem_rex64" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 @@ -3301,7 +3301,7 @@ (define_insn "@insv_1" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (match_operand:SWI248 1 "general_operand" "QnBc,m"))] @@ -3317,7 +3317,7 @@ (define_insn "*insvqi_1" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 @@ -3331,7 +3331,7 @@ (define_peephole2 [(set (match_operand:QI 0 "register_operand") (match_operand:QI 1 "norex_memory_operand")) - (set (zero_extract:SWI248 (match_operand:SWI248 2 "register_operand") + (set (zero_extract:SWI248 (match_operand 2 "int248_register_operand") (const_int 8) (const_int 8)) (subreg:SWI248 (match_dup 0) 0))] @@ -3347,7 +3347,7 @@ [(parallel [(set (match_operand:SWI48 0 "general_reg_operand") (const_int 0)) (clobber (reg:CC FLAGS_REG))]) - (set (zero_extract:SWI248 (match_operand:SWI248 1 "general_reg_operand") + (set (zero_extract:SWI248 (match_operand 1 "int248_register_operand") (const_int 8) (const_int 8)) (const_int 0))] @@ -3360,7 +3360,7 @@ (define_peephole2 [(set (match_operand:SWI48 0 "general_reg_operand") (match_operand:SWI48 1 "const_int_operand")) - (set (zero_extract:SWI248 (match_operand:SWI248 2 "general_reg_operand") + (set (zero_extract:SWI248 (match_operand 2 "int248_register_operand") (const_int 8) (const_int 8)) (match_operand:SWI248 3 "const_int_operand"))] @@ -3378,11 +3378,11 @@ (define_insn "*insvqi_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (any_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q") + (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)))] "" @@ -3392,7 +3392,7 @@ (define_insn "*insvqi_3" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (any_shiftrt:SWI248 @@ -4783,7 +4783,7 @@ (sign_extend:SWI24 (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q") + (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)))] "" @@ -6657,14 +6657,14 @@ (define_insn "*addqi_ext_1" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 (plus:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0,0") + (match_operand 1 "int248_register_operand" "0,0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "general_operand" "QnBc,m")) 0)) @@ -6696,19 +6696,19 @@ (define_insn "*addqi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (plus:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "%0") + (match_operand 1 "int248_register_operand" "%0") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 2 "register_operand" "Q") + (match_operand 2 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))] @@ -7267,19 +7267,19 @@ (define_insn "*subqi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (minus:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0") + (match_operand 1 "int248_register_operand" "0") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 2 "register_operand" "Q") + (match_operand 2 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))] @@ -9866,7 +9866,7 @@ (and:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "Q,Q") + (match_operand 0 "int248_register_operand" "Q,Q") (const_int 8) (const_int 8)) 0) (match_operand:QI 1 "general_operand" "QnBc,m")) @@ -9883,12 +9883,12 @@ (and:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "Q") + (match_operand 0 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "Q") + (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)) (const_int 0)))] @@ -10086,13 +10086,13 @@ (match_op_dup 1 [(and:QI (subreg:QI - (zero_extract:SI (match_dup 2) + (zero_extract:HI (match_dup 2) (const_int 8) (const_int 8)) 0) (match_dup 3)) (const_int 0)]))] { - operands[2] = gen_lowpart (SImode, operands[2]); + operands[2] = gen_lowpart (HImode, operands[2]); operands[3] = gen_int_mode (INTVAL (operands[3]) >> 8, QImode); }) @@ -10417,21 +10417,21 @@ "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && reload_completed" [(parallel - [(set (zero_extract:SI (match_dup 0) + [(set (zero_extract:HI (match_dup 0) (const_int 8) (const_int 8)) - (subreg:SI + (subreg:HI (xor:QI (subreg:QI - (zero_extract:SI (match_dup 0) + (zero_extract:HI (match_dup 0) (const_int 8) (const_int 8)) 0) (subreg:QI - (zero_extract:SI (match_dup 0) + (zero_extract:HI (match_dup 0) (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))])] - "operands[0] = gen_lowpart (SImode, operands[0]);") + "operands[0] = gen_lowpart (HImode, operands[0]);") (define_insn "*anddi_2" [(set (reg FLAGS_REG) @@ -10544,14 +10544,14 @@ (define_insn "*andqi_ext_1" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 (and:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0,0") + (match_operand 1 "int248_register_operand" "0,0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "general_operand" "QnBc,m")) 0)) @@ -10571,13 +10571,13 @@ (and:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0,0") + (match_operand 1 "int248_register_operand" "0,0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "general_operand" "QnBc,m")) (const_int 0))) (set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 @@ -10598,19 +10598,19 @@ (define_insn "*andqi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (and:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "%0") + (match_operand 1 "int248_register_operand" "%0") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 2 "register_operand" "Q") + (match_operand 2 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))] @@ -10635,20 +10635,20 @@ && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && !(~INTVAL (operands[2]) & ~(255 << 8))" [(parallel - [(set (zero_extract:SI (match_dup 0) + [(set (zero_extract:HI (match_dup 0) (const_int 8) (const_int 8)) - (subreg:SI + (subreg:HI (and:QI (subreg:QI - (zero_extract:SI (match_dup 1) + (zero_extract:HI (match_dup 1) (const_int 8) (const_int 8)) 0) (match_dup 2)) 0)) (clobber (reg:CC FLAGS_REG))])] { - operands[0] = gen_lowpart (SImode, operands[0]); - operands[1] = gen_lowpart (SImode, operands[1]); + operands[0] = gen_lowpart (HImode, operands[0]); + operands[1] = gen_lowpart (HImode, operands[1]); operands[2] = gen_int_mode (INTVAL (operands[2]) >> 8, QImode); }) @@ -11271,14 +11271,14 @@ (define_insn "*qi_ext_1" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 (any_or:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0,0") + (match_operand 1 "int248_register_operand" "0,0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "general_operand" "QnBc,m")) 0)) @@ -11293,19 +11293,19 @@ (define_insn "*qi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (any_or:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "%0") + (match_operand 1 "int248_register_operand" "%0") (const_int 8) (const_int 8)) 0) (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 2 "register_operand" "Q") + (match_operand 2 "int248_register_operand" "Q") (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))] @@ -11331,13 +11331,13 @@ && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && !(INTVAL (operands[2]) & ~(255 << 8))" [(parallel - [(set (zero_extract:SI (match_dup 0) + [(set (zero_extract:HI (match_dup 0) (const_int 8) (const_int 8)) - (subreg:SI + (subreg:HI (any_or:QI (subreg:QI - (zero_extract:SI (match_dup 1) + (zero_extract:HI (match_dup 1) (const_int 8) (const_int 8)) 0) (match_dup 2)) 0)) @@ -11352,8 +11352,8 @@ emit_note (NOTE_INSN_DELETED); DONE; } - operands[0] = gen_lowpart (SImode, operands[0]); - operands[1] = gen_lowpart (SImode, operands[1]); + operands[0] = gen_lowpart (HImode, operands[0]); + operands[1] = gen_lowpart (HImode, operands[1]); operands[2] = gen_int_mode (INTVAL (operands[2]) >> 8, QImode); }) @@ -11406,13 +11406,13 @@ (xor:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0,0") + (match_operand 1 "int248_register_operand" "0,0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "general_operand" "QnBc,m")) (const_int 0))) (set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q,Q") + (match_operand 0 "int248_register_operand" "+Q,Q") (const_int 8) (const_int 8)) (subreg:SWI248 @@ -11809,14 +11809,14 @@ (define_insn "*negqi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (neg:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0") + (match_operand 1 "int248_register_operand" "0") (const_int 8) (const_int 8)) 0)) 0)) (clobber (reg:CC FLAGS_REG))] @@ -13370,14 +13370,14 @@ (define_insn "*ashlqi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (ashift:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0") + (match_operand 1 "int248_register_operand" "0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "nonmemory_operand" "cI")) 0)) @@ -14273,14 +14273,14 @@ (define_insn "*qi_ext_2" [(set (zero_extract:SWI248 - (match_operand:SWI248 0 "register_operand" "+Q") + (match_operand 0 "int248_register_operand" "+Q") (const_int 8) (const_int 8)) (subreg:SWI248 (any_shiftrt:QI (subreg:QI (zero_extract:SWI248 - (match_operand:SWI248 1 "register_operand" "0") + (match_operand 1 "int248_register_operand" "0") (const_int 8) (const_int 8)) 0) (match_operand:QI 2 "nonmemory_operand" "cI")) 0)) @@ -23135,7 +23135,7 @@ (match_operator 1 "compare_operator" [(and:QI (subreg:QI - (zero_extract:SWI248 (match_operand:SWI248 2 "QIreg_operand") + (zero_extract:SWI248 (match_operand 2 "int248_register_operand") (const_int 8) (const_int 8)) 0) (match_operand 3 "const_int_operand"))