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[2620:137:e000::1:20]) by mx.google.com with ESMTP id r11-20020a638f4b000000b004fbc925dd53si5620190pgn.453.2023.02.14.23.07.16; Tue, 14 Feb 2023 23:07:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Cg5nG3Xo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233358AbjBOHEZ (ORCPT + 99 others); Wed, 15 Feb 2023 02:04:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229877AbjBOHEW (ORCPT ); Wed, 15 Feb 2023 02:04:22 -0500 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C11A023655 for ; Tue, 14 Feb 2023 23:04:16 -0800 (PST) Received: by mail-pl1-x634.google.com with SMTP id h4so11547768pll.9 for ; Tue, 14 Feb 2023 23:04:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TRK1e1bBAwexX53o+cDSJezWbQwruRqnE48E6Hj9hPo=; b=Cg5nG3Xo0das2yUN0/60+sqBa0ErSnWMlsNBowJN8BwoCQ3hjkgtgb42l5KXUc9goK lvRlKtlV90UCVrqlkBW8qW1BXJe70ZxoOwuEwjWeTqxKfzDNKOcAKUHY8/C5QCByF8zO +yYQxCKkeG+xOB9ij1AkKaX7hWXoKLJh6CgZ9QfQaBRB8T28wtjXkVf+IeERTKj4nzWA ilzaB8VwcuJYtx0CSxZc6LNDMmk3QJzfjjdIJVNJF8J+cEswIUhFaqeIo9n1Q4omXsM2 aq+I2cOhi3RLweyjbgXvKVNfTbM3QDC46QQeKZQ6AcPT0GsOTDJDpJjnwQx5H/ZQXCua mTBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TRK1e1bBAwexX53o+cDSJezWbQwruRqnE48E6Hj9hPo=; b=gccAisoi5PGi5djkZwsOHZ48Eib1OP2fQhdqreiZmetp6jc63B3S+86RyW5Tcl649G nuN1FAPHRYtxOdtMSsIvDTaz7XkZHNUIl6yCjozTz5sDjh++TDMvtkp6fsLLTIwjJT5u w+vB2fkEvBkZwXWrPKtuvziGJkWARfGTWAnqbJHmEYm9tXYfIqeYPE4CiddePSRwmfTz iXchvw//HM59yUpXqzdoZi9IjBHjNBCaS+3vH7k2STCUN4waioHXasO6XAb3yhkniwtq wxGSpEXdNMrem5Jprzo73TxgtEhOvtCAyxN3yvVpeMLEGPuxoa60hP+9FtaHfvEtC9aC KaPQ== X-Gm-Message-State: AO0yUKVUdXrD1/4fh4atQhrchXUmh0lv7HGZEceU0xgFTlJJpfriJkrq R6E0jz4k5dtDDReeqKIRYo6p X-Received: by 2002:a05:6a20:12d6:b0:c3:3ea7:e2f6 with SMTP id v22-20020a056a2012d600b000c33ea7e2f6mr953942pzg.59.1676444656280; Tue, 14 Feb 2023 23:04:16 -0800 (PST) Received: from localhost.localdomain ([117.217.179.87]) by smtp.gmail.com with ESMTPSA id e23-20020a63db17000000b004fb26a80875sm9953795pgg.22.2023.02.14.23.04.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 23:04:15 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, viresh.kumar@linaro.org, Manivannan Sadhasivam Subject: [RESEND PATCH 01/12] arm64: dts: qcom: sdm845: Supply clock from cpufreq node to CPUs Date: Wed, 15 Feb 2023 12:33:49 +0530 Message-Id: <20230215070400.5901-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> References: <20230215070400.5901-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757879833842287985?= X-GMAIL-MSGID: =?utf-8?q?1757879833842287985?= Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks to the CPU cores. But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 479859bd8ab3..1d5e6ade8ae7 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -92,6 +92,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <611>; dynamic-power-coefficient = <290>; @@ -118,6 +119,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <611>; dynamic-power-coefficient = <290>; @@ -140,6 +142,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <611>; dynamic-power-coefficient = <290>; @@ -162,6 +165,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <611>; dynamic-power-coefficient = <290>; @@ -184,6 +188,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <442>; @@ -206,6 +211,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <442>; @@ -228,6 +234,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <442>; @@ -250,6 +257,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <442>; @@ -5232,6 +5240,7 @@ cpufreq_hw: cpufreq@17d43000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; wifi: wifi@18800000 { From patchwork Wed Feb 15 07:03:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57403 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp43645wrn; Tue, 14 Feb 2023 23:06:17 -0800 (PST) X-Google-Smtp-Source: AK7set/ZlbOdWie8g+bV/peQf+lHujOdwFrkNbIBcCJH6f9arYRpRc0DNC/jGrVXRm6fm3OX0Tof X-Received: by 2002:a17:902:fa0c:b0:19a:ac93:64a with SMTP id la12-20020a170902fa0c00b0019aac93064amr1224847plb.18.1676444777568; Tue, 14 Feb 2023 23:06:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444777; cv=none; d=google.com; s=arc-20160816; b=pt2dGV1W1H/YK6uigeeUc7LCn+OHqOcRbxh99YO/DMojIEbxfyuCMylyQ/YNuymgK4 tlYD6CPRfC8JRC283hXhTBuGWAMtXBn24BYOA+m82xAvtEClGtRUZKPlS++dSdxeQ6ef F4OEt4FYHMI0X+zVl/wqqXh8NqytOHLhJWwBb6K82Y5WIgJtAPYAb9BRjq+hLJrKl2H1 ff/4pW1GW3w7fXrMauxvrNn8XRaXKdNz/B/wTnKdqLN54/uGtK9/U+UK2h5nRUp5W4pV 0fXT2U+HdB2VC19VEUdLE4ibO89Tji76xLcB4c43EA2O/YZEcvmQ+h6XyEqbR7em7SvC RWGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=AL6l5KdLl+g77HDa3WqYUX34iRKmo63b52JJZRcNsok=; b=t9TgbCUvVqf9ZUgXS8Wtra9REBxo3x8Nb0j9L+DZQkmXwy+52Ufx0gjDeXuJU9TXwt X7Fc5hm6JatwVnbAk31ePlxW746yr0Vww3SESmJoUXRtnu6DwPz3l0T4May60OZWc9Kw pu2selOC+kB8t5NMXM57f+m9gRvy1QIxOTvkOFnAFVedN11LjhYoP0otCFojfLA1wGvv jCUFfSaCLnTbTqskT+TI910Axm3wM7O/4Y6xsljYLHwnTZ4Bltrv+7ZGs6WQ+RJ4vM7e 4NAX7ULDJBmBreN+WDZA5jfHsZBPxAyPExZo7INV8gDe5+/gSeWYfAEmut++VypUZZG8 nAVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zX4vvoFb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index bdcb74925313..d9b6e028cdac 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -168,6 +168,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -193,6 +194,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -214,6 +216,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -235,6 +238,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -256,6 +260,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -277,6 +282,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -298,6 +304,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -319,6 +326,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -5337,6 +5345,7 @@ cpufreq_hw: cpufreq@18591000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; }; From patchwork Wed Feb 15 07:03:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57404 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp43649wrn; Tue, 14 Feb 2023 23:06:18 -0800 (PST) X-Google-Smtp-Source: AK7set80yoLZiaLDL0kYjLjVBiywNO23P+B/WCnFjvgt5Qt/TppscR/T248DcEHTtPePHfZ8ECQb X-Received: by 2002:a17:90b:4a4d:b0:234:cda:1b8b with SMTP id lb13-20020a17090b4a4d00b002340cda1b8bmr1644689pjb.30.1676444778526; Tue, 14 Feb 2023 23:06:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444778; cv=none; d=google.com; s=arc-20160816; b=Ok9VpzPind6yWiajkVOWUJ43axAXfBU0PEFtYJ46jgi3+RaGQ/qbqqXpJnCvY/ygVo sEj9HAP73Bnayg4DroRL8xUAM957Qdsp10FqTri1cjeFTfb09l5bK0T3mwthR46kXB35 L6DFfaD1N81y2cJDGUthXKLWraDkFmWXPl94sLVA3VO7Xe4ROA4jeBHLy6S3eOqEHIV6 a2p4Xaqk43GQnJO1cQNbMwL9RsGLcHpfJD7LzjDWlfQKvhlaE2mCmKauMtzG7fXWLxai Q+57BngDToyBRF32bKc4N6UhzjfxLVTgAXeNskRzZgu2o2/uvkU8/J4EqzofzgvMy1Oo qs6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WUhIIB+rfvrBco0Tx+05fd4NkFmNEOYIZUMnaElvm+E=; b=pk9A1/jnuEt9FqlnBGUMNszO2JKTVIu38RqkB+YdaL9vzYQ4VTkIrxw9rc5K1klaec iQFo7rceCi0UuAhasROj38lxkkokXtZHzgaeLpnOG5lr36K5Txq8dYh0s2RntnvpkFrV 4Tuo9xzdmwqs0SrPs1tC+0dSl82+EuXliZ+Ur0JuWzqJuH22wOiu+DjN/E91oHutI3Na HFTZeLmJhqzhDF3ZE4Ae+41iP0j83dGCYhZwjaYavOqpKgu7BOfIYX5wFYZVbTBgFQ70 iSecNhk0MAqDPP3xr/ltT3+fXLEmRgvVEycNGrFCjzOnZ9Lj8Y8J3i65rUqOmQfxpqwp AIug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="NbPR/wy9"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 1e1d366c92c1..c46bb6dab6a1 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -46,6 +46,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -71,6 +72,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -92,6 +94,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -113,6 +116,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -134,6 +138,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -155,6 +160,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -177,6 +183,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1894>; dynamic-power-coefficient = <703>; @@ -198,6 +205,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1894>; dynamic-power-coefficient = <703>; @@ -2002,6 +2010,7 @@ cpufreq_hw: cpufreq@18323000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; }; From patchwork Wed Feb 15 07:03:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57406 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp43863wrn; Tue, 14 Feb 2023 23:06:49 -0800 (PST) X-Google-Smtp-Source: AK7set9UfZVk/n7pXpwJH4jidqipbmnoUAEqnrkU6PtDo8mOsxolaAkf1kw2z9k1THWViuimcgjk X-Received: by 2002:a17:902:9887:b0:19a:8e52:ce0 with SMTP id s7-20020a170902988700b0019a8e520ce0mr1106081plp.58.1676444809026; Tue, 14 Feb 2023 23:06:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444809; cv=none; d=google.com; s=arc-20160816; b=nsvx5CNhlOPIRAuT3nDAokQazCWBlyzd8APlU8dZ64mlKibMZu9Ap1B9pT8ucEq+Bq 3RldqBhQ+y0oDYa7coz4yVzKchZIqQm7cyVOJUvbhd08Xxit0Osm4Y6YA9rn7sfK7bxN ftWGM92QGkm4fBaKYJ6mTOb9f1uZzYrrWAF8DQOFrvdajzEcgae4hWGJmd3e2yZ8VhP7 NEm1ub4iHAQgA0xwaB7zktU6kanZEUU/Bect8Bxl3ieCxs9T+5Ny5Y7ovaWB7TSTyWNc g2e5KBB9QfSEIrcngoGzVg8WWxF2UppqfNHDpqChSgX1mAnm9aFhO4mz9XuOYDTQEoHV lTUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1fQsTTXBNiNhOtrjU3bWR9pOnFEJRPHEV6xz3+pJ+84=; b=fr8OCfYr2KsAD+OVZKpdnlep24vCH0ZuPAMxe8KlI4MeZSRROdqAETLzlRDzdcMrs+ 5oJiiy+wB9DWjh7BjlDbi+U0rfCCzbnzy2TlZKBCathEp986Q/5hNBnX+1GIgt5eQXjj pmswjoZWwKm2GDfemmO2yD2JgtnRSSU8hHfnshdup3DrEJFWSzECmcc3g+FGJPZawgVV X9ErjNG4PwZgET8NbWA3YWXDrbYU913WOYJPNoqa90iYjcq+RKV0NkVVdQbkbCC0hGvV u7iwCi1qJyBnvrIZbJCLvRuEzA3FEt+ZP710SLX+idj053uKh8P5i1NX/JEomQd4mXrT zdZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MoCFxa4c; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 9910006c32aa..21b4f668889d 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -68,6 +68,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_0>; power-domains = <&CPU_PD0>; @@ -91,6 +92,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_100>; power-domains = <&CPU_PD1>; @@ -110,6 +112,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_200>; power-domains = <&CPU_PD2>; @@ -129,6 +132,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x300>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_300>; power-domains = <&CPU_PD3>; @@ -148,6 +152,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_400>; power-domains = <&CPU_PD4>; @@ -167,6 +172,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_500>; power-domains = <&CPU_PD5>; @@ -186,6 +192,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_600>; power-domains = <&CPU_PD6>; @@ -205,6 +212,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; next-level-cache = <&L2_700>; power-domains = <&CPU_PD7>; @@ -3341,6 +3349,7 @@ cpufreq_hw: cpufreq@17d91000 { ; interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; pmu@24091000 { From patchwork Wed Feb 15 07:03:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57405 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp43822wrn; Tue, 14 Feb 2023 23:06:43 -0800 (PST) X-Google-Smtp-Source: AK7set9AFqHkJgZixD7pPdlNbZQ4araC9SlzKxe5DY3xGDTX+OHp8XT0SoA2wWW8tGUQCDRISCCW X-Received: by 2002:a17:906:868a:b0:87f:89f2:c012 with SMTP id g10-20020a170906868a00b0087f89f2c012mr1210530ejx.24.1676444803707; Tue, 14 Feb 2023 23:06:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444803; cv=none; d=google.com; s=arc-20160816; b=SvPRGsrTevqVXdWjXFwSeyVPhrEhTZOV6E+5lgqAUV1snetg9LzqbV8sBBxIhqwQDY wkLfOyzh4TWbRllTO+4OYCNdiInODaP+yuyRCg7WHp9qOk7knV/w9tuaNI4Kh2d5yVNQ djCHCG+yTO9PgMpRuRpvod1oXPAs6wA35Zy+pfnP3xJPgIDrVXwlOY8++nfyqmu4Cfh5 Xy8D0iDRSNCO5jlmoWU1YOoQTRJIxH4oeaLMGI9U1/J6zTxxQkVSxbQFoH8knmV44J27 AK3XSt6svo5V5Oglt7VCnilOCMflAzqYjP8GaCPu4ycGD5OYKzbB9nB500fnIrCL5nY2 R6/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iLerwrwmNfdynSXWopegSimuZHzpOIcHKtk78GRdX8o=; b=OMLP6v4PjulXAn4rCg6wVFbibxOt8dRwVOuVaY45KZUHcOg3P+Hl/D2QigxieE3Yoj uN/18UA4vs0jo+dpnkK/Hb5dbd2y8AOqXn6yYTWugtuXdBmF16PzfenfgMS1SxzWlfHQ CNBSVxLDENDDFO12lNTgi3l+tRioVBA0IGsMcgp/5mMp4o4AMqMGX+/93T+zLZFBn/Si N1UdZ2mgx7JzqpywE2R88owtUQbbjEXjInUUv4u8+KFaK07ih9OP6ohAHAyvJFI74ewi WjPbIgXTmxQMJNhrcTaQDKZmKB7Xt2rNRqTha3SZMMg02rDWt7fqAIr3SrnvSy+aMt5s mWjw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CDD6hhgz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 2f0e460acccd..44c8851178eb 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -97,6 +97,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -127,6 +128,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -151,6 +153,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -175,6 +178,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -199,6 +203,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <379>; @@ -223,6 +228,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <379>; @@ -248,6 +254,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <379>; @@ -272,6 +279,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <444>; @@ -5481,6 +5489,7 @@ cpufreq_hw: cpufreq@18591000 { ; interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; }; From patchwork Wed Feb 15 07:03:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57412 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp44369wrn; Tue, 14 Feb 2023 23:08:10 -0800 (PST) X-Google-Smtp-Source: AK7set+LcFclNs79GixlfHyrsxanE5S4V4tr42sdacugXuq/+ncnbaj1uV1DOkMyJ0p5L2z+e/aq X-Received: by 2002:a05:6a20:5489:b0:be:d4d0:19e1 with SMTP id i9-20020a056a20548900b000bed4d019e1mr1055531pzk.51.1676444889811; Tue, 14 Feb 2023 23:08:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444889; cv=none; d=google.com; s=arc-20160816; b=nfztrCd3qW3WHkHU3QtGfFcPbz80i0jm5O+yZzTYQb1eK8qihEzK0z5yRUN+o3ox+s 2SX4Ukl+xQMnWPpB+6nfFjSw5g4EyPJKqUUZ0iN0umKTDnOwa5CGi8BJnZGMj/8+CWba g0kruzBkUWGoCAtn/rDNC9oCQinrudiuixRq5UAW7KJu4PKJDLlcZx7fcZeeJsSmEXwb LySk2yFnvCm2D++LinQ9prIqBAhRnlDKiXhTcVqdWbphDMcsaL3ZiOSrwlENXu1D+YT6 ipex83RSPM79WMjs9EDAvunAZQm6IDNttS9IaTPkdHK2asvOo+eeu/58rXRytVvJHoVx 3oNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LHVr08cnTjJMehZboB/JWbeUqVs1oVn1lVODeozYst8=; b=f8A7INRBjuEdJTUoceBC29D8Q+cLhDnvr5136UE4svMidlp3SRUhcSn2roZJgip46v dzrW4CVOOPBEM2jYFEsQbi3Ebe+4xHb3bwhfb4XocDFR7CAllChCs2Xzw3iO6/GO6BjM ZQ/iEi0Fe2uNmNl7jsnxUd3aJAmeYMaaegf0H7UP7ii7JDtxiEEX/Qczy0FEPdFB+ivr JMvn9M27nElkuOYlVN2LUu84rwsB0IwCpWM0/bmO5pEP8HDQ/Wz4UpcW0aDWQ6oWoifM XsID1uKwy6mbbz0LHR7IUdASy9NuuePCKxx7cGSzt2U3Dg6nwqVMW2GhNBaOCE9+OOrl cTOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=V3YYbHbt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index f234159d2060..98a859ad5229 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -27,6 +27,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD0>; power-domain-names = "psci"; @@ -45,6 +46,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD1>; power-domain-names = "psci"; @@ -60,6 +62,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD2>; power-domain-names = "psci"; @@ -75,6 +78,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD3>; power-domain-names = "psci"; @@ -1312,6 +1316,7 @@ cpufreq_hw: cpufreq@17d90000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; gem_noc: interconnect@19100000 { From patchwork Wed Feb 15 07:03:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57411 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp44356wrn; Tue, 14 Feb 2023 23:08:06 -0800 (PST) X-Google-Smtp-Source: AK7set9hs5kBUKc+xWP8ZhRoW5vTuD0IJyg0Y+/ASejGDO5AGTp7VUObYsg0rVLVcMSqb90BZ1gd X-Received: by 2002:a17:90b:3805:b0:233:be3d:8a49 with SMTP id mq5-20020a17090b380500b00233be3d8a49mr1879716pjb.11.1676444886620; Tue, 14 Feb 2023 23:08:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444886; cv=none; d=google.com; s=arc-20160816; b=mCWP+lZunrL6BG3eq9sVLrhPU+vQV563F6rvqEzRWZ9zHzNB3Tv/kX5EClXD4ZP5So dRKv7pIPISEBXsUSwOESVD7kDz/SyCxC6UTPK+uUz7FTKFsx6scmOUMuPc5shjB90OK4 xWgXthwrUnBhsSmVEy0duadf6zb0DtTj6pHMc5gmQh3yfjqzH57RYYUDpuJN8VIDS7v3 EtNgvre55QD1HYWEXFvDXDxezqUo1IDWRdiE2YZuQHqUMuv/BqPB/zob+PM7ee28qsnB kggGontvjQpL4tL+Z7t1imPRwGM0SKIdyiJJZGHEjC/Y7lbf1VyINXWKkgfuKV+xKcUM U1Kg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jtvgID8mNLGj3X1P+nHdIDZyTZvvt/sYgRm2r4KBSpE=; b=OvadgjP5TT8LoDZMLkENTzQ42VQaLfZdYYFYaaP0INexQIIawIfJYCveJ0NK5RM8Dg hIdDzjFrv7k5qTqNF5sr11qVDWRYPzAUsK79mirdseRh7lCf2410vc1EJIefSPxDBHSq avPadGgHBPRgBEA1mlLNr0gxh85aBMTHMHSIyvik2bWDhg3cfalCxLXmA5s8W0nV0tnM UZOy0rFCEMvyVbivAb48Nbl7KkEhZtdViUuZKJwzhv59lrF14mKpUGRkt/bbfqBVV4y8 /8u//dsCP+HnS6l2trpLBm/Ft7OzdTPHHgstmWoQVWIfsWgYa7YPgAr1QcYNJvIFS8pa z/6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hrTMbntn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index ebfa21e9ed8a..53f0076f20f6 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -76,6 +76,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -103,6 +104,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -126,6 +128,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -149,6 +152,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -172,6 +176,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -195,6 +200,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -218,6 +224,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -241,6 +248,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -3578,6 +3586,7 @@ cpufreq_hw: cpufreq@18323000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; wifi: wifi@18800000 { From patchwork Wed Feb 15 07:03:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57414 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp44492wrn; Tue, 14 Feb 2023 23:08:28 -0800 (PST) X-Google-Smtp-Source: AK7set+lzin8m8m+dPnozjPYgb1Myn+FNQb8/SQHbBc/sA7igZ0pj2vHBlNXsF6GNQc0gb4/X3el X-Received: by 2002:a17:90b:4a8a:b0:234:1641:db50 with SMTP id lp10-20020a17090b4a8a00b002341641db50mr1777267pjb.19.1676444907905; Tue, 14 Feb 2023 23:08:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444907; cv=none; d=google.com; s=arc-20160816; b=Hle8jAXyedgORyfI67a6Cpf+lJQffIXEEIiqADtl8kVYcFpylbZf20VaGT8PVCUovw LpUbGD4dJyhFApjxGUJCBjXLtCqWereRsGxXKvK7gTfzQY6k7VWjUIuIfIZsxyTK6rbY yPRFPOkITxgzu1uW7eS+HKrVdO43USUpvlu0McZ8TyOieb3ADVn5nyKmQG+FtICvMtgZ taupYjeMCIOBAB4t31G4dMCJMKm2Nx0hHPQMYuxgd46IFv/rD5+X+ksOSg/9Fyv0W7Tw noDB88jKm4DFN9jBpf3uy8jrkXv5SednI385568cmOgCRYhy8kSfc0ZEnqDqny2HrIKl 8tpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6hWzwrq3hV8TOIaiR9k+5O0t1qbVTCRxBbpH8HHjlnE=; b=NqLrjnD8ExJGcd8Ys9yG0v9OLr43ogzCk4rcfQXBDau+pvUFkIwPQuo+bjDfgQUFGx N2fRjxWBG9/dmJWaPAFOhO/wUU53fweAe8WQnvOkDaJfjtVI+2HX0s0sqtFp8f5rj/Vs x58xEWzMPxpDn/aLDWqfX7gJwQG0vKNgwnZaleO2VwHQtf5Vtwcs2PcM7rz3ttR0rFyG f+jDja2/SUhv67LbugqJH58eznPGxX3i36zrO6baK0BS+gTZ2VVl91qr9GcfokFvObGv 6yU0Etm13YF8N1z1BbPD1hJjMYFi10WGjb6RI0DosrBsVVWLBXbpU5+Kp8fdx1n/3V4N MrfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TXxVBnOl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index fd20096cfc6e..693d023d2629 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -48,6 +48,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -74,6 +75,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -97,6 +99,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -119,6 +122,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -141,6 +145,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; @@ -163,6 +168,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; @@ -185,6 +191,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; @@ -207,6 +214,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <421>; @@ -4273,6 +4281,7 @@ cpufreq_hw: cpufreq@18323000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; lmh_cluster1: lmh@18350800 { From patchwork Wed Feb 15 07:03:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57408 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp44080wrn; Tue, 14 Feb 2023 23:07:22 -0800 (PST) X-Google-Smtp-Source: AK7set9TvhEQJADbGroESBFRwXf08w3AeVD4E7RHkh+pDTQufP74S9cbPz3ruVy+HFFp3md4bEas X-Received: by 2002:a05:6a20:7213:b0:c1:206f:1243 with SMTP id y19-20020a056a20721300b000c1206f1243mr751579pzb.39.1676444841866; Tue, 14 Feb 2023 23:07:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444841; cv=none; d=google.com; s=arc-20160816; b=D+5blg+sfPbd4UOVbNs7XxlZ2QW8DI/hxy0NqHxOpklFzTHUHuLizwr+BpYrmOT5m4 5hu7wYTIVe8CBFFVmNBEg1HcrH9sd5VOdOvC4gDLislZHwbX4RMaiZZ8DPTfI6ejjT40 6/CQmSz1GMoCynMYkJtMJEIun9AJYWn2FF0o5h8zW6u/BzL6SZbPassQsekesO5pIsL/ XTHjCguTn9uzUbP8Yv7LSPX/em2jgj1KZZKhlA8zCgOUFKQddrGhV/67eju8hkt5A8Or d7wX5qh6RRkHD2OT/Lhxf2/fPrKri3VG1r7WTp70QEAaaY9F8QLYE4YVTmlKI9WDHKU5 eT0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=MSprQRzUAPAcRKdXmOH1+IXrj92bjRdjsdi9aS/W/NY=; b=RjMkZFa5qwdRdfDWMLBhDVskptsQm4EDl+25RMQbk9eYvlPQLhaq2NbVijeiWw6TkV GodK5b6DLC4/5QaACFm85rWTEQZvA7Euvoa/gk9TG7YgyHZSWwcJywSOmIudSBOnPgZK cUBisP2H6QA764MrHrtQVTCWpyb3knB0BdWltW/7iwvyKKN86DE1IMKK5wQS68PuDkBh 8C2OE9hyfkhZDTbUM/UmJ10UGcow8K0agQsitDJtDqY5Tqykwhc48TXDzBH1R0NPNRGH PCtDF1+k+Ubf4Y2lChrgzfO7VGbp5qwI99hG4bSn9qIFL9WUhSpItV7CmQVbCNalwNbL BBbw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qvlr8d3h; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 0a422637b61f..1b423c42ec0d 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -48,6 +48,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_0>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -69,6 +70,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_100>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -86,6 +88,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_200>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -103,6 +106,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_300>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -120,6 +124,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_400>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -137,6 +142,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_500>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -155,6 +161,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_600>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -172,6 +179,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; next-level-cache = <&L2_700>; qcom,freq-domain = <&cpufreq_hw 2>; @@ -2283,6 +2291,7 @@ cpufreq_hw: cpufreq@18591000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; ufs_mem_hc: ufshc@1d84000 { From patchwork Wed Feb 15 07:03:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57410 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp44244wrn; Tue, 14 Feb 2023 23:07:47 -0800 (PST) X-Google-Smtp-Source: AK7set+9XyAX2B3wbRCVrzi/qyhFZsI/gNC8NI0Kt4SJocbgYeWuj+z8tZl+DMXc93gtXzqv1/AM X-Received: by 2002:aa7:cf8d:0:b0:492:8c77:7da9 with SMTP id z13-20020aa7cf8d000000b004928c777da9mr933990edx.9.1676444867693; Tue, 14 Feb 2023 23:07:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444867; cv=none; d=google.com; s=arc-20160816; b=q7y/IxzMmcpYYc6JWEP5wa0sXlSv2fyMwY/IaRO8qdZI3Mk/O3q7PRUdwv3naa1i9x qE6bmGqPbZpnx0WYCAtJbrcPbF0zCkTnYC/lmX6fUVNsghrkpr947rlpAJSdIJc3xsNM Hxxdyl+/0q3UjBvGK8xLqkZ9DpQWxjFQY2P7DWGc7wRDggGXjvBT+BJ2a2/R2oIDNvvX QjCKpyVYWIcrceTlVQUxHtaN9HfsYjuzfM0CdaXaeJ6QtweBLsb/TxvLxQE8JhNlD3O6 gUbOoEqqSW3fMHQKGVSOG0SETBDZmmwTxWyFk76qZWhvwHZ0n3bbvgGY8/wbqBBmelxF 2bTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mhId2O9gS5a2V65bZNIgYaEIr4oaxUhIqjkueyE7108=; b=O6J1fWLAkEZM5lzuiTE1kBrcGYUhHk5kueSqJe49I2epb6GJwjQjESFvgoJSDZuND8 0rLiGYygZr2GkfLH+AEwJ9uO8wBXuWYU4WX4JSBTducVfva1lscAJw1kwVhtX82Ei3Hj FXLDS3b+9ZrdcxLaPfTW2UE6aRTStTXM451UGxb1SQgbEyOl0yNo4Rq6+jV77COGu4r9 PuX4JJrE7oeyV5X/PoQwFylwrUJKJeZbtfG+K1Prcawwt61yo6up+aLpXqa4SupKkEjW DIxlXLiXSvb8uDkYZW5FBEikb9Zw3nQOESiDpX4EWbtQGLJDR5L8luqONWmYAPt2nRvK fezg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MthjD0Bf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 813fb168801f..a1eb9e333699 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -45,6 +45,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <602>; next-level-cache = <&L2_0>; @@ -69,6 +70,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <602>; next-level-cache = <&L2_100>; @@ -89,6 +91,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <602>; next-level-cache = <&L2_200>; @@ -109,6 +112,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <602>; next-level-cache = <&L2_300>; @@ -129,6 +133,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_400>; @@ -149,6 +154,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_500>; @@ -169,6 +175,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_600>; @@ -189,6 +196,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_700>; @@ -3875,6 +3883,7 @@ cpufreq_hw: cpufreq@18591000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; remoteproc_nsp0: remoteproc@1b300000 { From patchwork Wed Feb 15 07:03:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57407 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp44050wrn; Tue, 14 Feb 2023 23:07:17 -0800 (PST) X-Google-Smtp-Source: AK7set9SYnncv+sx3QOG533DQ0cmoMaYXf4pOq/vz/1EB3ztRDSqHfFEDPanY7SY4a/T1mLe1Lij X-Received: by 2002:a05:6a20:914d:b0:bf:abad:c7c9 with SMTP id x13-20020a056a20914d00b000bfabadc7c9mr1115251pzc.22.1676444836773; Tue, 14 Feb 2023 23:07:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444836; cv=none; d=google.com; s=arc-20160816; b=avcN3q5bhWonqYj3kW6IIbW7+/eopDPbdbdSZwFPRWfQ7cMZy3ZhttMeVqFTayLI3N cO/qGCqu905iJ6QRa1C1/x7/6db+itIK5nJUbSWKh5O3DbIaV7FI6SnZhKlUQOavSZkT gwxaSJ/1TaO/KR4qadMUI02rRHUMGhB2P5secClaVdtmsji4wlWBiP/Y5swNtldnQ3jZ M589yUrtX7prCoeEXnjVNyVn3OcZmDkJpTpjvBaLeNTvdQRy2Q0L4xgDv47OYdZwdps0 TfEqFt68co8ymu1+Km91VqF/VhFUiR1FU00PcZ8sL3onYhfATnVxk9UvekeX1bm0yySf P9qA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=CZHWlB7pux//lNkbt9HTSOdwlznBfF1lihCKM77AJKM=; b=CXbN1M0vJK+58UHfcZyBNyWSFFmskXJYNMk4BaDZhGp843ehGmpqz20cmlIpee1EA5 tlyYMONhmJouWbcv90YpM7GwiA/TG7HSFUdW+7Vqw48xpyQzfNH1k2/zgELV6zkwb7vL mGEzw44KRN+BPL+Lt5JfpRW6AxI7bhyIfrpfc999Lt76up0mNmcmEEB0+zCfAK42l0Gl fIF26H48+pEFjmm5WdCrF5LgP65U+2EbBWWkEk8sB1WAVC2pAvAjEm98XpnwCzsm0xTk jkUguG7wW0LDlNsVilWUHBWaY65VYinUCOqTMnlcn0n+Rnja11P3PDec3KPeB24JOl/L +/gw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nkKnTlEN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6375.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi index 31b88c738510..58d3b4785401 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -39,6 +39,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo660"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_0>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -58,6 +59,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo660"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_100>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -74,6 +76,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo660"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_200>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -90,6 +93,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo660"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_300>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -106,6 +110,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo660"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_400>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -122,6 +127,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo660"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_500>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -139,6 +145,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo660"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_600>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -155,6 +162,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo660"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_700>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -1383,6 +1391,7 @@ cpufreq_hw: cpufreq@fd91000 { ; interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; }; From patchwork Wed Feb 15 07:04:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57413 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp44412wrn; Tue, 14 Feb 2023 23:08:16 -0800 (PST) X-Google-Smtp-Source: AK7set+DkSgXlLqrwx5ZJY0+obiugb4/Z6UvR8MENKz7J7ypKiL/lmuJgymFoHWt9ywY8bcmKPtJ X-Received: by 2002:a05:6a00:9b:b0:5a8:bc8a:e066 with SMTP id c27-20020a056a00009b00b005a8bc8ae066mr1043240pfj.26.1676444896711; Tue, 14 Feb 2023 23:08:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444896; cv=none; d=google.com; s=arc-20160816; b=floe3efYXNdlvLkWQKalOXlAjElHnRAhSIJLw1vrNsi/lhDYZP/b4ZzFO2PBQZS2eS TgEZSL5zJ0XHxuOcei/GvfUvdls8CCRmelV2/jqI4NJKkSjanBTmmZbseIi5MUkIkXrc sJPblJ1HUU1TiSx9G1ID1hUO4tjFzdKC5jOovGG8ThWZjCCYwEhH3I35t63dKDfVOwyO fXrEj9w9imQzTwm6ZLF1SeCbVbU3lGCH4VgxZ/JLI/8BA0/H159sYExZDmYcNkFSt238 zzFSZ18btOPzb/BonHWcggNadGa5RmwrE/Vl7ue1Iyf/VvKySvKDtxVxt9H7F5+UYyMm P5Jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=E9SZVljqrUgZ+rONZA9P+4NVWoVxjLglMoeDTNYtK/s=; b=DlHuX6mxGS/F27gUAWYobJ5VkFfJFhH1anB1NaCyjnCncGo4+/lxy5HjdMIsLBzRLA Fbsd73mF7nf1uvMW7YfmE3eqiDrsZXi6MvHELHhAQmT6qTph55LYTyL1rJ+hHWKoaJO1 Nv6AObrxAy9wZ59KnY5QS+iIJkWwLst0kIiAWxPFZhoH8F4e7iC3NmY8aurxqhto+pxr TuZ6dhYyf+Vn5pjYDxsjEwI2Q076YMAZMBxW7O23w03n7tfNjR+ekRTAK5VWYMi8aVSs aWZ5wTurBZLqwZ4msApjp6lwykRCZXYlfuTobpTqX7/8Xa50BpSXtVHEyIn7GGh8ZZSR JiXQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vGsvj9+7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 4d6ec815b78b..f55b193139bf 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -39,6 +39,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; enable-method = "psci"; @@ -54,6 +55,7 @@ CPU1: cpu@1 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x1>; + clocks = <&cpufreq_hw 0>; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; enable-method = "psci"; @@ -65,6 +67,7 @@ CPU2: cpu@2 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x2>; + clocks = <&cpufreq_hw 0>; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; enable-method = "psci"; @@ -76,6 +79,7 @@ CPU3: cpu@3 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x3>; + clocks = <&cpufreq_hw 0>; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; enable-method = "psci"; @@ -87,6 +91,7 @@ CPU4: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1638>; dynamic-power-coefficient = <282>; @@ -102,6 +107,7 @@ CPU5: cpu@101 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x101>; + clocks = <&cpufreq_hw 1>; capacity-dmips-mhz = <1638>; dynamic-power-coefficient = <282>; enable-method = "psci"; @@ -113,6 +119,7 @@ CPU6: cpu@102 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x102>; + clocks = <&cpufreq_hw 1>; capacity-dmips-mhz = <1638>; dynamic-power-coefficient = <282>; enable-method = "psci"; @@ -124,6 +131,7 @@ CPU7: cpu@103 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x103>; + clocks = <&cpufreq_hw 1>; capacity-dmips-mhz = <1638>; dynamic-power-coefficient = <282>; enable-method = "psci"; @@ -2123,6 +2131,7 @@ cpufreq_hw: cpufreq@f521000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; };