From patchwork Wed Feb 15 06:55:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57394 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp40108wrn; Tue, 14 Feb 2023 22:56:50 -0800 (PST) X-Google-Smtp-Source: AK7set8mTI31OmOIjX/JgIVLbpXWcYROEskVz0FTYYVzVyjuR+thqEKwWXkiHrnx2PMaX3YLbTw3 X-Received: by 2002:a17:906:ca4e:b0:89c:d072:e33e with SMTP id jx14-20020a170906ca4e00b0089cd072e33emr1386805ejb.49.1676444210504; Tue, 14 Feb 2023 22:56:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444210; cv=none; d=google.com; s=arc-20160816; b=Sy3TEcDKxyW0P4p8pjMpbt1m7oFuOh/DLGjy8Wiru07QSA8KneFLGu63WPhfxH4dTO 6O4yzzlnONwc+IhBzE+JbgPoeCuoRtXIn+q8noG5h4yY/a+B0RMulQFfg/VafxemGZcc cQz7lHSXik8V/939eNvihopd0EV7Jv/8tjUr4yXiTCEKGEwx/vHvMjWuu8awgjgot3Ap ta20gLEArupDxvGXa3gHtRJ0bRnPxByvo4tug5RTHRG8WLCVmns5j2hOxlbRMGGZFvT5 Byo2LhhB7/0pyDkADsXmEPz9vOtoHDwLfuJA0z1VVDrUrM8uyZQ0UfrxWzAMw9gj62X2 ELxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=TRK1e1bBAwexX53o+cDSJezWbQwruRqnE48E6Hj9hPo=; b=YbJ9p5HF+7ZlJ29goxa+P3rt9IKRSkhfByAJ33FZwFhWsTpZLuDCFy7min5R/YlYYT d4irHQ+soQK/YzU2TMg+T3vri5cG+XzJ/wMOvEJwi9F5coGTqgMfi29iJ8TNuR4NSKPz 915tNv32IEWWiz3wynU0NCMLjXNMTkrnJMWU9fHXebAv01yGZxde0etZ+BiCr5ZPOipx OvCLwB90HzKcavpWraHnNusbKulC1btz79xcFzqrwFNvkwsIxZFz9jhIYqTSmo9t1XxV cahR2W4UdmPdZKxFIpR6U2D+w+bumy1/o8NqbulidlSHflLYieQL3i0XEg7YQjCrAqc2 a+9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KwsSTjhZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x24-20020aa7d6d8000000b004acbdad2a3asi11323678edr.607.2023.02.14.22.56.26; Tue, 14 Feb 2023 22:56:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KwsSTjhZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233565AbjBOGzm (ORCPT + 99 others); Wed, 15 Feb 2023 01:55:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56826 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233361AbjBOGzg (ORCPT ); Wed, 15 Feb 2023 01:55:36 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6552F34F79 for ; Tue, 14 Feb 2023 22:55:35 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id bt4-20020a17090af00400b002341621377cso1167739pjb.2 for ; Tue, 14 Feb 2023 22:55:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TRK1e1bBAwexX53o+cDSJezWbQwruRqnE48E6Hj9hPo=; b=KwsSTjhZm1JZmx1whps8mciiWBJlrx1ezk8vVUWwLb1Vgkis9AhVRIMgb/HeaAZa1Z 6mPfpPROXrsA2MBvIQ5VL5PCxAxAVA+uwopAYtC/CsYAqeDAfWHcF/nKjcUTwQ5LJ79Q /opk4ljz/Nyp1VeKn+DoRS/j5+4meUFAtvfEP9pF8cZYN36ONXQgIUjYhLHhKXXGJlqh /EyO0C43sQfS3P2RO2otoft9Gq/63Q+zKgkc66NOHiQEdlkAFXDgGtE1X95vHDQT8H70 AqJ83KmVryrpHcjbJ6LHrRSD/iy1EHHnac3BogSKuq1bO8HkidlShDnlIRhvnTXpGX5T N5jA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TRK1e1bBAwexX53o+cDSJezWbQwruRqnE48E6Hj9hPo=; b=6NEHGzyFBwOss/HfaJZbUjTtfIAkvqyIEPOAxpKDvDyiaTyAAUtytZkiZjnL5yV5MX awR1u8YvXfiubBxyyeSbBlxZmP4152ZBc0ikvEOmdtq+WKWETHKOHGyTU8SFudQJ1TSI z14JSZId/yHZqoKkHfgZz3aXO/wcwlP6T0RZGNCL8sSEOBjPgE8rWVPECklojFbsNsAF O6HblVSRvR0zW+TCDs5hoMCpj1n9rmjDb0HFH2fPjtq/2UK7tjSlJRc8spRY5DRD/69M d4G9L700Rle5SEE+VuwXEHZSkfM3HTaym5qsVQx6vCYtPY2RMnEjwQOsDSb0phv8+8NY cHWQ== X-Gm-Message-State: AO0yUKWoMjyYU70tKoNpiRQ62hfIFUzOIOrSBcfAnL4amfZOAGmQY21k UjuljEr3km22knI1yUgvprnTDWXYlVQJzyY= X-Received: by 2002:a17:902:e80f:b0:196:40ff:97b5 with SMTP id u15-20020a170902e80f00b0019640ff97b5mr1651946plg.40.1676444134842; Tue, 14 Feb 2023 22:55:34 -0800 (PST) Received: from localhost.localdomain ([117.217.179.87]) by smtp.gmail.com with ESMTPSA id d23-20020a170902b71700b001933b4b1a49sm10276870pls.183.2023.02.14.22.55.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 22:55:34 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, viresh.kumar@linaro.org, Manivannan Sadhasivam Subject: [PATCH 01/12] arm64: dts: qcom: sdm845: Supply clock from cpufreq node to CPUs Date: Wed, 15 Feb 2023 12:25:12 +0530 Message-Id: <20230215065520.5535-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230215065520.5535-1-manivannan.sadhasivam@linaro.org> References: <20230215065520.5535-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757879164643820839?= X-GMAIL-MSGID: =?utf-8?q?1757879164643820839?= Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks to the CPU cores. But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 479859bd8ab3..1d5e6ade8ae7 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -92,6 +92,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <611>; dynamic-power-coefficient = <290>; @@ -118,6 +119,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <611>; dynamic-power-coefficient = <290>; @@ -140,6 +142,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <611>; dynamic-power-coefficient = <290>; @@ -162,6 +165,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <611>; dynamic-power-coefficient = <290>; @@ -184,6 +188,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <442>; @@ -206,6 +211,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <442>; @@ -228,6 +234,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <442>; @@ -250,6 +257,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo385"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <442>; @@ -5232,6 +5240,7 @@ cpufreq_hw: cpufreq@17d43000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; wifi: wifi@18800000 { From patchwork Wed Feb 15 06:55:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57395 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp40179wrn; Tue, 14 Feb 2023 22:57:03 -0800 (PST) X-Google-Smtp-Source: AK7set8hFlHF2bNECEq3Yt9/v6JpPRKViRAB7NiGH5Bsx6oH9Cdsz3xQvJfflOc015MmFG/XpdJE X-Received: by 2002:a17:907:2ce4:b0:877:a3c4:807b with SMTP id hz4-20020a1709072ce400b00877a3c4807bmr1855900ejc.68.1676444223320; Tue, 14 Feb 2023 22:57:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444223; cv=none; d=google.com; s=arc-20160816; b=t3k0xLeB5n90jxxUjuNYIIQHoQjYpnlYv4+pKPdLyhN6kRFVyHRUohDbYFCH5cDUlQ 3Lorzu6nFkRl22b7Cw2t8S3Ki7foGPoVTQFKqHLnmwRvHnSepckOVu+KFGTYrApH+6pQ tY62Du1Qh1GHMEvvAyhLiQ0dc7cFMMKjr/tUatiqHaRL3HFpxXcjzdGrvxLf2yPPOvUA 2DXu4E2mQq9XS0jFDu0DkUSPeDknydj6EremBUD+kqb3e1r6uaMbGc0W2eRX9PN78xIo x7mmJG89ntkUtkl1+KcVNd7ZkAYX6nrEwnFMCrETwpFJnslczlYLApdKd53EBXLDqxrR SD/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=AL6l5KdLl+g77HDa3WqYUX34iRKmo63b52JJZRcNsok=; b=C0tX6/IlGhcWdfcNYcinI9tUc5VQ95UUhEvMXhvQkhx7Wsys1f4B5JUYfRTE/vGkYs IJjfofFERQ15IBNIXbJMJaJKfELn4PlKtA3aBoq4ll90fC3KVGB+osAfbN+NwM2wmy3y 2rbiDMt02BAzcJoQZMtdpdJNs7+/mrJFaUycuYvBLFWmBzXUJ6plDgyEdh5JhW1Dx0Pz AiCx0ivZR8cB1cTKCuXPNz+kAF35k/Z4g7PWfuNKM0BoguJjprWhgqNDfXi7snwaYd0W 9s04ajdwYepOBb+0DQzyUKdwg+Guq+WnEMxBZ+Q/+YD+63xobYH8XEIls4BYoHdcV2Vu r2OA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vp0mHjG9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index bdcb74925313..d9b6e028cdac 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -168,6 +168,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -193,6 +194,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -214,6 +216,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -235,6 +238,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -256,6 +260,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -277,6 +282,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -298,6 +304,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -319,6 +326,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -5337,6 +5345,7 @@ cpufreq_hw: cpufreq@18591000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; }; From patchwork Wed Feb 15 06:55:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57396 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp40342wrn; Tue, 14 Feb 2023 22:57:30 -0800 (PST) X-Google-Smtp-Source: AK7set9vH1GMGpBmzTDae0UA8CRlVdIzjOX5RRY0dBb2wZs1Wx4NLJxS1F1gv5q0kAK6o2N8HgG5 X-Received: by 2002:a05:6402:1283:b0:4aa:b310:b695 with SMTP id w3-20020a056402128300b004aab310b695mr1061544edv.35.1676444250376; Tue, 14 Feb 2023 22:57:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444250; cv=none; d=google.com; s=arc-20160816; b=XalYWT/iTC47UyLtoij0TBxoyvy9KakPqRbbEoG0vD2q/rOPKEKdkqPdvSyugOJnuT Q/ZnbssjZIaajfGZKEVDpp5+ST9hMLcxYPNYwuxrHAU28U0sEZmmgb+JYQfhcVvnFvQk x3oy8SjFgPcBBzskR3lsRTTb6DGzkRvKLpCk/lIebcC5xda81plvZdMzVOa8R3lA1Zqi zoNpoeJVUB2EN02KPjlwN06JjygvZS7RdR5qT2v/8bHSs1ODbMN7iAvqVPQuxVWmO1bb d69/69LHrqrs/b3k6sp60Elr0ySPLTKmN77ibtdcIQkQCklFLQBjMf8OVysvPeFUVXl+ viHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WUhIIB+rfvrBco0Tx+05fd4NkFmNEOYIZUMnaElvm+E=; b=AOOYwAGcW7kgc8MYMuTyG2d06b1wSQwooYYNFduBEL15o4I5CfEwrF0TFCcsEnpq6N obDlIK6Frh3Ihqgty2Oe4176wto1jZmCUYKBTURIY8V834OqPijakJadki5CP6mTtfqy nd+zx6Z2ZoOsxfSBUFqNulyqEOr6/DlEWk9WN2fkefMIQ3ovVxqr8xyrUjmDcBGmru5k tHtEMnAKvkGw4JY+0VRnUDs6b+SDQpOkaexotueVBqHtMwJcwSelKLkbsKmGP6a/HQoP Rg+qcs7y6Ea307mz7PIXqji/9SMTT7dHLmTH3c3WTIxpedKBUOkqbK6Z8FmQJbAnXBYu 3oPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rvT9r9KE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 1e1d366c92c1..c46bb6dab6a1 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -46,6 +46,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -71,6 +72,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -92,6 +94,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -113,6 +116,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -134,6 +138,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -155,6 +160,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <100>; @@ -177,6 +183,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1894>; dynamic-power-coefficient = <703>; @@ -198,6 +205,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo560"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1894>; dynamic-power-coefficient = <703>; @@ -2002,6 +2010,7 @@ cpufreq_hw: cpufreq@18323000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; }; From patchwork Wed Feb 15 06:55:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57398 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp40350wrn; Tue, 14 Feb 2023 22:57:33 -0800 (PST) X-Google-Smtp-Source: AK7set8HZ4YsuzWri2CpemTW/CEROn9A7yvI814mGcmSy6b1tjT6TVYAzWUXWF0CVHjdVyi/Au+Q X-Received: by 2002:a17:906:4d49:b0:88f:87f0:c919 with SMTP id b9-20020a1709064d4900b0088f87f0c919mr1373055ejv.64.1676444252843; Tue, 14 Feb 2023 22:57:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444252; cv=none; d=google.com; s=arc-20160816; b=qnGESXW947SSSxZnMPzuixBRMJ3TL6f7QI4k2v2cKT0OMeVzev7Uxi14IsQGJPYoik vZ8OZs+lz0+S8D2jQNTFz+AyKSpV8sHeKjDKSdN/Q16ot+zcAO1nq72gTeJX54oUgbKW A97u78Y/rZ0P9GqlIy+r0yieK2Wsyn1V9GGbF16J4c5KxW7VroAaF2JmlHBBLQaX+YxJ SoDbNKobP/Lh/JIp9otcHt7ZUNCztd4MSiyp1ggIG/khHkjxii/uaPHO/o1SYU0WvIC4 SEzFhGtIgvfU1wpvnIFVBRaC656luZkoMGsjQxxbGwFNoh0Nhw+FLPMq6kf7iR6VrtJ3 4EWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1fQsTTXBNiNhOtrjU3bWR9pOnFEJRPHEV6xz3+pJ+84=; b=te2SFNBXpl8ElA60uFDuRXYCK6aEXOxCXm6i1YxyQmAnUho662XZYGCEuSN4UoIp8t AwXLkpqrpJg8jlzB5W/09sZMjKXDcpFEzDkpmqCOWdZ3aHMmBhFsnxzSiJpZz5Vi//xx 6LnUL1JcQPAZu2U/DJDLYnfFtGR4toHBZAFXBq4+sNWMpJJJ8cXaEb+3OJ1Vbp/Qe7Km rPVTuwndGNV5xvxndC3aCH73aBqZrnV6L4a9/7+O99QBEAd5uy9ZqxlXHM3ap+r4I1fY ByQpRufy0hkEpG9hUcyX6TIPr1nmmvHG8/IC7602pWyJ8QE6SlJW+McB1rKAhLYph6s0 vx3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TuwDaaE7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 9910006c32aa..21b4f668889d 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -68,6 +68,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_0>; power-domains = <&CPU_PD0>; @@ -91,6 +92,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_100>; power-domains = <&CPU_PD1>; @@ -110,6 +112,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_200>; power-domains = <&CPU_PD2>; @@ -129,6 +132,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x300>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_300>; power-domains = <&CPU_PD3>; @@ -148,6 +152,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_400>; power-domains = <&CPU_PD4>; @@ -167,6 +172,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_500>; power-domains = <&CPU_PD5>; @@ -186,6 +192,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_600>; power-domains = <&CPU_PD6>; @@ -205,6 +212,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo"; reg = <0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; next-level-cache = <&L2_700>; power-domains = <&CPU_PD7>; @@ -3341,6 +3349,7 @@ cpufreq_hw: cpufreq@17d91000 { ; interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; pmu@24091000 { From patchwork Wed Feb 15 06:55:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57397 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp40344wrn; Tue, 14 Feb 2023 22:57:30 -0800 (PST) X-Google-Smtp-Source: AK7set+wXA0887tlxlRvUGQwfBJ7lMhnPXxRoGOsocgBG1H1iEH+4lPutsV2N8sbdodXUsjq0lOu X-Received: by 2002:a17:906:ad98:b0:8b1:3002:bd6d with SMTP id la24-20020a170906ad9800b008b13002bd6dmr996468ejb.31.1676444250378; Tue, 14 Feb 2023 22:57:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444250; cv=none; d=google.com; s=arc-20160816; b=hKyAqJ2pjgXMExYyWOYhhRj8P95sPhOMdXyTfs4uf2RjrkDBh4U3lh3Kz7CWaFLNWf BbJJwbgJMWyCzRkTDFTqJ48Dqu6Og+TV3Vk4P6TsFFK1BjIEAabXiH8ULBU3DvqKNA1w R9piCZVpnwHdHIXS7Ki9JlGu/Xuu4nYMzUVEkGpLGgfIwJ5mNVpMO+K81vNTsoi1qKDU oQwkU+VBn7SVrewLoHJ8sxu/7IsgDtyReahonSqOSfqjFnI7YYz6yjxYSukB4DWsmJNV PfImwJuVmN0ddgfHKYi25Ov+0WOSFNY2tTyqAKFCmTyhuYCdqg/Zmj/ddX9+K9Fi+dz5 mV7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iLerwrwmNfdynSXWopegSimuZHzpOIcHKtk78GRdX8o=; b=nY7ATy9lt5jNbuYzUdp+sYZd/W+3nx/glX/5yZbhK9lFUhKPQTXKQmMOJi4I0TjeCg iAz1KpitGASIAm9yTYYRmcbiOQAnrcpyR3nY0KRntqCM1IXoKaO7KYWBKqrlPpFk1kjK JIR8RxOwuPnF7dmIP65EjS5alO/ltW0WHPMn84x8PzzuP/smDy85f8/nthgMkhli19fw WmPli4epBs7yfgWn3yZdni0hzmbwYzI+K1eVvZ4/3Kj4lLAEEcvFGKsWnhvmXFpkihq+ IYaAcB0HX2GUh6ShBS4VNbjT2DGR+3XVJ61/yctnROYjghUzNGhB4867cjNGxGfHnKGJ MVYw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UWT7PSGN; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 2f0e460acccd..44c8851178eb 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -97,6 +97,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -127,6 +128,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -151,6 +153,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -175,6 +178,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <448>; dynamic-power-coefficient = <205>; @@ -199,6 +203,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <379>; @@ -223,6 +228,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <379>; @@ -248,6 +254,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <379>; @@ -272,6 +279,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <444>; @@ -5481,6 +5489,7 @@ cpufreq_hw: cpufreq@18591000 { ; interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; }; From patchwork Wed Feb 15 06:55:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57399 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp40390wrn; Tue, 14 Feb 2023 22:57:40 -0800 (PST) X-Google-Smtp-Source: AK7set+TYZ42Xp0auZjpOHOMwhrUAikGNmABFI2ScgK/jZN5PW5mSUF/XlIJMXa5F8oj9B4UUM5U X-Received: by 2002:a17:906:b84b:b0:7c9:6e0e:1427 with SMTP id ga11-20020a170906b84b00b007c96e0e1427mr1352949ejb.6.1676444260428; Tue, 14 Feb 2023 22:57:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444260; cv=none; d=google.com; s=arc-20160816; b=0l5emc4NufIq1ofypeo+y56kH+0wXxaZCFe/iYPKBLhanY/W+f8aIUtLShgAlfFBrW e8ILxt8ew0zFImSfqLdWQschNjCb355zb41xyIdw/UpEy7+8qPnW+sk/UJO71jdaRbvB YIeli8TtQ10VmuqQQPGEoeziwgJFn7wlSy5f0wNsKInhCDbPnHzivqDyRCLXamSe+0rY tqOz6KtHTh3RCdIgn5KwtyzzXiScDqziD7B1E6j6aQ6u6VYBjXKE45iblJiwf3s2JFps 6k34XsEWLFaLYf+orRC1RPjeeFk3C0YOXjAT4vWIiy3PPk0iOI6uRm8kCYVf9MTK4JCo WNLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LHVr08cnTjJMehZboB/JWbeUqVs1oVn1lVODeozYst8=; b=RMLtP16TIlNHdCnc16q8/GrNCBPmSdQY6/SvcV9C7wecn/DRGBTmHDl0W6ruczhrXF SLGg38GlcUPRpmHI4+P3MHuev7c4MZUAvVwY/pVg/OGux+Fxk19qjHJgfnRxqBZzghgT KNbC3VpGvqUUbw/RSIx1S9btgJfOK+c6gM2NjWQ6TMZWtOBCtw5JfA1shVLyHoYWRsgb VCFiWIrlusFC83z3N7V20EdsuTOKyc7ZDzKOD0CGKCOvDFfql+ZBRd29Yp5z3HEmTfTi nLBhwwCPMd0Q5der9OglDyMNWlLTGiPsoa+GXWR2C7DisZh2e7Bz0azvuKIbrKKJ5FhY cJqQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pMM8GzBV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index f234159d2060..98a859ad5229 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -27,6 +27,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD0>; power-domain-names = "psci"; @@ -45,6 +46,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD1>; power-domain-names = "psci"; @@ -60,6 +62,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD2>; power-domain-names = "psci"; @@ -75,6 +78,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; power-domains = <&CPU_PD3>; power-domain-names = "psci"; @@ -1312,6 +1316,7 @@ cpufreq_hw: cpufreq@17d90000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; gem_noc: interconnect@19100000 { From patchwork Wed Feb 15 06:55:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57400 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp40612wrn; Tue, 14 Feb 2023 22:58:28 -0800 (PST) X-Google-Smtp-Source: AK7set/3qViCyH65AMb5tctuCLE/oaPX2kYSZNuAykGtGY1JVJHZR0vhfq7S4aBed90pTljKB39u X-Received: by 2002:a17:907:216a:b0:87b:d409:f087 with SMTP id rl10-20020a170907216a00b0087bd409f087mr1175528ejb.21.1676444307914; Tue, 14 Feb 2023 22:58:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444307; cv=none; d=google.com; s=arc-20160816; b=hvuIf50TYvcXjK3puFdb7ak7qf7yv2QWSAcyIZ/cF3sx1HThtPgnwBkl+5fjwiN7oe 99nY5aM4p6ExGmdtFytMwZGn5bRlDqTnvlgFOAil9QJTrzmQMZ6RBOncdFCkGfcjTJiy lrIL5seYudoUHNtjducam/De+AQ3Ry3FfLdt0B5xsVIKK2gomQAjF5khMJno4xmtYfEP h8R6NmdBjDIdtcZCTJ9FQ1Lzres4qRNRA+mpkkdO7Kng8q+S8ikh4v1wwVVCzufLHg6j mc7BzBGSVbs209l6kRqAlJFBDv4U9MEI2aiV/IgPzgj6bYjx3O2Gj/3oth+e9I5ORVfu esNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jtvgID8mNLGj3X1P+nHdIDZyTZvvt/sYgRm2r4KBSpE=; b=wgcfSqaS9agwepgX9xQLUo1EjtdZMxYLEYtCch6jrFzIjFdHLo0YGHy+/mE525GIu9 Yu0hrsU194CzDYnOLRUyKJjgLl7u8YlmBqstapcyisWBTx1+L9zkz7kuCdn8ORVVxLB7 kMbfQSdvOmE3ZGu6PMBQseb5WoU3xvKcaYVD/9HYb9bLzhdNU8J3zQzKiBb9tGSGOY3x Zxmmq8pEjdr853ktZo4sDW4qJfyH8tGVl0J4YgTr7bvB30NN1oIN0TkpBJsq3vxhp9Xq awjhET+P122rhlSQLY0Hpy1yPpSYrUfhxuD7/z6FOFvc6+GzZZAinRNzbEf7xuzJLPm8 b+Gw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=m2N9MO43; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index ebfa21e9ed8a..53f0076f20f6 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -76,6 +76,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -103,6 +104,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -126,6 +128,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -149,6 +152,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -172,6 +176,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -195,6 +200,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1 @@ -218,6 +224,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -241,6 +248,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1 @@ -3578,6 +3586,7 @@ cpufreq_hw: cpufreq@18323000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; wifi: wifi@18800000 { From patchwork Wed Feb 15 06:55:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57401 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp40663wrn; Tue, 14 Feb 2023 22:58:41 -0800 (PST) X-Google-Smtp-Source: AK7set/gy7mtYy8wNDwtshb8Dzqq2ncwnSI+MCwXP/u3/hyzv5VZrzgdD9eWA/bIrYvoI6xDsNa1 X-Received: by 2002:a17:907:1182:b0:8b1:26fe:d92 with SMTP id uz2-20020a170907118200b008b126fe0d92mr2055433ejb.38.1676444321742; Tue, 14 Feb 2023 22:58:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444321; cv=none; d=google.com; s=arc-20160816; b=b1cXqgTH7/IevPohSD8MVgaM4GVKTrV9bD4aKD2RDRH6MoBR+7fEMJRAJSC8Lxi7O8 7pLc8UK5xJTEF/RH8rtLskULnShzhcIvZ2/nkRRggDn84j8Sf9LTLJ1PJ6pMmPqDS3X+ 5F80EgWCqKIlQw3GGKdZV6wN1lut6B3EgejgYUCywSuzGzqTjiWU9SL4ffTuZqRv7lY0 ULCxdJdBCZpmk2A+hpFwpwfltLV6EcOGMhFuBPf4iApxQDO93JLq7gNTsqYvofnG8Jc/ 351Bul4EKCLTTEEXXSmwYYC/As4qumKvT+AgyOersXHju5jhzsQJvSz9sMGsG3rBqhta vlPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6hWzwrq3hV8TOIaiR9k+5O0t1qbVTCRxBbpH8HHjlnE=; b=oGiQijPUBuxT4spxkzugVibnLvmZTG+iD8kwqTCiiPNqfMs7n+oK7JgDj7QFdOgRTc RHRFEvheO6e8P/ttVyZZCXmF3UWkoh9qJPehjIJ2CO95+p/2stkuJQ4vk9NQmQSO8/ug hf2rZrKAs/7X6yCNImgDFUYbWG5e6ogZBExjUhmXfbbxBdg3EILSA/Rz6FYIqy6NNlG/ YvuZpjHLUYRPvv18Icg9/penm7+0etR1VSpddWcbk+M0p97OStUsn+OIGG9SIgwQ91pg u1IM9GXLV2KtT08ZMwi6r+Lpki13invpiYoAuJIz1NBrzxvgmBpBRyrSPM+ZsVxg/rJo Ntow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W73Vup5l; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index fd20096cfc6e..693d023d2629 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -48,6 +48,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -74,6 +75,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -97,6 +99,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -119,6 +122,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; @@ -141,6 +145,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; @@ -163,6 +168,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; @@ -185,6 +191,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; @@ -207,6 +214,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo485"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <421>; @@ -4273,6 +4281,7 @@ cpufreq_hw: cpufreq@18323000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; lmh_cluster1: lmh@18350800 { From patchwork Wed Feb 15 06:55:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 57402 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp40901wrn; Tue, 14 Feb 2023 22:59:37 -0800 (PST) X-Google-Smtp-Source: AK7set8D/nrZSvJ14+0mlgAZAyulza5g+HMz86rTCz8BrTJ89SuYhgZ5yEOhXpWEhccjLl86gM5+ X-Received: by 2002:a17:906:474c:b0:889:7781:f62e with SMTP id j12-20020a170906474c00b008897781f62emr1150029ejs.22.1676444377053; Tue, 14 Feb 2023 22:59:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676444377; cv=none; d=google.com; s=arc-20160816; b=zKJScJmdym0xt/rFaNNhCoKexobwLPcE4gXZZ7mRfLv2NGdxxG51QV7yz//y81TyOQ TjdH4X9+NX5L0iAeVIvWrbTqYOB4ivw1iS5drX4V49wDj5zOjW/JckfjeC4j3vGQHCea gHX7+3YB6Zc5UmV5i5LE7Oh0iP++khyCMuU18+Bm6SX3FAwqX0X4G7FBm8XLafMu4WB5 ht6avltyV5DgiT2Os2gE9ArEUDBtUFys/gWckZB4LMbWSmXtimWXLGtxllE2xBG06CSN 1zqCua6p7nHXRqZ4sBYwhTvCGdorSf7tzvo++P6n3u5IfiaPxZdO4uBoLOVloP3R7j72 QqLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=MSprQRzUAPAcRKdXmOH1+IXrj92bjRdjsdi9aS/W/NY=; b=pnJpoXBpRszD6AtClbGJzA9SpdZFuXZ+RXdnwj9YYuDmr4lJJ1zSC8BImONq0Fzw4/ sABGKzBrrPgPNAms9U0b4qFEqM42f+E3lrwzns9sHLUdt3KKZdl9U8Iqh+fn3XIBXzLq FIpYkPZ+jyvJuh/lwjZY6yalB1S2os4xxOUZgUvxkfaD8esoXbatptX2y9zJcd1cDMBq NtckwcWVGtyx30qHkpo2vql+rISMH4iBWJj9DnSIS3FjlNNGQXHb4fEWuvOtR4pWzbA8 Ye72PraGi4y2Vq9gXypJWQmuoA9FMKqWZc1aMrtDCaUMSfxVJYZC/VgpIkg/5kZWENyh 38Xw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=f4YNHiUr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. 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But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 0a422637b61f..1b423c42ec0d 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -48,6 +48,7 @@ CPU0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x0>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_0>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -69,6 +70,7 @@ CPU1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x100>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_100>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -86,6 +88,7 @@ CPU2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x200>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_200>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -103,6 +106,7 @@ CPU3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x300>; + clocks = <&cpufreq_hw 0>; enable-method = "psci"; next-level-cache = <&L2_300>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -120,6 +124,7 @@ CPU4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x400>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_400>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -137,6 +142,7 @@ CPU5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x500>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_500>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -155,6 +161,7 @@ CPU6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x600>; + clocks = <&cpufreq_hw 1>; enable-method = "psci"; next-level-cache = <&L2_600>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -172,6 +179,7 @@ CPU7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo685"; reg = <0x0 0x700>; + clocks = <&cpufreq_hw 2>; enable-method = "psci"; next-level-cache = <&L2_700>; qcom,freq-domain = <&cpufreq_hw 2>; @@ -2283,6 +2291,7 @@ cpufreq_hw: cpufreq@18591000 { clock-names = "xo", "alternate"; #freq-domain-cells = <1>; + #clock-cells = <1>; }; ufs_mem_hc: ufshc@1d84000 {