From patchwork Sun Feb 12 15:41:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55918 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948365wrn; Sun, 12 Feb 2023 07:41:59 -0800 (PST) X-Google-Smtp-Source: AK7set8rkRfr7NjE4eqCAzoqCX6xy665k1A4RqfKtfgaIhjg/1bYOB/ZaUdSJXQBoPnjuboBGN0o X-Received: by 2002:aa7:9e51:0:b0:5a8:ae6a:cee1 with SMTP id z17-20020aa79e51000000b005a8ae6acee1mr1346582pfq.29.1676216519063; Sun, 12 Feb 2023 07:41:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216519; cv=none; d=google.com; s=arc-20160816; b=S5/KwJnhS5G40ZdG8RznbzVk30KL0EJbaQANXCkd01lJP2qOkGMRu3PUDCWkcM0ovn t7GRHkCapcYXUNx7wgk/LG0TY1/ao80EiMechNcqcZ34VyMhBbkiLBzOar9JPEPux66o WADzq9cykcLdywJlYjHpTC4OUkrEczJiN6jg+rILgfV7ZFWkJSNdQ03wfndbLhHARqX9 /bPSjnx4zaDlb2CKxBlLGSCNK70YaH/5TL60jKz2sYyHa49DtI3If156wxIsRrgu0LQj 7m/xyE+L0ZmKIsrqZ+YiUwSls98T6JQXWbeV29OBKoVJPGKLK07bVyGF0auEE0V7vcqL 7Vdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=hMedQ9pyrOVVaEB8iZenJWif5Z10fyN28MDz9eD+DfQ=; b=WmXOYYIsCBppRJpZgJc2X/JAwS9bu8UIut95CqnM7nphwhL/h6+Ukzr+CoxQuhs2Xp rsdaDX7qKirbDXDAGF2Rm6Q8O9X97ki7EP5CIDES8qc8zW3iEIn0jfA4FQ69nn8Y7n8c kVp/JWGpusDmPuJFQOivSRJ89yHGAcRfC1mV9gqZGsuhCjnZeWBZOuUzN4exr7F1DksM X1b+J964U5TqWkOS5mYnodRIzb9djvAC33kMtQ90JxZZcIr5HumHGhlDBJVQPdRF2sKe eAofDd5aKAQOO4vHv0T6+wuRDQgpt7kfNg7Hozcv8SQjjvcrEA1nOIOC6e1Umh1mM17f RO9w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z5-20020a623305000000b0058d8e5bbbc2si9186315pfz.146.2023.02.12.07.41.46; Sun, 12 Feb 2023 07:41:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229678AbjBLPlc (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229457AbjBLPla (ORCPT ); Sun, 12 Feb 2023 10:41:30 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA0F3CA3D; Sun, 12 Feb 2023 07:41:29 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 4A2A226F776; Sun, 12 Feb 2023 16:41:28 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/17] dt-bindings: power: apple,pmgr-pwrstate: Add t8112 compatible Date: Sun, 12 Feb 2023 16:41:11 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-1-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1525; i=j@jannau.net; h=from:subject:message-id; bh=n7yL/QDtU43Wl5Tm9zGg0PPtP+ZxPi+QYS5i4Gj7DUs=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7MdDAw2Lq9K5U0NvRC9siGdxzLiyf7OifrDVyfdSi nn/N6d2lLIwiHEwyIopsiRpv+xgWF2jGFP7IAxmDisTyBAGLk4BmMhjPkaGJTqrmTa6KV+8fDGN rX/V8za51TxuE6udk9fNt++K5lHkBaqoqTicLh+aHN15YIJ/fr/PTse6K1cfCZ6sDJG8O3fjE1Y A X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640412676336890?= X-GMAIL-MSGID: =?utf-8?q?1757640412676336890?= From: Hector Martin Add the apple,t8112-pmgr-pwrstate compatible for the Apple M2 SoC. This goes after t8103. The sort order logic here is having SoC numeric code families in release order, and SoCs within each family in release order: - t8xxx (Apple HxxP/G series, "phone"/"tablet" chips) - t8103 (Apple H13G/M1) - t8112 (Apple H14G/M2) - t6xxx (Apple HxxJ series, "desktop" chips) - t6000 (Apple H13J(S)/M1 Pro) - t6001 (Apple H13J(C)/M1 Max) - t6002 (Apple H13J(D)/M1 Ultra) Note that t600[0-2] share the t6000 compatible where the hardware is 100% compatible, which is usually the case in this highly related set of SoCs. Signed-off-by: Hector Martin Reviewed-by: Janne Grunau --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml index 94d369eb85de..59a6af735a21 100644 --- a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml @@ -32,6 +32,7 @@ properties: items: - enum: - apple,t8103-pmgr-pwrstate + - apple,t8112-pmgr-pwrstate - apple,t6000-pmgr-pwrstate - const: apple,pmgr-pwrstate From patchwork Sun Feb 12 15:41:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55920 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948420wrn; Sun, 12 Feb 2023 07:42:08 -0800 (PST) X-Google-Smtp-Source: AK7set/AEASax8uMHfElnbtN50RnrLR0Vbq6DDdhz7bzXt17aJ9aTzsW71xwIXw8WTB22h6+hXA2 X-Received: by 2002:a05:6a21:3295:b0:be:ecc4:55f with SMTP id yt21-20020a056a21329500b000beecc4055fmr29379646pzb.50.1676216528688; Sun, 12 Feb 2023 07:42:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216528; cv=none; d=google.com; s=arc-20160816; b=kOP/MgSOpyzyXZcICOxLc4ALMaIcNvnLVm63Wwuwu6oFeiZ/15/T/Vt+p0pYCClqRI Evw1PIBJvhE2NYQ2VnuUDK9EpoUcMbf2HlCUmxs0YGEWD2HyH2M5xR63vkwCYCIzRkil 8iblC7ZLLtBoBON55aTwhWXQvar+GISzBnlGm/PKJR2Bu42rXzJsuZCtTZs/4Fz6NxD3 jLccDiV6a2ipbnrwUvl5PUh0NjQMTav36vlwItAVk1JKVHagqfagcDpXnjvNDBfqpM6R SouQl4Uy4D3OBMbRkTCYwVTbrdKy/dHRLTTD6X0jZJ/pXJAqj6XFz3C4YnAXm49Ffd72 M/4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=EoR5DSlDXVdD50JJhGNlgVU0AoBiiBUKfOlhDOQLFwQ=; b=rgxsPAbnD/R1jPNWpaIVKmVFXoWqU7Mbqe0Yw0j0r5FU4Gn5CH1R3QSxUIc0qcRM/6 vdlIi2vI/T9duSdn3QCPVt/DInjEd6/KxrzUP/N3RRM9IlBpvRx/n0WJ4TD075Q8Mw6i mzyRy75qpiP9PV1aLVXisUFgXEZhq7f34yiO0hIq675KUdr+HCYWxORglJoeegcGmABk vFANFd8KbcVvlVGYVfACNN/p4hFrXWitYTFzRTgJ/zgIuURabo2nXzQq1EuBgNyhOz4P Ap1kuHgsSpvlUfd4s/qxHtzdPpCLPG03jBKOZoV3lQCnSKHWWesCz29Z7NVxZ+qCDCvi fyWg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h6-20020a63b006000000b004e850715f99si8788996pgf.259.2023.02.12.07.41.53; Sun, 12 Feb 2023 07:42:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229750AbjBLPlh (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39038 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229604AbjBLPlb (ORCPT ); Sun, 12 Feb 2023 10:41:31 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D7B6CC11; Sun, 12 Feb 2023 07:41:30 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id D840226F777; Sun, 12 Feb 2023 16:41:28 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/17] dt-bindings: arm: apple: apple,pmgr: Add t8112-pmgr compatible Date: Sun, 12 Feb 2023 16:41:12 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-2-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=948; i=j@jannau.net; h=from:subject:message-id; bh=jYsdnfO8rQR9P/6ssMV7SEuJ1YuSh9hjxO/Vv6MxYns=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7Mc5uEtjN808e3DJg72XzfpsPzo5Zi2KPvvb52ZXN DdLK/vhjlIWBjEOBlkxRZYk7ZcdDKtrFGNqH4TBzGFlAhnCwMUpABNpWMzwP0+S8bnpg/P2M+4t 4X0a97ohubv6TPTfDUWL+TmZlQJNfRn+qeV4npuTXGd/rkRRd2qsWEqBvEpME6f5ydkB9VNXVYd zAwA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640422885403958?= X-GMAIL-MSGID: =?utf-8?q?1757640422885403958?= The block on Apple M2 SoCs is compatible with the existing driver so just add its per-SoC compatible. Signed-off-by: Janne Grunau Acked-by: Krzysztof Kozlowski --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml index 0dc957a56d35..673277a7a224 100644 --- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml +++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml @@ -23,6 +23,7 @@ properties: items: - enum: - apple,t8103-pmgr + - apple,t8112-pmgr - apple,t6000-pmgr - const: apple,pmgr - const: syscon From patchwork Sun Feb 12 15:41:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55922 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948454wrn; Sun, 12 Feb 2023 07:42:13 -0800 (PST) X-Google-Smtp-Source: AK7set+vcY2k5viaI1XTDsyuyuVkGrmfhHyNDfit0Hzj4AxjrF5g8JzDcRltOkin8njkxWcH10RT X-Received: by 2002:a17:90b:3147:b0:230:d55d:9be3 with SMTP id ip7-20020a17090b314700b00230d55d9be3mr23726893pjb.6.1676216533278; Sun, 12 Feb 2023 07:42:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216533; cv=none; d=google.com; s=arc-20160816; b=j627+bY6vWHSmpOhu5kWARqYwo35Zg7totrdTw76XPSWe2MOGVQO1u8izjTbqq40cr WLXCQY3X+YMzENkFOOYv6f8bisBhBUNq0md2dAk9zy1iJRcfA6L0Dpem881dP2zU+01I jndPwLrAEZ/MTtkSFfgn0z8JPaqK8RzogxJwxzcdHpIbtH2t3+SoaYNSk34hDEV+2t4V 7GvH32q85LNbILRj2p4hnyPECjHmfxV1PMofVXpnEAv5fSwwANMQC5DDeN9bebSV123G LHlmUakcFL57bG3t7Qav+1GKsekNxje13P4UnN+WXuytaddoX0KCZbmjOqTylHuzcGUs f1YA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Nq9gYsYCCnrLkklQ9LEwsVP8ng4AZrsU84qz4dQTA6M=; b=iGxkxXyVHRt8WtyV3PjV8pf6yNmJcbXvk2A0dauwdJDkK9RRzOCQcIAQ7MrjKt4IF+ CL/a7y304VvL/tatMMKrSjCRCut3vIwzVaW3deYNYlt/fE9uSXcCZFapl0k93H1i/qak PJdyGJgKgdY3edAjAOws8hrRjrIqGnNPi2BnMCRReNfzNRg93LEOkn2LHP8Y/VKaLr3w w597tWmlVuRfm29JcwTxMCeK9nObRYKsFbycIAJXljELcPvUrQC05cjKUBxLK6AAKyiB 6ScuBwscoz2gnvIidSGE2uCGrdNz9WotR4vNPLVoDIa5C5Kglq3Cr2vnCHOJTS+rDKvw gAfg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l190-20020a6391c7000000b004fb99dd149fsi1358920pge.239.2023.02.12.07.41.58; Sun, 12 Feb 2023 07:42:13 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229735AbjBLPlj (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229656AbjBLPlb (ORCPT ); Sun, 12 Feb 2023 10:41:31 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E3C5CC3E; Sun, 12 Feb 2023 07:41:31 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 7274F26F778; Sun, 12 Feb 2023 16:41:29 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis , Wim Van Sebroeck , Guenter Roeck Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org Subject: [PATCH 03/17] dt-bindings: watchdog: apple,wdt: Add t8112-wdt compatible Date: Sun, 12 Feb 2023 16:41:13 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-3-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=911; i=j@jannau.net; h=from:subject:message-id; bh=+69NoRn07oX1kEzEXqbbrxc9N6YJ6elGhnhIqdxBYk0=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7MePzdh94bPHm7R2pcD9Pmm5Zk5ub1oKQ3duzCv+2 lRuZbGmo5SFQYyDQVZMkSVJ+2UHw+oaxZjaB2Ewc1iZQIYwcHEKwES0rzEyrLGrYeLp07l58s4S 6RW3Sws9ys7WCEb+zVT/PUtcXMc+hZGhseDjequGOTyni0weedad6X2/vPv0VrkTepNvvD209uc jfgA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640427306413266?= X-GMAIL-MSGID: =?utf-8?q?1757640427306413266?= The block on the Apple M2 SoC is compatible with the existing driver so add its per-SoC compatible. Signed-off-by: Janne Grunau --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/watchdog/apple,wdt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml index e58c56a6fdf6..3d7e2a2bf1f1 100644 --- a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml @@ -17,6 +17,7 @@ properties: items: - enum: - apple,t8103-wdt + - apple,t8112-wdt - apple,t6000-wdt - const: apple,wdt From patchwork Sun Feb 12 15:41:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55925 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948512wrn; Sun, 12 Feb 2023 07:42:26 -0800 (PST) X-Google-Smtp-Source: AK7set8X6ltsITP2hkB7dYJdm13ASD6mcGc543GIXOT5g3+2Pef80U7M3KFR/F1vuYtlcDiVpkf8 X-Received: by 2002:a17:902:e014:b0:19a:990c:9b2 with SMTP id o20-20020a170902e01400b0019a990c09b2mr1465183plo.33.1676216546544; Sun, 12 Feb 2023 07:42:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216546; cv=none; d=google.com; s=arc-20160816; b=zu+VB+G/iVY/YRrOIhz716VfxYSczVPaFg4DHAxOWq30yuOXpSazIE9SS+5XOA2rhr ZD8jA4SGqBw+zgDx/SC/6grePvsDcibKUGkXWTbVgQnvumB2Z/4rD+1dT0s4/kfJA1mh a1VT6c0TIRlPMlvj1MV/4R1W9uBpIffJOUeZv7RPzmquHXzNhSwIOipDulY01HIK7v6y wvkgPj93uBaetqgWykfo0uMw4GZESJxXqGAwwE7+geWkY96HUhfO+KN0vYGzvVvscH+1 V3zAG287Hkv4SbvLV1VczU6UVOaTjGdiUS0P8VQ9oONYFy7IvuUwcLLjXXEasV+8Q0pC arZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=MmQnBd276HlPbGGG9c64FS2SaeiJYGJYivFSRKOAPuc=; b=URc5L1c/K4CWAx8P95PXBsSxj/55wyzL3kuOuFJYAFnYVFEv3sf1IZx1Of0Uj98rKQ xGHLxZr2w8/RH6NB3pAnabghU7+254u3ZrIKUScHu462Q2c+5WAMvvCCyC9LrrWAaUdm 4x+vEDFPcIaEjFhrWcPxFXsZZmlfT+W9+Z0RLnHljpGrz878330LI0KKbNzNSckMOJQQ TSFMU1J00BJiHkAlGCwDDHUPE9LUIh76ET2i4rt1uQyIcqQkP1QMC6oEI9ahE72d8Kbt iIyL7LwSGez42sj3bNEEWejak0fzxUD5DW0TLtUZb+cFKoMpYBi0yl8Qhi+DDpNL3m0K 1wqw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b5-20020a170902e94500b001990992d68fsi8995533pll.518.2023.02.12.07.42.14; Sun, 12 Feb 2023 07:42:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229775AbjBLPll (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229671AbjBLPlc (ORCPT ); Sun, 12 Feb 2023 10:41:32 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 706ABCA3D; Sun, 12 Feb 2023 07:41:31 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 185F226F779; Sun, 12 Feb 2023 16:41:30 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis , Lorenzo Pieralisi Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/17] dt-bindings: arm: cpus: Add apple,avalanche & blizzard compatibles Date: Sun, 12 Feb 2023 16:41:14 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-4-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=821; i=j@jannau.net; h=from:subject:message-id; bh=JDVXxH2rWzmb7GnkAaYgeojsclpJe8BD3FpRIBowJhA=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7Ce6Dh9jXnrYNNf70Ra/ncW+HKai0lnLPdZpb5sul Kz3TuhjRykLgxgHg6yYIkuS9ssOhtU1ijG1D8Jg5rAygQxh4OIUgIn0ODAyHK5uMD+/RtRb4Nvt mIUSKyp8WN7XP/pqZjWX/X0MJ79UICPDpqR/5wWWME0qTbx9WTKvtrDG+PkWvqpdezl5pNvNb5Z wAgA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640441403873408?= X-GMAIL-MSGID: =?utf-8?q?1757640441403873408?= These are the CPU cores in the Apple silicon M2 SoC. Signed-off-by: Janne Grunau Acked-by: Krzysztof Kozlowski --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 01b5a9c689a2..ac79fbb1479d 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -85,6 +85,8 @@ properties: compatible: enum: + - apple,avalanche + - apple,blizzard - apple,icestorm - apple,firestorm - arm,arm710t From patchwork Sun Feb 12 15:41:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55923 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948486wrn; Sun, 12 Feb 2023 07:42:22 -0800 (PST) X-Google-Smtp-Source: AK7set/1Avp/nYwZUf4tuUzOYelx3NGKpbF4jxF4dgfAs3oy7xoSGHx2yA4YM8vuTSokuawwLdCc X-Received: by 2002:a05:6a20:3d01:b0:bc:d601:ebfc with SMTP id y1-20020a056a203d0100b000bcd601ebfcmr27648759pzi.54.1676216542190; Sun, 12 Feb 2023 07:42:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216542; cv=none; d=google.com; s=arc-20160816; b=PELvx3w5Guygv/k/Pubv9pXEa+pddRbeiXNgi8RzKgU6EOXa7Wr3ZZtW3KIwwV3Y94 BRMmBNKbWkNtyP1tTKonEwjTT9+tjpHr02ZVNKEFcA1WtsIlXoayHI4CRjQ5SWbSF+06 WF9fCRHrSb3VhpCcvm4M7P1Wo+CVQaY+6LKnzXpHQBWfre5yLHV+GSRSPcrbu2x/ZOjH BbdVsA505Gaatkx7+bgZaM/qM1vpcoBcnDeqAHxuNaXR7AV+jPO9lMpMpNPKH+k88bT3 kN7VNxmBXYtpXiqCFxXgrHLWetPHX2ogAXqqY4oB8Hsp9WZ5/8FGoK38JQUjOZl2d4r3 rDHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=wij0W0VgfzpFqoLEAGGyfvVIew3J/mfeyHIeoIkBTOQ=; b=pOD2wNq16jydxHpGR/sQk5t1NzV2fXzmlS9hb8IE/9ib6bkJPLE56t5LPE74e88Hwf pcgIYqD8O5nJxwwcIaB7EqecQ1h6rDamUkgZgR59uh3IX9CEXkSo52vUYLtNrNsyYOmB miXnoRkc5rMYU7sl3msy6z11T3IYpKh6zrZ6NeMEPhHc4abPzgP9hKsaVKp6r48wcN70 9/7vAjZ3YTlAIzQ3mhxbPNF89rMDlbJ/kHMy3AzGiLQSJj+EMDjDTmhpZue5+yOzKi6z p0zs3tYZ0ilxEmG906XfgpJf11kQLz5O4M5iPuDLOVL51HYIMrTzuQcnCSo5dMjdPSCB LmZA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i8-20020a63bf48000000b004fb17c09857si8966823pgo.157.2023.02.12.07.42.09; Sun, 12 Feb 2023 07:42:22 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229801AbjBLPlo (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229703AbjBLPlc (ORCPT ); Sun, 12 Feb 2023 10:41:32 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07BAACC09; Sun, 12 Feb 2023 07:41:32 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id A76EC26F77A; Sun, 12 Feb 2023 16:41:30 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis , Thomas Gleixner , Marc Zyngier Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/17] dt-bindings: interrupt-controller: apple,aic2: Add apple,t8112-aic compatible Date: Sun, 12 Feb 2023 16:41:15 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-5-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1978; i=j@jannau.net; h=from:subject:message-id; bh=9s42KFAgCWAeCi1wiBerzppTPEA8YEq8gDQ5kBlwTI8=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7CdMPyV9KFeed+Hg6fDPDiqSuwRqN4rc+KCavJJ91 VPvJaGRHaUsDGIcDLJiiixJ2i87GFbXKMbUPgiDmcPKBDKEgYtTAC7SzfCH8xyfz82S6xMsvs48 HCa16xKbzrGWNGaTT/4LV3Er+d41Z2S4uWfqmk0x53O1eGPXblPU+qKVIpTwetn/BE0x2zuKGyO 5AA== X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640436625977091?= X-GMAIL-MSGID: =?utf-8?q?1757640436625977091?= The Apple M2 SoC uses AICv2 and is compatible with the existing driver. Add its per-SoC compatible. Since multi-die versions of the M2 are not expected decrease '#interrupt-cells' to 3 for apple,t8112-aic. This is seamlessly handled inside the driver. Signed-off-by: Janne Grunau Acked-by: Marc Zyngier --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- .../bindings/interrupt-controller/apple,aic2.yaml | 23 +++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml index 06948c0e36a5..120e23ff668c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -31,19 +31,22 @@ description: | properties: compatible: items: - - const: apple,t6000-aic + - enum: + - apple,t8112-aic + - apple,t6000-aic - const: apple,aic2 interrupt-controller: true '#interrupt-cells': - const: 4 + minimum: 3 + maximum: 4 description: | The 1st cell contains the interrupt type: - 0: Hardware IRQ - 1: FIQ - The 2nd cell contains the die ID. + The 2nd cell contains the die ID (optional). The next cell contains the interrupt number. - HW IRQs: interrupt number @@ -98,6 +101,20 @@ properties: - apple,fiq-index - cpus +if: + properties: + compatible: + contains: + const: apple,t8112-aic +then: + properties: + '#interrupt-cells': + maximum: 3 +else: + properties: + '#interrupt-cells': + minimum: 4 + required: - compatible - '#interrupt-cells' From patchwork Sun Feb 12 15:41:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55924 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948500wrn; Sun, 12 Feb 2023 07:42:24 -0800 (PST) X-Google-Smtp-Source: AK7set/pQiDN7Hy+Owb99SQmKgRmnNa5C4MzT7YBpAov+RmxzYvJIxIO0VXST548P4C4Jl593fWY X-Received: by 2002:a17:903:228c:b0:19a:89d4:802f with SMTP id b12-20020a170903228c00b0019a89d4802fmr5001735plh.57.1676216544511; Sun, 12 Feb 2023 07:42:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216544; cv=none; d=google.com; s=arc-20160816; b=fY/X4YUS+aJw/F/z3cnJcc4/GTSknqj43lM33CtxxODEg4w81G/eu19ohx6XF/TNd3 d56iVmegHRC27u9j+pywkEqFxcOUk4dkphB/V9+TgxJzLYKYrG8NOg4KSoO4Xmqr0h09 bjUPRt0xCwSHPwAz3Y8/uuRYXjV42yBUW5q8QQN81EvFCIiueE4qaUEPl3DwcVOoF5xq e8gq1fREJifvW81eIvcF9D67zGK+8jqDudPK2SCBAPkcj0NYw9H2cxd0DWKpKDWi6NF2 ex8fOFSf8uSKg91X53P3/jhVGRDW2UtGfcRoG8QoBe75Kkp+SvJu9a6TiwMdsf5o+Cs1 8zNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=knvPsBSBTxuJZVmkwDJsoFkXpf6DXEVivgTc3dxzY4E=; b=HeV3Fn3GYKEsf/goM+ev/d2esyqP4pWIEJ6dYnTXZYAJGupoqPS5b2oVLwwwYjw1Gu pDLdKCeIeHie/OA4GplIflzO6FpgYp7tKv9qAaQWhWRHIMyi5ZHKruShTGIPtROnP6xr q7/urcvsp72nBTG5iwJ3X584rUi7dyqUBQEZAFXAfHIXEdqX65qeM7l9wuJgVUTp6wRZ a/jEfKQvXKPENDpAnyb1zgQJseFOcHtYqfP4gOsWDZlGbNFetaucUZdHW9o/j486wm9I 64SksyeOAaQzyHS2bFjWpK+zOwjJjeVDqlrs3okJOQYcDG7+YWXdHvZ0Hr5lDm5J7ZxF U43w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o8-20020a656a48000000b004f22f5297b4si9850044pgu.742.2023.02.12.07.42.12; Sun, 12 Feb 2023 07:42:24 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229829AbjBLPls (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39104 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229457AbjBLPld (ORCPT ); Sun, 12 Feb 2023 10:41:33 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 88BEECA3D; Sun, 12 Feb 2023 07:41:32 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 3CFC226F77B; Sun, 12 Feb 2023 16:41:31 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis , Will Deacon , Mark Rutland Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/17] dt-bindings: arm-pmu: Add PMU compatible strings for Apple M2 cores Date: Sun, 12 Feb 2023 16:41:16 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-6-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1092; i=j@jannau.net; h=from:subject:message-id; bh=70aLQCthrgk4W+FY4KI9HKrMII5ATNhhq2xdSLcypVA=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7CcCeL9Zvn94+H61XxdDZp1V5f0nxf4MJZPMP7+rf JUwMTC5o5SFQYyDQVZMkSVJ+2UHw+oaxZjaB2Ewc1iZQIYwcHEKwESuWDAybNIIEExaFTNhyeNf F867/Ta6Y1zWtp4pbtfLNC4dC0cRRoZ/Kinfbq45skn61eU1jdI3LY4fOFCWpvCoWWW1Ypd/yt1 qNgA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640439529386325?= X-GMAIL-MSGID: =?utf-8?q?1757640439529386325?= The PMUs on the avalanche and blizzard CPU two micro-architectures are mostly compatible with M1 ones. They miss support for a single counter according to Apple's PMU counter list. Signed-off-by: Janne Grunau Acked-by: Krzysztof Kozlowski --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. The necessary driver update will be sent separately. --- Documentation/devicetree/bindings/arm/pmu.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index dbb6f3dc5ae5..e14358bf0b9c 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -20,6 +20,8 @@ properties: items: - enum: - apm,potenza-pmu + - apple,avalanche-pmu + - apple,blizzard-pmu - apple,firestorm-pmu - apple,icestorm-pmu - arm,armv8-pmuv3 # Only for s/w models From patchwork Sun Feb 12 15:41:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55926 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948518wrn; Sun, 12 Feb 2023 07:42:27 -0800 (PST) X-Google-Smtp-Source: AK7set9kHqaJ72+N8cCcs3aKgUjKRiCirYjz/+fKWE/BdD64wMqBfX09Ca7jPkrLXbtiQD65hFHY X-Received: by 2002:a17:903:283:b0:19a:98e8:50d1 with SMTP id j3-20020a170903028300b0019a98e850d1mr2249625plr.34.1676216547358; Sun, 12 Feb 2023 07:42:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216547; cv=none; d=google.com; s=arc-20160816; b=MH+oGFYurzgz8SortEmJVhSTe/JMotqgggiZtrWdvr5IdHgpKHmPqCROBDJsUZ8sdB G43eJFXDNxkxe3txJtl1g9Je/0WZCELObN8lma2k6kkh7phQwxAXiVkqajSJ9XpkGTh6 0mB1p9v9CZZr6DICjD7IJ66nMkLQng/oNsD5tLMuKOi0r/tDPP4pbqGDpmKJG2jl3iOj nQeWUbTUHyhZvBzYtZRswGuW/h9D8o+YQ/+3rxnWyQntDD+y/RUYsIQTe8tE1HqxLodL AFUiI/SEyx5nmLGb7PbKotD7cblOId/MTVLVHkST/AblhfwuZROnjRIZiZSRtx5RnBzm XeRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=wFVT5z+EUW/sAnc1AJ25blTZfHxsfhvLknfG3Md9QMs=; b=Byk2YOH8eUmpzdfp+7f4f0RI+rYd3LbmEdaRtpWMSCqdsV7TGc6fwQ/3XC+Rh/ZdBj UzXfJoSL1Z1PiHKs+o1rnVJaREW0qB6xu2kIoY9Ji8+rElBN+HhaTG4G4KXVK/slU2tf PLmS6nYGJOIbBSB4ZkNQXuWWtMz8GgXvzKU+0PTc6bqc8Y/CJ2sTZGgaQ+HzLnoBJz92 bPkR72v8K9tf5nafkoDogfPUiZTDXVbI+7eIXfU+hBXP8FiBQI8ElpA6FYOykVnCvPGx pNc2v1/CuYneMaGdaGF1AJ3h2qehH3u0ZGfVnRkfhFvxXimQmzINW+AvVCTFe2Z3Zgie OVUw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a17-20020a170902ecd100b00198f9f9d0e6si1264516plh.229.2023.02.12.07.42.15; Sun, 12 Feb 2023 07:42:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229787AbjBLPlu (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229713AbjBLPld (ORCPT ); Sun, 12 Feb 2023 10:41:33 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F8ED12583; Sun, 12 Feb 2023 07:41:33 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id C545D26F77C; Sun, 12 Feb 2023 16:41:31 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis , Joerg Roedel , Will Deacon , Robin Murphy Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev Subject: [PATCH 07/17] dt-bindings: iommu: apple,sart: Add apple,t8112-sart compatible string Date: Sun, 12 Feb 2023 16:41:17 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-7-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1211; i=j@jannau.net; h=from:subject:message-id; bh=behPg4aqpLIrrMH961E72k3iDwv6hRfXJBOGGtz768o=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7Cf4X0YsM642XdA5x2bKI/nFe7c2fZ7wvFHZM+dA6 rqnR1UedZSyMIhxMMiKKbIkab/sYFhdoxhT+yAMZg4rE8gQBi5OAZiIxQ9GhhXTr/5Z1xPnzVzg /idBNK/VQVvsQsSMj/LP/Qy+yEj+P8HwT1V2ydoI7lIev97pGzj0SxWeTt/75mXexMeXP1fxuHx T4wYA X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640442550216403?= X-GMAIL-MSGID: =?utf-8?q?1757640442550216403?= "apple,t8112-sart" as found on the Apple M2 SoC appears to be SART3 as well. To allow for later discovered incompatibilities use '"apple,t8112-sart", "apple,t6000-sart"' as compatible string. Signed-off-by: Janne Grunau --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/iommu/apple,sart.yaml | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/iommu/apple,sart.yaml b/Documentation/devicetree/bindings/iommu/apple,sart.yaml index 1524fa3094ef..07d2d68a87df 100644 --- a/Documentation/devicetree/bindings/iommu/apple,sart.yaml +++ b/Documentation/devicetree/bindings/iommu/apple,sart.yaml @@ -28,9 +28,14 @@ description: properties: compatible: - enum: - - apple,t6000-sart - - apple,t8103-sart + oneOf: + - items: + - const: apple,t8112-sart + - const: apple,t6000-sart + - items: + enum: + - apple,t6000-sart + - apple,t8103-sart reg: maxItems: 1 From patchwork Sun Feb 12 15:41:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55927 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948529wrn; Sun, 12 Feb 2023 07:42:31 -0800 (PST) X-Google-Smtp-Source: AK7set/pWTfmCWaqsrtwmoHiui9fZWrOEP/k/gCSYVF+/zCXhQoFArPaLMk4pj/zUwvQTD/i3WMN X-Received: by 2002:a05:6a20:3949:b0:bf:bcfb:1fc6 with SMTP id r9-20020a056a20394900b000bfbcfb1fc6mr29200166pzg.60.1676216551167; Sun, 12 Feb 2023 07:42:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216551; cv=none; d=google.com; s=arc-20160816; b=Sou2Z6UY0npciKd5Iy0XsqJcHA64EnkVoZn2p7suplAYnrZyajNvlbRjXCkBLRxBTY ZeXLGXMOqOXmg2ubJWX+tPjrq7//EmEEX+1fotPzQVZiCj4oBDoYqw/y2GN9fzWiMfh1 3PPXdhk4BnT5H7j/9MJHSD/UEZvUgcRxWO5R3zRM2IO0/xAb9zT1A5utxuyuaPA8TOFq 7iHcBBUftFierB6qqxgFPunnWIMlMrKnGUU+PYZf0z2/qVmmZ67GCa4LYlnbuxqXajin 4+kLsNimqviqJGpgmyQ4GAHq3KH9Vva2rU2+v3mnDgiPiZUo9cghC4WkAEmf50pg31// tSLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Vjt5kuUnbzfJFpwPsJXnqra/96/hwSat1LNbKLwvrnk=; b=S/Gg72z3qIpzdaWDc55JJAXASRLyt/K9Ag8xdBJi8lT0ZXBiMvqTUgjE5/GmkZa6xY dmE7R89QMJlL4D0qi2xzcmig2A0OlFo+9Q/YZXa8r6dnyOM0hO6i2JZGcKKOOV9T4TYu c+Xdq1IxVKv63j1stJV0lCRdfk9844GSeLmM0BpFtoMSEyny20xTpbbPdM7wLlUv3yP0 3v8MHWMFDsJOVVYzMKC6eg1AWxLOuw00juHKlqVSwnu/8cSknFfyLNDj8E/paGILPCSZ DhKSSUs8g4Aa60jA7x/pucruacNjjTFWqeOgWwtu7tCWO4C0oWaCmjDzVLlF8yXTo6sI yjNQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d7-20020a637347000000b004ee642e01bfsi9150692pgn.214.2023.02.12.07.42.19; Sun, 12 Feb 2023 07:42:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229812AbjBLPlw (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229729AbjBLPlf (ORCPT ); Sun, 12 Feb 2023 10:41:35 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE7D71259A; Sun, 12 Feb 2023 07:41:33 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 6217526F77D; Sun, 12 Feb 2023 16:41:32 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis , Jassi Brar Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/17] dt-bindings: mailbox: apple,mailbox: Add t8112 compatibles Date: Sun, 12 Feb 2023 16:41:18 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-8-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1208; i=j@jannau.net; h=from:subject:message-id; bh=u2XW0UUQ4u8JUBUiVFVONT6wWAfsoR/YNQ8wVkAXQnA=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7CeYJkp9fxVkZjdtgsuFP8euzskIb15oevNIcGReq MfWhR5FHaUsDGIcDLJiiixJ2i87GFbXKMbUPgiDmcPKBDKEgYtTACZyP5bhD+9+x+pPbYKfpq2c Epc/VVzBoLDml0jrqwcpES/WP5Db/JmRof+N6hWOxA2JC/XnhJ78OVXxePiMJX8P8JlPCSyfUjX 5BAsA X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640446419415131?= X-GMAIL-MSGID: =?utf-8?q?1757640446419415131?= The mailbox hardware remains unchanged on M2 SoCs so just add its per-SoC compatible. Signed-off-by: Janne Grunau --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml index 5c5c328b3134..4c0668e5f0bd 100644 --- a/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml @@ -29,6 +29,7 @@ properties: items: - enum: - apple,t8103-asc-mailbox + - apple,t8112-asc-mailbox - apple,t6000-asc-mailbox - const: apple,asc-mailbox-v4 @@ -39,6 +40,7 @@ properties: items: - enum: - apple,t8103-m3-mailbox + - apple,t8112-m3-mailbox - apple,t6000-m3-mailbox - const: apple,m3-mailbox-v2 From patchwork Sun Feb 12 15:41:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55928 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948557wrn; Sun, 12 Feb 2023 07:42:36 -0800 (PST) X-Google-Smtp-Source: AK7set/ocFAx0aISoqljUXnKAkaEs+y4aw5dTrugWfjXeWD3i4kNXeooyrU0Y5DcWt57gKFiMKBa X-Received: by 2002:a17:902:d506:b0:196:5bac:e319 with SMTP id b6-20020a170902d50600b001965bace319mr24467800plg.35.1676216556256; Sun, 12 Feb 2023 07:42:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216556; cv=none; d=google.com; s=arc-20160816; b=0lU01ZHjCOmoSkp+87ej93q29x8MpT2382ruJo3UTcnJS3ZpzGuqNcHL/hR+dFilLU iACdBPMnnd7pbOwkY1HfYWXKfSTj9K/p93M9OvZ4NgVCns91bXAQcJgsvXTkpGr8eYnf w9DWx2CBQJvMgvVX2rmOoR27si5OadkpGz0KpSd6fSOjjSzTU5TFAxwXZBxDNyCtN/xe E4Tjw7n3CAdR65imW9AJ/HU9xGYI+N5GfCrvX74FUB6UT2e5yqFjw3WYZ/phHE0aU4qO c6REeY7jGk2O4W1wn4R+UYGoZ10qzVncb3Apq16oLFKusFgYxPpjZDN7+YB+kAP+Ji/v m1OQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=8GKmusJ/POymR2e/iGX/8yqGVDV2qWLU5Q8inxq4jCs=; b=zD44ywzEvZGR5CoIM76mrZYMzTi3ce2+DspL+39eadVd5/3J4W+HL0EFKH2HC5eZUU oyBMN9tiMy2Idj1AvQYWPyeHZUumagwmBKrofFJl3weuKWa01ycSxDFghiyHB68/Q7+e uitxpLRuBKbOrzj+gluQ1PexRlKwLUkhKvoTtvN1y+9zmKhdX1Q6nga74CjZGtup2a/A 1XshqVIsYRM7E06Z//Y3Ktk6RyzB4gqCqzcGNhH7AbHgvLepSxXjMuX4mxZ0SDEI9U8c jq0cLYcjyO6RFQSqACx4cmHcoPNmuZI4jpPVwZdZ0uiG0jotQVRTqrDf+RPOxw4140pG sxhA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ay3-20020a1709028b8300b00189f58ecb7asi8615755plb.151.2023.02.12.07.42.24; Sun, 12 Feb 2023 07:42:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229872AbjBLPlz (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229743AbjBLPlg (ORCPT ); Sun, 12 Feb 2023 10:41:36 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5AA45126CA; Sun, 12 Feb 2023 07:41:34 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 00EDB26F77E; Sun, 12 Feb 2023 16:41:32 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/17] dt-bindings: nvme: apple: Add apple,t8112-nvme-ans2 compatible string Date: Sun, 12 Feb 2023 16:41:19 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-9-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1365; i=j@jannau.net; h=from:subject:message-id; bh=DeFrvPpwtRa0oCuCDcxsondrWycOzD87NFx3HOmPXHc=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7CcqLbOviu3ZGGJwd7bLIs57L4ulpJRnzC7pfHVp5 rwWr1jfjlIWBjEOBlkxRZYk7ZcdDKtrFGNqH4TBzGFlAhnCwMUpABNRz2H4p73g1aM/M9kddvyr nLOy6J1bxtSduRdm/FK/XRR4z6ibI5SRoaPaf4Hmn/3zv6k1ca74a1bpUszwocw3aYpeiG4s29E /vAA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640451813984568?= X-GMAIL-MSGID: =?utf-8?q?1757640451813984568?= "apple,t8112-nvme-ans2" as found on Apple M2 SoCs is compatible with the existing driver. Add its SoC specific compatible string to allow special handling if it'll be necessary. t8112 uses only 2 power-domains as no 4 and 8 TB configurations are offered. Signed-off-by: Janne Grunau --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml index 34dd1cc67124..fc6555724e18 100644 --- a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml +++ b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml @@ -14,6 +14,7 @@ properties: items: - enum: - apple,t8103-nvme-ans2 + - apple,t8112-nvme-ans2 - apple,t6000-nvme-ans2 - const: apple,nvme-ans2 @@ -65,7 +66,9 @@ if: properties: compatible: contains: - const: apple,t8103-nvme-ans2 + enum: + - apple,t8103-nvme-ans2 + - apple,t8112-nvme-ans2 then: properties: power-domains: From patchwork Sun Feb 12 15:41:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55930 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948803wrn; Sun, 12 Feb 2023 07:43:25 -0800 (PST) X-Google-Smtp-Source: AK7set+sOL59zcm5b5B0+8n5P9FDs96RwI1sKTbfThOg80GAswJkayyW76oeR6cqlQvmcBk/vvV8 X-Received: by 2002:a17:903:2309:b0:196:8071:2178 with SMTP id d9-20020a170903230900b0019680712178mr24459012plh.46.1676216605150; Sun, 12 Feb 2023 07:43:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216605; cv=none; d=google.com; s=arc-20160816; b=G9rVis8XDCFrHDCYihbChAcCRZMYeD7cOYittsPef/NbRgai+tqBav5IPngOxfFJF/ oEju9HlGPBQD5l21awtX2sAhmrPUbweqTlTDj+Z+NXseDKfmbsHQK1byfkYV6umIOtef Wl9et3dfz/hS52xP/LRwCBfDeP+CgyxsKnfSTVejoxEhnM+vuyUPLjIANTtEt4Lq91iT 2j+lu6is1b1aNTcBKZklK6shjSHVnpW4EJkj/bbWVUV/iua9irfrU4jt8asKHVtlpjYQ ZCQrJfr4vqaG9SExIirOop0oeBkV8MlLESG/npcNhYkSDoz39Z6+bN8Vjee7T1RIKXDx jXjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=elJYpfI5uxE44Eq+4Q29YnbDHvlxDeliT/pzUnx5PiE=; b=Zs7FGrVt0Mfk+MButGpIBVuzXleKYtoTb+cY7MhGjyb44SPvmCjXZCQKYEMdSx0aB1 TLX/54nXqOMrNbHN1e7hSehVaJWLib4koCUUzgLXsg8ILw8rELZevWInTtEKVop/ZbWA VYpcB4z/v1ipIH8gorDyJXjK5h0ddcIpM16r7PLmV0q78+5QddwEcGjMmgVTOuNFO60S K4b+5EPvg3GOpUas9zKc2EtFQ9lDU44ivbK72ASTaIu3yIdTtxP1pqGkEW5ZduIUY3GR isR0JBMuZDRiUgH71gOjIP+wWiDtkYo+ek5a9O7lukefNwUvEbYaBIZZK7whzxMl0bMo /5kg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 1-20020a170902c10100b0019905ccbcc1si8679411pli.317.2023.02.12.07.43.13; Sun, 12 Feb 2023 07:43:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229877AbjBLPl5 (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229742AbjBLPlg (ORCPT ); Sun, 12 Feb 2023 10:41:36 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0166ECC3E; Sun, 12 Feb 2023 07:41:34 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 8E0B726F77F; Sun, 12 Feb 2023 16:41:33 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis , Bjorn Helgaas , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH 10/17] dt-bindings: pci: apple,pcie: Add t8112 support Date: Sun, 12 Feb 2023 16:41:20 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-10-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=923; i=j@jannau.net; h=from:subject:message-id; bh=B5Qcd4CxlxesRe0jkuQrKlKZBtIrCHBPG5zOO2R33rg=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7Cf+3fv/8/cJ8wf5PTnnflu923ri12nNf7n/JDexp Ug+Lful3FHKwiDGwSArpsiSpP2yg2F1jWJM7YMwmDmsTCBDGLg4BWAi9+sZ/jv3J9ySmWbpJuAf FH7/UFdhRlDAnHWPTtevvsVhKWNUkMnIcH6Bxlm32z9vLrrDXdjc2Dx7iq179BHeV+EzMv9PfCw zlwMA X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640502635613239?= X-GMAIL-MSGID: =?utf-8?q?1757640502635613239?= The block found in the Apple M2 SoC is compatible with the existing driver, and supports 4 downstream ports like the t6000 one. Signed-off-by: Janne Grunau --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/pci/apple,pcie.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml index aa38680aaaca..215ff9a9c835 100644 --- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml @@ -33,6 +33,7 @@ properties: items: - enum: - apple,t8103-pcie + - apple,t8112-pcie - apple,t6000-pcie - const: apple,pcie From patchwork Sun Feb 12 15:41:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55931 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948874wrn; Sun, 12 Feb 2023 07:43:42 -0800 (PST) X-Google-Smtp-Source: AK7set9Ee6pkNgRoH4mFbNyCsQqTzICM6Ns/K0ElUQaNcx7Gz112EzT2o+2WBJRjgVFiFeQnFwhe X-Received: by 2002:a05:6a20:d020:b0:bf:58d1:ce92 with SMTP id hu32-20020a056a20d02000b000bf58d1ce92mr9894903pzb.17.1676216621784; Sun, 12 Feb 2023 07:43:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216621; cv=none; d=google.com; s=arc-20160816; b=zRJpldwAS+I0v3/8md2O8OF93xE6R9fMbPG7zGQiPpgH2fh1t0qtFoSa7lkcqadJb6 aUps5Ervhs/jNPvZsNcQ5ns9W1yLEEHZ1UhPVCa63gXP3U0EGI1fKq0d3q18+rDJa7ED Y2s+XOQQqk06Yv4YhZJ8CEkqMPK/9j0LI4hG4lTv1WbFFC3tDDBy2K4FQaU5OIaJ5AF8 s7rb5UtDVD7r9YPeMkr68/XtwTaHFNJRVRQtUG1yS91WN951U/QWcKGQuHBsmi5+t8LN Zt7yZG6gaZUFdYmyVTWvDDDk+6B4r2wjT3Qfc4QbaN/7GLF7DASRz9HMmoqWKCQbJhfx JJxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=RZGz4FL5VgqK8nQst03Wxsc/VgwjfuP7+Bfdlo0Y+Xs=; b=XXXCXp6xZnqTbNFx8Y92VfqLtyWvjA0K3HNOsfTX8OizbSp8raT12puw61zv3gsgV/ 6nxR0L41pBmdb0M73FaYBl0BkydwejLneQozlKhcQb90EOcotZ4l4Th45VPbI9yEznz3 Cm80GEhqByvfvd5fuShWwaTHPl2NKWUc0hFYvhQO8DPrew+V2bE0bQe5bNSNqEZJbdld 9tf0x/qHeN4JMmQnZbtJPArEuYDJnKWFwHPYvwgoo+rvIvx2dklsi4nY6zHbIDjcUA/7 NSUtDswaldOVKGmpAj1jv1hzWrH+vRir/qvl/1ZvwvbTrMsU1Ru7V3TgpaksKwC9RDsK YMNQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d137-20020a63368f000000b004e1821c0578si9913765pga.217.2023.02.12.07.43.29; Sun, 12 Feb 2023 07:43:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229896AbjBLPl7 (ORCPT + 99 others); Sun, 12 Feb 2023 10:41:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229727AbjBLPlh (ORCPT ); Sun, 12 Feb 2023 10:41:37 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CBFA12587; Sun, 12 Feb 2023 07:41:35 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 1DCC126F780; Sun, 12 Feb 2023 16:41:34 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis , Linus Walleij Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Subject: [PATCH 11/17] dt-bindings: pinctrl: apple,pinctrl: Add apple,t8112-pinctrl compatible Date: Sun, 12 Feb 2023 16:41:21 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-11-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=925; i=j@jannau.net; h=from:subject:message-id; bh=BgNXtE2BRMMw7HVCgwcXLV1Veq/qsknOh6yclUrDso0=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7CfenTu0jn3DjcQvB3dpHlOaYVdrcJD7xHKVG2cn8 Tx1f/QkpaOUhUGMg0FWTJElSftlB8PqGsWY2gdhMHNYmUCGMHBxCsBE9sUyMjxYxpX/8rP58X9v 7743WluyYMKEA2rXGLy/fspitK7jOe/O8E/b39roXdzPz3dNWA46bV/IbbVxpXrqzj1nnu5IPGP yIpsJAA== X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640520577441859?= X-GMAIL-MSGID: =?utf-8?q?1757640520577441859?= This new SoC uses the same pinctrl hardware, so just add a new per-SoC compatible. Signed-off-by: Janne Grunau Reviewed-by: Linus Walleij --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml index d3b11351ca45..684c03a6bd40 100644 --- a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml @@ -19,6 +19,7 @@ properties: items: - enum: - apple,t8103-pinctrl + - apple,t8112-pinctrl - apple,t6000-pinctrl - const: apple,pinctrl From patchwork Sun Feb 12 15:41:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55929 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948718wrn; Sun, 12 Feb 2023 07:43:05 -0800 (PST) X-Google-Smtp-Source: AK7set891qMa/7JaS8lblKrlTQDogzWDIUh3YMWvx60X9g28DN6Gn+FBAm0UaFKgGo/QQJzZWFgc X-Received: by 2002:a17:90a:1906:b0:230:7a31:b9ac with SMTP id 6-20020a17090a190600b002307a31b9acmr23415513pjg.48.1676216585389; Sun, 12 Feb 2023 07:43:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216585; cv=none; d=google.com; s=arc-20160816; b=A9qUVkpDKpksMxu/gcjdG1BRNdr8aigOhFMqJyE/eGFIrNTDbqZCPSQnjTtQ/2j9GT Xq+1zFRt9DjrDnhv6tTGc8aN43zqwUSQ1a6YE4xzXY0qVFzFvC9vFlSfKfDu+KVwYDrd /DRuc7j9uJwDrjHXMtJlJnzOpCUxDhQDUIjq3Z25bPHpdNTIpkErufB/9pYKapNyW4ea jcfQDE7ktnQALoscum4MCK5y9EnRpVEuyqiV1N95R+qXZLQQso+y5As798LvKtmw6ViH pQJ5Bw8ars1NLF5SyX0hhDt4ggaia8aDWG/CeG0cyaLv7x5ps1Zvi13A4hqee5AX95TI zGeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=ScMhnO08MC9o+CpKNCOVvgJsyoJlkc9f/GxjKOwoGUg=; b=Y+OPrbcLuCX0nc9371Z4831Braz3zJdw9LGIxUudF9mZF3bvuBpVCz77pkFVbPfkOX dq8vWn9eYAijIN3uTWokHEydETm5P6oOg67qD9gyBv7VTfrGBPCHJf1afnO7NrQHeQqW aOf1Yknlok/bZ/WSZ8OB2bErbsNzAbaLa2iO/4R9Ekc6eOr5XmKSIm1ViDiPaGsZIfdC C68f46jCU8K/SD2a5nrkGU7sQpDo7B0HBjgyyvYuwnS8cGnXymCyEFDtefitHwpFGPTe TgIhOzE7gJI7YKVRCzaSz0n7PbbRrkXgEeRuuvtuTRgq807PZeO2+S87vPKDgUXnwd5C +XhQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f4-20020a655504000000b004fb31fefcccsi10068427pgr.358.2023.02.12.07.42.53; Sun, 12 Feb 2023 07:43:05 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229905AbjBLPmD (ORCPT + 99 others); Sun, 12 Feb 2023 10:42:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229748AbjBLPlh (ORCPT ); Sun, 12 Feb 2023 10:41:37 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 45BE01285A; Sun, 12 Feb 2023 07:41:36 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id B048926F783; Sun, 12 Feb 2023 16:41:34 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 12/17] dt-bindings: i2c: apple,i2c: Add apple,t8112-i2c compatible Date: Sun, 12 Feb 2023 16:41:22 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-12-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=888; i=j@jannau.net; h=from:subject:message-id; bh=GaccuGqSFZ+kRH1Vtme6IeBfNnC5UeTcePpsKodussA=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7CfcDDwtBNkLGA7LdU/+K5KvWZi6g13v7cR/0Yzzl l7q6fbuKGVhEONgkBVTZEnSftnBsLpGMab2QRjMHFYmkCEMXJwCMJFJBxkZFsq0uJh8ERItj1YR bpnWkviPIfb5bKtdcrvXvT0zffpZAYb/CT27l/M9W+WeeYWz+9M926mSka6PTk99PHXN20tmG/1 5eQA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640482382314209?= X-GMAIL-MSGID: =?utf-8?q?1757640482382314209?= This block on the Apple M2 is compatible with the existing driver so just add the per-SoC compatible. Signed-off-by: Janne Grunau Acked-by: Wolfram Sang # for I2C --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/i2c/apple,i2c.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml index 4ac61fec90e2..3f0e94189f2d 100644 --- a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml @@ -23,6 +23,7 @@ properties: items: - enum: - apple,t8103-i2c + - apple,t8112-i2c - apple,t6000-i2c - const: apple,i2c From patchwork Sun Feb 12 15:41:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55932 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948903wrn; Sun, 12 Feb 2023 07:43:46 -0800 (PST) X-Google-Smtp-Source: AK7set/JBIl8LHabGjheFYkukjbbK46dJVJC5iATcrKWcTQldXURjIgtplwyu2kmLRoe30efvFRi X-Received: by 2002:a05:6a21:380e:b0:a5:df86:f0e1 with SMTP id yi14-20020a056a21380e00b000a5df86f0e1mr7988581pzb.16.1676216626288; Sun, 12 Feb 2023 07:43:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216626; cv=none; d=google.com; s=arc-20160816; b=lhoOLoE5JuyXeSoxT0Fz9YvLtmmEkmHnr8lZO6lIYMKRryUMczsS7BDGOmoUZnEOOM wF9hFIakDr2eUvuJUzBGwxq0T1loCG5OWqUMSzrvNNulZeR9Z+K9ARxV1SckTRJrm5eV l/krQlNC1jrrhoyUbIjuCsn+vSgTE1zeqXAsP4wudH/8fsmghfrL8RuSpDU1NZm8qQjA 6vu/zEhACIVUrf4vMxShYDjAsTJFBM9GdE5rk+xg0LYZSu4Lxlm4857f7Zdd8XyQGbyv 4fIaQPGGFPv8OLDO7drqRXhGGz90c+mbsxrFqhiRw6kL9oamfx11DJ5HRTWCYq8sI1If Y2lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=q0O2N4DzkOZn92an/Bdl91A+ADCU9wRTXuadTdQaDto=; b=TEHoIbzz+SbaZH4sPlQr2cdbpGZBtsLqbWtH4fNYwhwwxWg1cIvk5DSunRapxSFKsd OLZwB8UU0cQs+c0TlRiGuz/r7u+ZQsavQ2I75tqRjyZJvi9y2rIl+K7RRMeGql1gODlf iL5VQdUcwZJYYabyp3xGWmyWhEBc7bAbXW4s6nu2AE+YTVV0DPWTM8fqqNysAUgM8RQ5 no9eB09g6hxtxeqxxqBa07syhqiVSVeQBLp2sda4B3AE5RFdbNNbwRwhiRZ35gtMkhnU 6N69UZgUxYDA56XSqsnpwVJhn0WqeAghKgdw+5tGq+zBgvnjeZiVVlKrfmHfVmsHxpDL GxIg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u28-20020a63b55c000000b004fba07a634dsi1030817pgo.66.2023.02.12.07.43.34; Sun, 12 Feb 2023 07:43:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229911AbjBLPmG (ORCPT + 99 others); Sun, 12 Feb 2023 10:42:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229733AbjBLPlh (ORCPT ); Sun, 12 Feb 2023 10:41:37 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A591612588; Sun, 12 Feb 2023 07:41:36 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 45D4C26F788; Sun, 12 Feb 2023 16:41:35 +0100 (CET) From: Janne Grunau To: =?unknown-8bit?q?Hector_Martin_=3Cmarcan=40marcan=2Est=3E=2C_Sven_Peter_?= =?unknown-8bit?q?=3Csven=40svenpeter=2Edev=3E=2C_Alyssa_Rosenzweig_=3Calyss?= =?unknown-8bit?q?a=40rosenzweig=2Eio=3E=2C_Rob_Herring_=3Crobh+dt=40kernel?= =?unknown-8bit?q?=2Eorg=3E=2C_Krzysztof_Kozlowski_=3Ckrzysztof=2Ekozlowski+?= =?unknown-8bit?q?dt=40linaro=2Eorg=3E=2C_Mark_Kettenis_=3Ckettenis=40openbs?= =?unknown-8bit?q?d=2Eorg=3E=2C_Michael_Turquette_=3Cmturquette=40baylibre?= =?unknown-8bit?q?=2Ecom=3E=2C_Stephen_Boyd_=3Csboyd=40kernel=2Eorg=3E=2C_?= =?unknown-8bit?q?=A1er__=3Cpovik+lin=40cutebit=2Eorg=3E?= Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH 13/17] dt-bindings: clock: apple,nco: Add t8112-nco compatible Date: Sun, 12 Feb 2023 16:41:23 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-13-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=899; i=j@jannau.net; h=from:subject:message-id; bh=guQoP4sTJ6J0hvW04dgo+MfAOGedfXRIgUStRwklrig=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7Cdmzdm4cvfPzkT7S7f/Td73YFm/q9f11hkiCczba pqWSG5q6ShlYRDjYJAVU2RJ0n7ZwbC6RjGm9kEYzBxWJpAhDFycAjCRdUqMDBP4hOfF2UxsvX+7 uHJx+I1rxsHhz3k56tpulZkZPbObOZfhf3SHwizzmt/LuC2PB8/eNOu7u/rW1ur48O8RJaHvn1i 3MwAA X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640525461767743?= X-GMAIL-MSGID: =?utf-8?q?1757640525461767743?= The block found on Apple's M2 SoC is compatible with the existing driver so add its per-SoC compatible. Signed-off-by: Janne Grunau Acked-by: Stephen Boyd --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/clock/apple,nco.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/apple,nco.yaml b/Documentation/devicetree/bindings/clock/apple,nco.yaml index 74eab5c0d24a..8b8411dc42f6 100644 --- a/Documentation/devicetree/bindings/clock/apple,nco.yaml +++ b/Documentation/devicetree/bindings/clock/apple,nco.yaml @@ -23,6 +23,7 @@ properties: - enum: - apple,t6000-nco - apple,t8103-nco + - apple,t8112-nco - const: apple,nco clocks: From patchwork Sun Feb 12 15:41:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55933 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1948915wrn; Sun, 12 Feb 2023 07:43:48 -0800 (PST) X-Google-Smtp-Source: AK7set/CZAHxvpuxp6VcJtfUlDQoaz9OUGBW5r44DBpvo/xiaqo6du8ci2W8/mmXXavu6ZBTF3+0 X-Received: by 2002:a50:aac5:0:b0:4ac:c7b3:8c27 with SMTP id r5-20020a50aac5000000b004acc7b38c27mr193846edc.28.1676216628345; Sun, 12 Feb 2023 07:43:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216628; cv=none; d=google.com; s=arc-20160816; b=CUqNzsqtIRLgTxoZ3lKneOGek+H/7hOAik1gD79vBzYyI2D5bwOt8hXPnSaS7qYuQQ NOSScdagFp9/PXJcnWER3aJJC6oTJUo5fjJYmDGbr32lIWIKXNJ/W04OqQ8grOZn+D5w /43VQ9bigRrsYXjENdOao3kStoUh2fNmoZEagCMG8rKD5eSRIJ5QoEX2CF/H/NYWzbML x7QkpYP8Sqlmk39bp08evj1PPEzOx209XaP1v2p4bdOcqTisk30ELOIeKx/PlwAN024a vfUIv/rJ8hN21hp+2kFMPQodW60C/gMOkUjTeyx04zl7wyGrXlzHSWSmKQqdwv1ljKZR rsSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=GxWapga651eTuJac1QZupM8eA5W/Lt4wdMayqMe/nDM=; b=YLzfQBYWi/7b8JQwxxcZuwvBeY09nbn0qHWD/1yWedvK9YeOp+GoPgxpYpDHgAekzD R1gyHb4S+2XEYeCEnGYpCH+pGlcwek94imd4kcxELkvTHDI6BBlqsnYffoFIq9KaHckK 7qbo9BjaHa2RJj3xrZX6qmiRcbfbTptl0RKMb9RwFDr7h2Vs2Ga2aJBQy94m/PhkjKgj g+tSe96svKl8qaZXlqd+yN4Lu4eLPTNpV+MEgUntX0NJ+EEueSucG0irlPKMLXocIUl/ Qty8w65c0ErezNIdQq31xYC/+P/MllSyI8XS4Yh/ShhMEVpKTnROo9fC1vdfnmZcPrfu bwRg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i20-20020aa7dd14000000b004acbeceab83si2325549edv.448.2023.02.12.07.43.24; Sun, 12 Feb 2023 07:43:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229917AbjBLPmJ (ORCPT + 99 others); Sun, 12 Feb 2023 10:42:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229745AbjBLPln (ORCPT ); Sun, 12 Feb 2023 10:41:43 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8260212065; Sun, 12 Feb 2023 07:41:37 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id E6F8126F78F; Sun, 12 Feb 2023 16:41:35 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis , =?utf-8?q?Martin_Povi=C5=A1er?= , Liam Girdwood , Mark Brown Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org Subject: [PATCH 14/17] dt-bindings: sound: apple,mca: Add t8112-mca compatible Date: Sun, 12 Feb 2023 16:41:24 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-14-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=896; i=j@jannau.net; h=from:subject:message-id; bh=d6xopFInR0A/pTQ8VBQnZ0XquLmM0VM326XmH34u10g=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7Ccr21aeeiL1YfpZIaUNlz9XH+yfNfPDS7fTfEFX9 vA4Gl542FHKwiDGwSArpsiSpP2yg2F1jWJM7YMwmDmsTCBDGLg4BWAi2qUMv9keZW9Y+T+47c3d PWsZ3yiGsKi9Ug9IYv0jYTvllMST22oM/2umt3nz/ljVdJdVuf/Yz9dNexRbDvf9iw2xXJ+4YnJ aIjcA X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640527635764055?= X-GMAIL-MSGID: =?utf-8?q?1757640527635764055?= The block found on Apple's M2 SoC is compatible with the existing driver so add its per-SoC compatible. Signed-off-by: Janne Grunau Acked-by: Krzysztof Kozlowski Reviewed-by: Mark Brown --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/sound/apple,mca.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sound/apple,mca.yaml b/Documentation/devicetree/bindings/sound/apple,mca.yaml index 40e3a202f443..5c6ec08c7d24 100644 --- a/Documentation/devicetree/bindings/sound/apple,mca.yaml +++ b/Documentation/devicetree/bindings/sound/apple,mca.yaml @@ -23,6 +23,7 @@ properties: - enum: - apple,t6000-mca - apple,t8103-mca + - apple,t8112-mca - const: apple,mca reg: From patchwork Sun Feb 12 15:41:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55934 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1949218wrn; Sun, 12 Feb 2023 07:44:51 -0800 (PST) X-Google-Smtp-Source: AK7set9NQ+IhXBEX3ksF0hvZYr+fiViINdOCKhSVctnRE9zuuaUBm+f+6iYtsHSd9CffNpkqCrRP X-Received: by 2002:a62:506:0:b0:5a8:808a:d3ce with SMTP id 6-20020a620506000000b005a8808ad3cemr5097746pff.8.1676216691356; Sun, 12 Feb 2023 07:44:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216691; cv=none; d=google.com; s=arc-20160816; b=v1ZHibiI2NrHahWCkdGhW04eITkIhC+fr0D2/lkJCXsuYuBEn2FGxi0UcwrKyE47Wy jji5Er75WDi56qE5qSm2CTxC0lpelpTa5FfAv+AMymZDFVXdbzIMR2BcDUNWuPbP3aD8 j6eaMHhETxCgpNduQZsENSDMms4ge6VhVjfRmAzZYVFXXylr3AjvEzj8exkOHzaeYOjo d1AyNt/onULR2u4lpWrHwLziEdpCpoWd5gGeumtlwp4QmuZ/dYB1GRb1kH89o4HP5Tgt 18+iplt+y4wYFtZtUrNoEpiUQTLhkHlk80y6IK0I2hB26cgBeIkKAKxn1O8JZtYCyI0A T6vA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=SoXAdWdZkCUF4iZeJP02Pgk7yr1GrtgaabZATSfyI50=; b=I2lZt9HUe20GoD/aKICEr1D3HqL2tZCeRBqUqFTKTq86kk1EcZGUOVgM1Hg8IkihNa 1JylxzYlf2YJXFExuGejH+Xf5dknLsbARb/h+kWn06+KLtThToKdkP5sdbjFhDPf0Ri+ zg0LNsQvSZuSxlX+zIVu671QQbh7jyIv0touKPfmtPwzoqhXRjEYmgoi4iAC/eEG7bN0 CqxLy89EQXpHSsUhdESEcINgMEnIA3wxB76qfi5IkFb6xlI0Bo3W7XSfg54lxhR8ZTTt ByK8talmFzXhhqHJ57D3LYTpvRbwOrvdjVM8Pp+Rp39HXp1QStsDkvsAvlFnDSEMEyCw AJCA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f81-20020a623854000000b0058bafc3894bsi9614213pfa.190.2023.02.12.07.44.38; Sun, 12 Feb 2023 07:44:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229925AbjBLPmL (ORCPT + 99 others); Sun, 12 Feb 2023 10:42:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229789AbjBLPln (ORCPT ); Sun, 12 Feb 2023 10:41:43 -0500 Received: from soltyk.jannau.net (soltyk.jannau.net [144.76.91.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E83F712F09; Sun, 12 Feb 2023 07:41:37 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 85BE926F790; Sun, 12 Feb 2023 16:41:36 +0100 (CET) From: Janne Grunau To: =?unknown-8bit?q?Hector_Martin_=3Cmarcan=40marcan=2Est=3E=2C_Sven_Peter_?= =?unknown-8bit?q?=3Csven=40svenpeter=2Edev=3E=2C_Alyssa_Rosenzweig_=3Calyss?= =?unknown-8bit?q?a=40rosenzweig=2Eio=3E=2C_Rob_Herring_=3Crobh+dt=40kernel?= =?unknown-8bit?q?=2Eorg=3E=2C_Krzysztof_Kozlowski_=3Ckrzysztof=2Ekozlowski+?= =?unknown-8bit?q?dt=40linaro=2Eorg=3E=2C_Mark_Kettenis_=3Ckettenis=40openbs?= =?unknown-8bit?q?d=2Eorg=3E=2C_Vinod_Koul_=3Cvkoul=40kernel=2Eorg=3E=2C_=A1?= =?unknown-8bit?q?er__=3Cpovik+lin=40cutebit=2Eorg=3E?= Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org Subject: [PATCH 15/17] dt-bindings: dma: apple,admac: Add t8112-admac compatible Date: Sun, 12 Feb 2023 16:41:25 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-15-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=904; i=j@jannau.net; h=from:subject:message-id; bh=S0Iix+sqEiNt1+LztfuVpGzFysCtRTtL+8qXnHKS/io=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7Cctj8mFrO69buzrXLdi+51fD+8LhFq82vFXk/ls/ PQL8ilnOkpZGMQ4GGTFFFmStF92MKyuUYypfRAGM4eVCWQIAxenAExkjyPDP5ujN1JdMjc/XLE8 a+u13JyrecEeyw91tESm/Km5Pve3gh8jw4apSS2mV070POnZbih/9ZqwVb/OqtSSz+WtGktKn++ L5gcA X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640593601973058?= X-GMAIL-MSGID: =?utf-8?q?1757640593601973058?= The block found on Apple's M2 SoC is compatible with the existing driver so add its per-SoC compatible. Signed-off-by: Janne Grunau Acked-by: Vinod Koul --- This trivial dt-bindings update should be merged through the asahi-soc tree to ensure validation of the Apple M2 (t8112) devicetrees in this series. --- Documentation/devicetree/bindings/dma/apple,admac.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/dma/apple,admac.yaml b/Documentation/devicetree/bindings/dma/apple,admac.yaml index 97282469e4af..beb09f115f40 100644 --- a/Documentation/devicetree/bindings/dma/apple,admac.yaml +++ b/Documentation/devicetree/bindings/dma/apple,admac.yaml @@ -26,6 +26,7 @@ properties: - enum: - apple,t6000-admac - apple,t8103-admac + - apple,t8112-admac - const: apple,admac reg: From patchwork Sun Feb 12 15:41:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 55935 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1949289wrn; Sun, 12 Feb 2023 07:45:13 -0800 (PST) X-Google-Smtp-Source: AK7set/qnpvXRdsAJFpkpcwrRVmP7zZdolv1xofL1XPtJnRDR4Xi5e4fO8yooC/nBUj1zAz+MHQb X-Received: by 2002:a05:6a20:a006:b0:bf:58d1:ce95 with SMTP id p6-20020a056a20a00600b000bf58d1ce95mr12929729pzj.20.1676216713067; Sun, 12 Feb 2023 07:45:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676216713; cv=none; d=google.com; s=arc-20160816; b=QA99msnxvdF7zw7ze0VDM9DHv3JaV1RtI+b1XlWckr1L1GtS/kI0aeRbiiJSKIMGwy nuvrKMmoUNV5vyBnxt5XQmLou0dr2+9Knf9yBd4TsTzFe+NP8YLCEUZEwGnYCnV0E/FX iFjE9Xbcq6TWL0Eet3BnXuOhxTqd/G2yTRSS3H/RyVwSRZxBYRw1tnTi12zS5uNNn9uz A9lmKxoikITLFOE7n2J2GRYxjQ14D83r1Va3LDTJvfihyJS+fWOwKe4Z/V1D/ushx8s5 Z33nWO0BT+kuEakyVD9k1bCm2Lky0qwmfa0xS57oSMOCdNMOvb/tF4JzXSrEMjpxL+ti UKbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=fogyXuIHqVsc7ugJL0sAywZb6e4YqUQA4r2GMH5iWP4=; b=ICKQj8hpYCWhUQXDo7fHyur1ozVbJs/7CBDTzOI4d933bfdaR2M/0aQvjJmSPJUndx wbYOi0liasa/R4fNmprpBVFddtuvg+hijiPDXk8zkZcbOoc1pVe7Mcfhvcdkbz1wb6na xxRNIrxJnSmnnCb3uHGh99ajS0cFV7xmbEtXbv6h9yjFuknuqabxlwrEmTymRGPeWfuP 2HSxo/boxfB3nAJcc8LTeDzDXEdOXftk9s6FI/X38C+/OD5b2Cw0h2xPhLt4NSPZmxEz Dcu0vCQ70hZrTMUrBg5AQZnD9fJ5dhnYNJAg9IQh0PNggyfJia4+6IRacXxSqTpkrPHe JEaw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. 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Sun, 12 Feb 2023 07:41:38 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id 35BBD26F795; Sun, 12 Feb 2023 16:41:37 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 16/17] dt-bindings: arm: apple: Add t8112 j413/j473/j493 compatibles Date: Sun, 12 Feb 2023 16:41:26 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-16-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1495; i=j@jannau.net; h=from:subject:message-id; bh=LZlfmrMLh355hrUXDWcy/Nqo+IlGvelXqULXx2QN1vU=; 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Sun, 12 Feb 2023 07:41:40 -0800 (PST) Received: from robin.home.jannau.net (p579ad32f.dip0.t-ipconnect.de [87.154.211.47]) by soltyk.jannau.net (Postfix) with ESMTPSA id E38F626F797; Sun, 12 Feb 2023 16:41:38 +0100 (CET) From: Janne Grunau To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Mark Kettenis Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 17/17] arm64: dts: apple: t8112: Initial t8112 (M2) device trees Date: Sun, 12 Feb 2023 16:41:27 +0100 Message-Id: <20230202-asahi-t8112-dt-v1-17-cb5442d1c229@jannau.net> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> References: <20230202-asahi-t8112-dt-v1-0-cb5442d1c229@jannau.net> MIME-Version: 1.0 X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=65060; i=j@jannau.net; h=from:subject:message-id; bh=NQiQFvFYMLEt33hoYfY6Ukt+0XbntjPC4QM+FN66fSc=; b=owGbwMvMwCG2UNrmdq9+ahrjabUkhuSX7CcXS4prsdV8FVBw1S0/Y7x7v5mB6EZP82y7b4Znb iZ2rNrZUcrCIMbBICumyJKk/bKDYXWNYkztgzCYOaxMIEMYuDgFYCLzmxkZjgneed7qdyT1zueV Bxap7451OtqW/Vxm88FLIvw9PKdmpTH8r69K/hOoNm1tsK2JTuvJ+ra/+1f6zSv4LrK0f7ICo2s vFwA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757640682854779150?= X-GMAIL-MSGID: =?utf-8?q?1757640682854779150?= From: Hector Martin This adds device trees for the following devices: - Macbook Air (M2, 2022) - Macbook Pro 13" (M2, 2022) - Mac mini (M2, 2023) Signed-off-by: Hector Martin Co-developed-by: Janne Grunau Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/Makefile | 3 + arch/arm64/boot/dts/apple/t8112-j413.dts | 71 ++ arch/arm64/boot/dts/apple/t8112-j473.dts | 60 ++ arch/arm64/boot/dts/apple/t8112-j493.dts | 60 ++ arch/arm64/boot/dts/apple/t8112-jxxx.dtsi | 81 ++ arch/arm64/boot/dts/apple/t8112-pmgr.dtsi | 1141 +++++++++++++++++++++++++++++ arch/arm64/boot/dts/apple/t8112.dtsi | 904 +++++++++++++++++++++++ 7 files changed, 2320 insertions(+) diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple/Makefile index 5a7506ff5ea3..aec5e29cdfb7 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -10,3 +10,6 @@ dtb-$(CONFIG_ARCH_APPLE) += t6000-j316s.dtb dtb-$(CONFIG_ARCH_APPLE) += t6001-j316c.dtb dtb-$(CONFIG_ARCH_APPLE) += t6001-j375c.dtb dtb-$(CONFIG_ARCH_APPLE) += t6002-j375d.dtb +dtb-$(CONFIG_ARCH_APPLE) += t8112-j413.dtb +dtb-$(CONFIG_ARCH_APPLE) += t8112-j473.dtb +dtb-$(CONFIG_ARCH_APPLE) += t8112-j493.dtb diff --git a/arch/arm64/boot/dts/apple/t8112-j413.dts b/arch/arm64/boot/dts/apple/t8112-j413.dts new file mode 100644 index 000000000000..0e5b5add92cf --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8112-j413.dts @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Air (M2, 2022) + * + * target-type: J413 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8112.dtsi" +#include "t8112-jxxx.dtsi" + +/ { + compatible = "apple,j413", "apple,t8112", "apple,arm-platform"; + model = "Apple MacBook Air (13-inch, M2, 2022)"; + + aliases { + bluetooth0 = &bluetooth0; + wifi0 = &wifi0; + }; +}; + +/* + * Force the bus number assignments so that we can declare some of the + * on-board devices and properties that are populated by the bootloader + * (such as MAC addresses). + */ +&port00 { + bus-range = <1 1>; + wifi0: wifi@0,0 { + compatible = "pci14e4,4433"; + reg = <0x10000 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-mac-address = [00 10 18 00 00 10]; + apple,antenna-sku = "XX"; + brcm,board-type = "apple,hokkaido"; + }; + + bluetooth0: bluetooth@0,1 { + compatible = "pci14e4,5f71"; + reg = <0x10100 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-bd-address = [00 00 00 00 00 00]; + brcm,board-type = "apple,hokkaido"; + }; +}; + +/* + * Remove unused PCIe ports + */ + +/delete-node/ &port01; +/delete-node/ &port02; +/delete-node/ &port03; + +&i2c0 { + /* MagSafe port */ + hpm5: usb-pd@3a { + compatible = "apple,cd321x"; + reg = <0x3a>; + interrupt-parent = <&pinctrl_ap>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "irq"; + }; +}; + +&i2c4 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8112-j473.dts b/arch/arm64/boot/dts/apple/t8112-j473.dts new file mode 100644 index 000000000000..55950d0a73c5 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8112-j473.dts @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple Mac mini (M2, 2023) + * + * target-type: J473 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8112.dtsi" +#include "t8112-jxxx.dtsi" + +/ { + compatible = "apple,j473", "apple,t8112", "apple,arm-platform"; + model = "Apple Mac mini (M2, 2023)"; + + aliases { + bluetooth0 = &bluetooth0; + ethernet0 = ðernet0; + wifi0 = &wifi0; + }; +}; + +/* + * Force the bus number assignments so that we can declare some of the + * on-board devices and properties that are populated by the bootloader + * (such as MAC addresses). + */ +&port00 { + bus-range = <1 1>; +}; + +&port01 { + bus-range = <2 2>; +}; + +&port02 { + bus-range = <3 3>; + ethernet0: ethernet@0,0 { + reg = <0x30000 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-mac-address = [00 10 18 00 00 00]; + }; +}; + +&pcie1_dart { + status = "okay"; +}; + +&pcie2_dart { + status = "okay"; +}; + +/* + * Remove unused PCIe port + */ + +/delete-node/ &port03; diff --git a/arch/arm64/boot/dts/apple/t8112-j493.dts b/arch/arm64/boot/dts/apple/t8112-j493.dts new file mode 100644 index 000000000000..bfd81f413764 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8112-j493.dts @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Pro (13-inch, M1, 2022) + * + * target-type: J493 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8112.dtsi" +#include "t8112-jxxx.dtsi" + +/ { + compatible = "apple,j493", "apple,t8112", "apple,arm-platform"; + model = "Apple MacBook Pro (13-inch, M2, 2022)"; + + aliases { + bluetooth0 = &bluetooth0; + wifi0 = &wifi0; + }; +}; + +/* + * Force the bus number assignments so that we can declare some of the + * on-board devices and properties that are populated by the bootloader + * (such as MAC addresses). + */ +&port00 { + bus-range = <1 1>; + wifi0: wifi@0,0 { + compatible = "pci14e4,4425"; + reg = <0x10000 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-mac-address = [00 00 00 00 00 00]; + apple,antenna-sku = "XX"; + brcm,board-type = "apple,kyushu"; + }; + + bluetooth0: bluetooth@0,1 { + compatible = "pci14e4,5f69"; + reg = <0x10100 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-bd-address = [00 00 00 00 00 00]; + brcm,board-type = "apple,kyushu"; + }; +}; + +/* + * Remove unused PCIe ports + */ + +/delete-node/ &port01; +/delete-node/ &port02; +/delete-node/ &port03; + +&i2c4 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi new file mode 100644 index 000000000000..f5edf61113e7 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple M2 MacBook Air/Pro (M2, 2022) + * + * This file contains parts common to all Apple M2 devices using the t8112. + * + * target-type: J493, J413 + * + * Copyright The Asahi Linux Contributors + */ + +/ { + aliases { + serial0 = &serial0; + serial2 = &serial2; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "serial0"; + + framebuffer0: framebuffer@0 { + compatible = "apple,simple-framebuffer", "simple-framebuffer"; + reg = <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status = "disabled"; + }; + }; + + memory@800000000 { + device_type = "memory"; + reg = <0x8 0 0x2 0>; /* To be filled by loader */ + }; +}; + +&serial0 { + status = "okay"; +}; + +&serial2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + hpm0: usb-pd@38 { + compatible = "apple,cd321x"; + reg = <0x38>; + interrupt-parent = <&pinctrl_ap>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "irq"; + }; + + hpm1: usb-pd@3f { + compatible = "apple,cd321x"; + reg = <0x3f>; + interrupt-parent = <&pinctrl_ap>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "irq"; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&nco_clkref { + clock-frequency = <900000000>; +}; diff --git a/arch/arm64/boot/dts/apple/t8112-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8112-pmgr.dtsi new file mode 100644 index 000000000000..0f2d810921c8 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8112-pmgr.dtsi @@ -0,0 +1,1141 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR Power domains for the Apple T8112 "M2" SoC + * + * Copyright The Asahi Linux Contributors + */ + + +&pmgr { + ps_sbr: power-controller@100 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x100 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "sbr"; + apple,always-on; /* Core device */ + }; + + ps_aic: power-controller@108 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x108 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "aic"; + apple,always-on; /* Core device */ + }; + + ps_dwi: power-controller@110 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x110 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dwi"; + apple,always-on; /* Core device */ + }; + + ps_soc_spmi0: power-controller@118 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x118 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "soc_spmi0"; + }; + + ps_gpio: power-controller@120 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x120 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "gpio"; + }; + + ps_pms_busif: power-controller@128 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x128 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pms_busif"; + apple,always-on; /* Core device */ + }; + + ps_pms: power-controller@130 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x130 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pms"; + apple,always-on; /* Core device */ + }; + + ps_pms_c1ppt: power-controller@160 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x160 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pms_c1ppt"; + power-domains = <&ps_pms>; + }; + + ps_soc_dpe: power-controller@168 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x168 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "soc_dpe"; + apple,always-on; /* Core device */ + }; + + ps_pmgr_soc_ocla: power-controller@170 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x170 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pmgr_soc_ocla"; + power-domains = <&ps_pms>; + }; + + ps_ispsens0: power-controller@178 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x178 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ispsens0"; + }; + + ps_ispsens1: power-controller@180 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x180 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ispsens1"; + }; + + ps_ispsens2: power-controller@188 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x188 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ispsens2"; + }; + + ps_ispsens3: power-controller@190 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x190 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ispsens3"; + }; + + ps_pcie_ref: power-controller@198 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x198 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pcie_ref"; + }; + + ps_aft0: power-controller@1a0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1a0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "aft0"; + }; + + ps_imx: power-controller@1a8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1a8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "imx"; + apple,always-on; /* Apple fabric, critical block */ + }; + + ps_sio_busif: power-controller@1b0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1b0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "sio_busif"; + }; + + ps_sio: power-controller@1b8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1b8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "sio"; + apple,always-on; + power-domains = <&ps_sio_busif>; + }; + + ps_sio_cpu: power-controller@1c0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1c0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "sio_cpu"; + power-domains = <&ps_sio>; + }; + + ps_fpwm0: power-controller@1c8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1c8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "fpwm0"; + power-domains = <&ps_sio>; + }; + + ps_fpwm1: power-controller@1d0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1d0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "fpwm1"; + power-domains = <&ps_sio>; + }; + + ps_fpwm2: power-controller@1d8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1d8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "fpwm2"; + power-domains = <&ps_sio>; + }; + + ps_i2c0: power-controller@1e0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1e0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c0"; + power-domains = <&ps_sio>; + }; + + ps_i2c1: power-controller@1e8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1e8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c1"; + power-domains = <&ps_sio>; + }; + + ps_i2c2: power-controller@1f0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1f0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c2"; + power-domains = <&ps_sio>; + }; + + ps_i2c3: power-controller@1f8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x1f8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c3"; + power-domains = <&ps_sio>; + }; + + ps_i2c4: power-controller@200 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x200 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "i2c4"; + power-domains = <&ps_sio>; + }; + + ps_spi_p: power-controller@208 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x208 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "spi_p"; + power-domains = <&ps_sio>; + }; + + ps_uart_p: power-controller@210 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x210 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart_p"; + power-domains = <&ps_sio>; + }; + + ps_audio_p: power-controller@218 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x218 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "audio_p"; + power-domains = <&ps_sio>; + }; + + ps_aes: power-controller@220 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x220 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "aes"; + power-domains = <&ps_sio>; + }; + + ps_spi0: power-controller@228 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x228 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "spi0"; + power-domains = <&ps_spi_p>; + }; + + ps_spi1: power-controller@230 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x230 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "spi1"; + power-domains = <&ps_spi_p>; + }; + + ps_spi2: power-controller@238 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x238 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "spi2"; + power-domains = <&ps_spi_p>; + }; + + ps_spi3: power-controller@240 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x240 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "spi3"; + power-domains = <&ps_spi_p>; + }; + + ps_spi4: power-controller@248 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x248 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "spi4"; + power-domains = <&ps_spi_p>; + }; + + ps_spi5: power-controller@250 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x250 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "spi5"; + power-domains = <&ps_spi_p>; + }; + + ps_uart_n: power-controller@258 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x258 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart_n"; + power-domains = <&ps_uart_p>; + }; + + ps_uart0: power-controller@260 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x260 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart0"; + power-domains = <&ps_uart_p>; + }; + + ps_uart1: power-controller@268 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x268 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart1"; + power-domains = <&ps_uart_p>; + }; + + ps_uart2: power-controller@270 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x270 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart2"; + power-domains = <&ps_uart_p>; + }; + + ps_uart3: power-controller@278 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x278 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart3"; + power-domains = <&ps_uart_p>; + }; + + ps_uart4: power-controller@280 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x280 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart4"; + power-domains = <&ps_uart_p>; + }; + + ps_uart5: power-controller@288 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x288 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart5"; + power-domains = <&ps_uart_p>; + }; + + ps_uart6: power-controller@290 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x290 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart6"; + power-domains = <&ps_uart_p>; + }; + + ps_uart7: power-controller@298 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x298 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart7"; + power-domains = <&ps_uart_p>; + }; + + ps_uart8: power-controller@2a0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2a0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "uart8"; + power-domains = <&ps_uart_p>; + }; + + ps_sio_adma: power-controller@2a8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2a8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "sio_adma"; + power-domains = <&ps_spi_p>, <&ps_audio_p>; + }; + + ps_dpa0: power-controller@2b0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2b0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dpa0"; + power-domains = <&ps_audio_p>; + }; + + ps_dpa1: power-controller@2b8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2b8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dpa1"; + power-domains = <&ps_audio_p>; + }; + + ps_mca0: power-controller@2c0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2c0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "mca0"; + power-domains = <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_mca1: power-controller@2c8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2c8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "mca1"; + power-domains = <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_mca2: power-controller@2d0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2d0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "mca2"; + power-domains = <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_mca3: power-controller@2d8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2d8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "mca3"; + power-domains = <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_mca4: power-controller@2e0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2e0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "mca4"; + power-domains = <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_mca5: power-controller@2e8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2e8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "mca5"; + power-domains = <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_mcc: power-controller@2f0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2f0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "mcc"; + apple,always-on; /* Memory controller */ + }; + + ps_dcs0: power-controller@2f8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x2f8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dcs0"; + apple,always-on; /* LPDDR4 interface */ + }; + + ps_dcs2: power-controller@300 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x300 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dcs2"; + apple,always-on; /* LPDDR4 interface */ + }; + + ps_dcs1: power-controller@308 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x308 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dcs1"; + apple,always-on; /* LPDDR4 interface */ + }; + + ps_dcs3: power-controller@310 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x310 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dcs3"; + apple,always-on; /* LPDDR4 interface */ + }; + + ps_dcs4: power-controller@318 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x318 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dcs4"; + apple,always-on; /* LPDDR4 interface */ + }; + + ps_dcs5: power-controller@320 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x320 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dcs5"; + apple,always-on; /* LPDDR4 interface */ + }; + + ps_dcs6: power-controller@328 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x328 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dcs6"; + apple,always-on; /* LPDDR4 interface */ + }; + + ps_dcs7: power-controller@330 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x330 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dcs7"; + apple,always-on; /* LPDDR4 interface */ + }; + + ps_smx0: power-controller@338 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x338 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "smx0"; + apple,always-on; /* Apple fabric, critical block */ + }; + + ps_smx1: power-controller@340 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x340 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "smx1"; + apple,always-on; /* Apple fabric, critical block */ + }; + + ps_apcie: power-controller@348 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x348 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie"; + power-domains = <&ps_imx>, <&ps_pcie_ref>; + }; + + ps_rmx0: power-controller@350 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x350 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "rmx0"; + /* Apple Fabric, display/image stuff: this can power down */ + }; + + ps_rmx1: power-controller@358 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x358 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "rmx1"; + /* Apple Fabric, display/image stuff: this can power down */ + }; + + ps_cmx: power-controller@360 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x360 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "cmx"; + apple,always-on; /* Apple fabric, critical block */ + }; + + ps_mmx: power-controller@368 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x368 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "mmx"; + /* Apple Fabric, media stuff: this can power down */ + }; + + ps_disp0_sys: power-controller@370 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x370 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "disp0_sys"; + power-domains = <&ps_rmx1>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_disp0_fe: power-controller@378 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x378 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "disp0_fe"; + power-domains = <&ps_disp0_sys>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_dispext_sys: power-controller@380 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x380 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dispext_sys"; + power-domains = <&ps_rmx0>; + }; + + ps_dispext_fe: power-controller@388 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x388 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dispext_fe"; + power-domains = <&ps_dispext_sys>; + }; + + ps_dispext_cpu0: power-controller@3c8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x3c8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dispext_cpu0"; + power-domains = <&ps_dispext_fe>; + apple,min-state = <4>; + }; + + ps_dptx_ext_phy: power-controller@3d8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x3d8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dptx_ext_phy"; + }; + + ps_dispdfr_fe: power-controller@3e0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x3e0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dispdfr_fe"; + power-domains = <&ps_rmx0>; + }; + + ps_dispdfr_be: power-controller@3e8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x3e8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "dispdfr_be"; + power-domains = <&ps_dispdfr_fe>; + }; + + ps_mipi_dsi: power-controller@3f0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x3f0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "mipi_dsi"; + power-domains = <&ps_dispdfr_be>; + }; + + ps_jpg: power-controller@3f8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x3f8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "jpg"; + power-domains = <&ps_cmx>; + }; + + ps_apcie_gp: power-controller@400 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x400 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie_gp"; + power-domains = <&ps_apcie>; + apple,always-on; /* Breaks things if shut down */ + }; + + ps_msr: power-controller@408 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x408 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "msr"; + power-domains = <&ps_imx>; + }; + + ps_pmp: power-controller@410 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x410 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pmp"; + apple,always-on; + }; + + ps_pms_sram: power-controller@418 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x418 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "pms_sram"; + apple,always-on; + }; + + ps_msr_ase_core: power-controller@420 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x420 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "msr_ase_core"; + power-domains = <&ps_msr>; + }; + + ps_ans: power-controller@428 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x428 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ans"; + power-domains = <&ps_imx>; + }; + + ps_gfx: power-controller@430 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x430 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "gfx"; + }; + + ps_isp_sys: power-controller@438 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x438 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "isp_sys"; + power-domains = <&ps_rmx1>; + }; + + ps_venc_sys: power-controller@440 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x440 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "venc_sys"; + power-domains = <&ps_rmx1>; + }; + + ps_avd_sys: power-controller@448 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x448 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "avd_sys"; + power-domains = <&ps_mmx>; + }; + + ps_apcie_st: power-controller@450 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x450 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "apcie_st"; + power-domains = <&ps_apcie>, <&ps_ans>; + }; + + ps_atc0_common: power-controller@458 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x458 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc0_common"; + power-domains = <&ps_imx>; + }; + + ps_atc0_pcie: power-controller@460 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x460 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc0_pcie"; + power-domains = <&ps_atc0_common>; + }; + + ps_atc0_cio: power-controller@468 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x468 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc0_cio"; + power-domains = <&ps_atc0_common>; + }; + + ps_atc0_cio_pcie: power-controller@470 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x470 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc0_cio_pcie"; + power-domains = <&ps_atc0_cio>; + }; + + ps_atc0_cio_usb: power-controller@478 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x478 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc0_cio_usb"; + power-domains = <&ps_atc0_cio>; + }; + + ps_atc1_common: power-controller@480 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x480 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc1_common"; + power-domains = <&ps_rmx0>; + }; + + ps_atc1_pcie: power-controller@488 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x488 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc1_pcie"; + power-domains = <&ps_atc1_common>; + }; + + ps_atc1_cio: power-controller@490 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x490 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc1_cio"; + power-domains = <&ps_atc1_common>; + }; + + ps_atc1_cio_pcie: power-controller@498 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x498 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc1_cio_pcie"; + power-domains = <&ps_atc1_cio>; + }; + + ps_atc1_cio_usb: power-controller@4a0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x4a0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc1_cio_usb"; + power-domains = <&ps_atc1_cio>; + }; + + ps_ane_sys: power-controller@4a8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x4a8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "ane_sys"; + power-domains = <&ps_mmx>; + }; + + ps_scodec: power-controller@4b0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x4b0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "scodec"; + power-domains = <&ps_rmx0>; + }; + + ps_sep: power-controller@c00 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xc00 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "sep"; + apple,always-on; + }; + + ps_venc_dma: power-controller@8000 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x8000 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "venc_dma"; + power-domains = <&ps_venc_sys>; + }; + + ps_venc_pipe4: power-controller@8008 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x8008 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "venc_pipe4"; + power-domains = <&ps_venc_dma>; + }; + + ps_venc_pipe5: power-controller@8010 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x8010 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "venc_pipe5"; + power-domains = <&ps_venc_dma>; + }; + + ps_venc_me0: power-controller@8018 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x8018 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "venc_me0"; + power-domains = <&ps_venc_pipe5>, <&ps_venc_pipe4>; + }; + + ps_venc_me1: power-controller@8020 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x8020 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "venc_me1"; + power-domains = <&ps_venc_pipe5>, <&ps_venc_pipe4>; + }; + + ps_disp0_cpu0: power-controller@10000 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x10000 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "disp0_cpu0"; + power-domains = <&ps_disp0_fe>; + apple,min-state = <4>; + }; +}; + +&pmgr_mini { + + ps_debug_gated: power-controller@58 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x58 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "debug_gated"; + apple,always-on; /* Core AON device */ + }; + + ps_nub_spmi0: power-controller@60 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x60 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "nub_spmi0"; + apple,always-on; /* Core AON device */ + }; + + ps_nub_spmi1: power-controller@68 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x68 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "nub_spmi1"; + apple,always-on; /* Core AON device */ + }; + + ps_nub_aon: power-controller@70 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x70 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "nub_aon"; + apple,always-on; /* Core AON device */ + }; + + ps_msg: power-controller@78 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x78 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "msg"; + }; + + ps_nub_gpio: power-controller@80 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x80 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "nub_gpio"; + apple,always-on; + }; + + ps_atc0_usb_aon: power-controller@88 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x88 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc0_usb_aon"; + apple,always-on; /* Needs to stay on for dwc3 to work */ + }; + + ps_atc1_usb_aon: power-controller@90 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x90 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc1_usb_aon"; + apple,always-on; /* Needs to stay on for dwc3 to work */ + }; + + ps_atc0_usb: power-controller@98 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x98 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc0_usb"; + power-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>; + }; + + ps_atc1_usb: power-controller@a0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xa0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "atc1_usb"; + power-domains = <&ps_atc1_usb_aon>, <&ps_atc1_common>; + }; + + ps_nub_fabric: power-controller@a8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xa8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "nub_fabric"; + apple,always-on; /* Core AON device */ + }; + + ps_nub_sram: power-controller@b0 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xb0 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "nub_sram"; + apple,always-on; /* Core AON device */ + }; + + ps_debug_switch: power-controller@b8 { + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0xb8 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "debug_switch"; + apple,always-on; /* Core AON device */ + }; +}; + diff --git a/arch/arm64/boot/dts/apple/t8112.dtsi b/arch/arm64/boot/dts/apple/t8112.dtsi new file mode 100644 index 000000000000..974443913f6a --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8112.dtsi @@ -0,0 +1,904 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T8112 "M2" SoC + * + * Other names: H14G + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include +#include + +/ { + compatible = "apple,t8112", "apple,arm-platform"; + + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu_e0>; + }; + core1 { + cpu = <&cpu_e1>; + }; + core2 { + cpu = <&cpu_e2>; + }; + core3 { + cpu = <&cpu_e3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu_p0>; + }; + core1 { + cpu = <&cpu_p1>; + }; + core2 { + cpu = <&cpu_p2>; + }; + core3 { + cpu = <&cpu_p3>; + }; + }; + }; + + cpu_e0: cpu@0 { + compatible = "apple,blizzard"; + device_type = "cpu"; + reg = <0x0 0x0>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&ecluster_opp>; + capacity-dmips-mhz = <756>; + performance-domains = <&cpufreq_e>; + next-level-cache = <&l2_cache_0>; + i-cache-size = <0x20000>; + d-cache-size = <0x10000>; + }; + + cpu_e1: cpu@1 { + compatible = "apple,blizzard"; + device_type = "cpu"; + reg = <0x0 0x1>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&ecluster_opp>; + capacity-dmips-mhz = <756>; + performance-domains = <&cpufreq_e>; + next-level-cache = <&l2_cache_0>; + i-cache-size = <0x20000>; + d-cache-size = <0x10000>; + }; + + cpu_e2: cpu@2 { + compatible = "apple,blizzard"; + device_type = "cpu"; + reg = <0x0 0x2>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&ecluster_opp>; + capacity-dmips-mhz = <756>; + performance-domains = <&cpufreq_e>; + next-level-cache = <&l2_cache_0>; + i-cache-size = <0x20000>; + d-cache-size = <0x10000>; + }; + + cpu_e3: cpu@3 { + compatible = "apple,blizzard"; + device_type = "cpu"; + reg = <0x0 0x3>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&ecluster_opp>; + capacity-dmips-mhz = <756>; + performance-domains = <&cpufreq_e>; + next-level-cache = <&l2_cache_0>; + i-cache-size = <0x20000>; + d-cache-size = <0x10000>; + }; + + cpu_p0: cpu@10100 { + compatible = "apple,avalanche"; + device_type = "cpu"; + reg = <0x0 0x10100>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&pcluster_opp>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p>; + next-level-cache = <&l2_cache_1>; + i-cache-size = <0x30000>; + d-cache-size = <0x20000>; + }; + + cpu_p1: cpu@10101 { + compatible = "apple,avalanche"; + device_type = "cpu"; + reg = <0x0 0x10101>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&pcluster_opp>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p>; + next-level-cache = <&l2_cache_1>; + i-cache-size = <0x30000>; + d-cache-size = <0x20000>; + }; + + cpu_p2: cpu@10102 { + compatible = "apple,avalanche"; + device_type = "cpu"; + reg = <0x0 0x10102>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&pcluster_opp>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p>; + next-level-cache = <&l2_cache_1>; + i-cache-size = <0x30000>; + d-cache-size = <0x20000>; + }; + + cpu_p3: cpu@10103 { + compatible = "apple,avalanche"; + device_type = "cpu"; + reg = <0x0 0x10103>; + enable-method = "spin-table"; + cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&pcluster_opp>; + capacity-dmips-mhz = <1024>; + performance-domains = <&cpufreq_p>; + next-level-cache = <&l2_cache_1>; + i-cache-size = <0x30000>; + d-cache-size = <0x20000>; + }; + + l2_cache_0: l2-cache-0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x400000>; + }; + + l2_cache_1: l2-cache-1 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x1000000>; + }; + }; + + ecluster_opp: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-level = <1>; + clock-latency-ns = <7500>; + }; + opp02 { + opp-hz = /bits/ 64 <912000000>; + opp-level = <2>; + clock-latency-ns = <20000>; + }; + opp03 { + opp-hz = /bits/ 64 <1284000000>; + opp-level = <3>; + clock-latency-ns = <22000>; + }; + opp04 { + opp-hz = /bits/ 64 <1752000000>; + opp-level = <4>; + clock-latency-ns = <30000>; + }; + opp05 { + opp-hz = /bits/ 64 <2004000000>; + opp-level = <5>; + clock-latency-ns = <35000>; + }; + opp06 { + opp-hz = /bits/ 64 <2256000000>; + opp-level = <6>; + clock-latency-ns = <39000>; + }; + opp07 { + opp-hz = /bits/ 64 <2424000000>; + opp-level = <7>; + clock-latency-ns = <53000>; + }; + }; + + pcluster_opp: opp-table-1 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <660000000>; + opp-level = <1>; + clock-latency-ns = <9000>; + }; + opp02 { + opp-hz = /bits/ 64 <924000000>; + opp-level = <2>; + clock-latency-ns = <19000>; + }; + opp03 { + opp-hz = /bits/ 64 <1188000000>; + opp-level = <3>; + clock-latency-ns = <22000>; + }; + opp04 { + opp-hz = /bits/ 64 <1452000000>; + opp-level = <4>; + clock-latency-ns = <24000>; + }; + opp05 { + opp-hz = /bits/ 64 <1704000000>; + opp-level = <5>; + clock-latency-ns = <26000>; + }; + opp06 { + opp-hz = /bits/ 64 <1968000000>; + opp-level = <6>; + clock-latency-ns = <28000>; + }; + opp07 { + opp-hz = /bits/ 64 <2208000000>; + opp-level = <7>; + clock-latency-ns = <30000>; + }; + opp08 { + opp-hz = /bits/ 64 <2400000000>; + opp-level = <8>; + clock-latency-ns = <33000>; + }; + opp09 { + opp-hz = /bits/ 64 <2568000000>; + opp-level = <9>; + clock-latency-ns = <34000>; + }; + opp10 { + opp-hz = /bits/ 64 <2724000000>; + opp-level = <10>; + clock-latency-ns = <36000>; + }; + opp11 { + opp-hz = /bits/ 64 <2868000000>; + opp-level = <11>; + clock-latency-ns = <41000>; + }; + opp12 { + opp-hz = /bits/ 64 <2988000000>; + opp-level = <12>; + clock-latency-ns = <42000>; + }; + opp13 { + opp-hz = /bits/ 64 <3096000000>; + opp-level = <13>; + clock-latency-ns = <44000>; + }; + opp14 { + opp-hz = /bits/ 64 <3204000000>; + opp-level = <14>; + clock-latency-ns = <46000>; + }; + /* Not available until CPU deep sleep is implemented */ +#if 0 + opp15 { + opp-hz = /bits/ 64 <3324000000>; + opp-level = <15>; + clock-latency-ns = <62000>; + turbo-mode; + }; + opp16 { + opp-hz = /bits/ 64 <3408000000>; + opp-level = <16>; + clock-latency-ns = <62000>; + turbo-mode; + }; + opp17 { + opp-hz = /bits/ 64 <3504000000>; + opp-level = <17>; + clock-latency-ns = <62000>; + turbo-mode; + }; +#endif + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&aic>; + interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt"; + interrupts = , + , + , + ; + }; + + pmu-e { + compatible = "apple,blizzard-pmu"; + interrupt-parent = <&aic>; + interrupts = ; + }; + + pmu-p { + compatible = "apple,avalanche-pmu"; + interrupt-parent = <&aic>; + interrupts = ; + }; + + clkref: clock-ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "clkref"; + }; + + /* + * This is a fabulated representation of the input clock + * to NCO since we don't know the true clock tree. + */ + nco_clkref: clock-ref-nco { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "nco_ref"; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + + ranges; + nonposted-mmio; + + cpufreq_e: cpufreq@210e20000 { + compatible = "apple,t8112-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x10e20000 0 0x1000>; + #performance-domain-cells = <0>; + }; + + cpufreq_p: cpufreq@211e20000 { + compatible = "apple,t8112-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x11e20000 0 0x1000>; + #performance-domain-cells = <0>; + }; + + sio_dart: iommu@235004000 { + compatible = "apple,t8110-dart"; + reg = <0x2 0x35004000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + power-domains = <&ps_sio_cpu>; + }; + + i2c0: i2c@235010000 { + compatible = "apple,t8112-i2c", "apple,i2c"; + reg = <0x2 0x35010000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + #address-cells = <0x1>; + #size-cells = <0x0>; + power-domains = <&ps_i2c0>; + status = "disabled"; + }; + + i2c1: i2c@235014000 { + compatible = "apple,t8112-i2c", "apple,i2c"; + reg = <0x2 0x35014000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + #address-cells = <0x1>; + #size-cells = <0x0>; + power-domains = <&ps_i2c1>; + status = "disabled"; + }; + + i2c2: i2c@235018000 { + compatible = "apple,t8112-i2c", "apple,i2c"; + reg = <0x2 0x35018000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + #address-cells = <0x1>; + #size-cells = <0x0>; + power-domains = <&ps_i2c2>; + status = "disabled"; + }; + + i2c3: i2c@23501c000 { + compatible = "apple,t8112-i2c", "apple,i2c"; + reg = <0x2 0x3501c000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + #address-cells = <0x1>; + #size-cells = <0x0>; + power-domains = <&ps_i2c3>; + status = "disabled"; + }; + + i2c4: i2c@235020000 { + compatible = "apple,t8112-i2c", "apple,i2c"; + reg = <0x2 0x35020000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; + #address-cells = <0x1>; + #size-cells = <0x0>; + power-domains = <&ps_i2c4>; + status = "disabled"; + }; + + serial0: serial@235200000 { + compatible = "apple,s5l-uart"; + reg = <0x2 0x35200000 0x0 0x1000>; + reg-io-width = <4>; + interrupt-parent = <&aic>; + interrupts = ; + /* + * TODO: figure out the clocking properly, there may + * be a third selectable clock. + */ + clocks = <&clkref>, <&clkref>; + clock-names = "uart", "clk_uart_baud0"; + power-domains = <&ps_uart0>; + status = "disabled"; + }; + + serial2: serial@235208000 { + compatible = "apple,s5l-uart"; + reg = <0x2 0x35208000 0x0 0x1000>; + reg-io-width = <4>; + interrupt-parent = <&aic>; + interrupts = ; + clocks = <&clkref>, <&clkref>; + clock-names = "uart", "clk_uart_baud0"; + power-domains = <&ps_uart2>; + status = "disabled"; + }; + + admac: dma-controller@238200000 { + compatible = "apple,t8112-admac", "apple,admac"; + reg = <0x2 0x38200000 0x0 0x34000>; + dma-channels = <24>; + interrupts-extended = <0>, + <&aic AIC_IRQ 760 IRQ_TYPE_LEVEL_HIGH>, + <0>, + <0>; + #dma-cells = <1>; + iommus = <&sio_dart 2>; + power-domains = <&ps_sio_adma>; + resets = <&ps_audio_p>; + }; + + mca: i2s@238400000 { + compatible = "apple,t8112-mca", "apple,mca"; + reg = <0x2 0x38400000 0x0 0x18000>, + <0x2 0x38300000 0x0 0x30000>; + + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + ; + + resets = <&ps_audio_p>; + clocks = <&nco 0>, <&nco 1>, <&nco 2>, + <&nco 3>, <&nco 4>, <&nco 4>; + power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>, + <&ps_mca2>, <&ps_mca3>, <&ps_mca4>, <&ps_mca5>; + dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>, + <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>, + <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>, + <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>, + <&admac 16>, <&admac 17>, <&admac 18>, <&admac 19>, + <&admac 20>, <&admac 21>, <&admac 22>, <&admac 23>; + dma-names = "tx0a", "rx0a", "tx0b", "rx0b", + "tx1a", "rx1a", "tx1b", "rx1b", + "tx2a", "rx2a", "tx2b", "rx2b", + "tx3a", "rx3a", "tx3b", "rx3b", + "tx4a", "rx4a", "tx4b", "rx4b", + "tx5a", "rx5a", "tx5b", "rx5b"; + + #sound-dai-cells = <1>; + }; + + nco: clock-controller@23b044000 { + compatible = "apple,t8112-nco", "apple,nco"; + reg = <0x2 0x3b044000 0x0 0x14000>; + clocks = <&nco_clkref>; + #clock-cells = <1>; + }; + + aic: interrupt-controller@23b0c0000 { + compatible = "apple,t8112-aic", "apple,aic2"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x2 0x3b0c0000 0x0 0x8000>, + <0x2 0x3b0c8000 0x0 0x4>; + reg-names = "core", "event"; + power-domains = <&ps_aic>; + + affinities { + e-core-pmu-affinity { + apple,fiq-index = ; + cpus = <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3>; + }; + + p-core-pmu-affinity { + apple,fiq-index = ; + cpus = <&cpu_p0 &cpu_p1 &cpu_p2 &cpu_p3>; + }; + }; + }; + + pmgr: power-management@23b700000 { + compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2 0x3b700000 0 0x14000>; + }; + + pinctrl_ap: pinctrl@23c100000 { + compatible = "apple,t8112-pinctrl", "apple,pinctrl"; + reg = <0x2 0x3c100000 0x0 0x100000>; + power-domains = <&ps_gpio>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_ap 0 0 213>; + apple,npins = <213>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + + i2c0_pins: i2c0-pins { + pinmux = , + ; + }; + + i2c1_pins: i2c1-pins { + pinmux = , + ; + }; + + i2c2_pins: i2c2-pins { + pinmux = , + ; + }; + + i2c3_pins: i2c3-pins { + pinmux = , + ; + }; + + i2c4_pins: i2c4-pins { + pinmux = , + ; + }; + + spi3_pins: spi3-pins { + pinmux = , + , + , + ; + }; + + pcie_pins: pcie-pins { + pinmux = , + , + ; + // TODO: 1 more CLKREQs + }; + }; + + pinctrl_nub: pinctrl@23d1f0000 { + compatible = "apple,t8112-pinctrl", "apple,pinctrl"; + reg = <0x2 0x3d1f0000 0x0 0x4000>; + power-domains = <&ps_nub_gpio>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_nub 0 0 24>; + apple,npins = <24>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + }; + + pmgr_mini: power-management@23d280000 { + compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2 0x3d280000 0 0x4000>; + }; + + wdt: watchdog@23d2b0000 { + compatible = "apple,t8112-wdt", "apple,wdt"; + reg = <0x2 0x3d2b0000 0x0 0x4000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + }; + + pinctrl_smc: pinctrl@23e820000 { + compatible = "apple,t8112-pinctrl", "apple,pinctrl"; + reg = <0x2 0x3e820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_smc 0 0 18>; + apple,npins = <18>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@24a820000 { + compatible = "apple,t8112-pinctrl", "apple,pinctrl"; + reg = <0x2 0x4a820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_aop 0 0 54>; + apple,npins = <54>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + }; + + ans_mbox: mbox@277408000 { + compatible = "apple,t8112-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x2 0x77408000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + power-domains = <&ps_ans>; + }; + + sart: sart@27bc50000 { + compatible = "apple,t8112-sart", "apple,t6000-sart"; + reg = <0x2 0x7bc50000 0x0 0x10000>; + power-domains = <&ps_ans>; + }; + + nvme@27bcc0000 { + compatible = "apple,t8112-nvme-ans2", "apple,nvme-ans2"; + reg = <0x2 0x7bcc0000 0x0 0x40000>, + <0x2 0x77400000 0x0 0x4000>; + reg-names = "nvme", "ans"; + interrupt-parent = <&aic>; + interrupts = ; + mboxes = <&ans_mbox>; + apple,sart = <&sart>; + power-domains = <&ps_ans>, <&ps_apcie_st>; + power-domain-names = "ans", "apcie0"; + resets = <&ps_ans>; + }; + + pcie0_dart: iommu@681008000 { + compatible = "apple,t8110-dart"; + reg = <0x6 0x81008000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_apcie_gp>; + }; + + pcie1_dart: iommu@682008000 { + compatible = "apple,t8110-dart"; + reg = <0x6 0x82008000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_apcie_gp>; + status = "disabled"; + }; + + pcie2_dart: iommu@683008000 { + compatible = "apple,t8110-dart"; + reg = <0x6 0x83008000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_apcie_gp>; + status = "disabled"; + }; + + pcie3_dart: iommu@684008000 { + compatible = "apple,t8110-dart"; + reg = <0x6 0x84008000 0x0 0x4000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + power-domains = <&ps_apcie_gp>; + status = "disabled"; + }; + + pcie0: pcie@690000000 { + compatible = "apple,t8112-pcie", "apple,pcie"; + device_type = "pci"; + + reg = <0x6 0x90000000 0x0 0x1000000>, + <0x6 0x80000000 0x0 0x100000>, + <0x6 0x81000000 0x0 0x4000>, + <0x6 0x82000000 0x0 0x4000>, + <0x6 0x83000000 0x0 0x4000>, + <0x6 0x84000000 0x0 0x4000>; + reg-names = "config", "rc", "port0", "port1", "port2", "port3"; + + interrupt-parent = <&aic>; + interrupts = , + , + , + ; + + msi-controller; + msi-parent = <&pcie0>; + msi-ranges = <&aic AIC_IRQ 793 IRQ_TYPE_EDGE_RISING 32>; + + iommu-map = <0x100 &pcie0_dart 0 1>, + <0x200 &pcie1_dart 1 1>, + <0x300 &pcie2_dart 2 1>, + <0x400 &pcie3_dart 3 1>; + iommu-map-mask = <0xff00>; + + bus-range = <0 4>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>, + <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>; + + power-domains = <&ps_apcie_gp>; + pinctrl-0 = <&pcie_pins>; + pinctrl-names = "default"; + + port00: pci@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + reset-gpios = <&pinctrl_ap 166 GPIO_ACTIVE_LOW>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &port00 0 0 0 0>, + <0 0 0 2 &port00 0 0 0 1>, + <0 0 0 3 &port00 0 0 0 2>, + <0 0 0 4 &port00 0 0 0 3>; + }; + + port01: pci@1,0 { + device_type = "pci"; + reg = <0x800 0x0 0x0 0x0 0x0>; + reset-gpios = <&pinctrl_ap 167 GPIO_ACTIVE_LOW>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &port01 0 0 0 0>, + <0 0 0 2 &port01 0 0 0 1>, + <0 0 0 3 &port01 0 0 0 2>, + <0 0 0 4 &port01 0 0 0 3>; + }; + + port02: pci@2,0 { + device_type = "pci"; + reg = <0x1000 0x0 0x0 0x0 0x0>; + reset-gpios = <&pinctrl_ap 168 GPIO_ACTIVE_LOW>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &port02 0 0 0 0>, + <0 0 0 2 &port02 0 0 0 1>, + <0 0 0 3 &port02 0 0 0 2>, + <0 0 0 4 &port02 0 0 0 3>; + }; + + /* TODO: GPIO unknown */ + port03: pci@3,0 { + device_type = "pci"; + reg = <0x1800 0x0 0x0 0x0 0x0>; + //reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &port03 0 0 0 0>, + <0 0 0 2 &port03 0 0 0 1>, + <0 0 0 3 &port03 0 0 0 2>, + <0 0 0 4 &port03 0 0 0 3>; + }; + }; + }; +}; + +#include "t8112-pmgr.dtsi"