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Sat, 11 Feb 2023 21:15:31 -0500 (EST) From: Samuel Holland To: Heiko Stuebner , Jisheng Zhang , Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Samuel Holland , Andrew Jones , Christoph Muellner , Conor Dooley , Guo Ren , Heiko Stuebner , Nathan Chancellor , linux-kernel@vger.kernel.org Subject: [PATCH 1/2] riscv: Fix early alternative patching Date: Sat, 11 Feb 2023 20:15:32 -0600 Message-Id: <20230212021534.59121-2-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20230212021534.59121-1-samuel@sholland.org> References: <20230212021534.59121-1-samuel@sholland.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757591837872169020?= X-GMAIL-MSGID: =?utf-8?q?1757591837872169020?= Now that the text to patch is located using a relative offset from the alternative entry, the text address should be computed without applying the kernel mapping offset, both before and after VM setup. Fixes: 8d23e94a4433 ("riscv: switch to relative alternative entries") Signed-off-by: Samuel Holland Reviewed-by: Conor Dooley Reviewed-by: Guo Ren Reviewed-by: Jisheng Zhang --- arch/riscv/errata/thead/errata.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c index c0bea5c94128..1dd90a5f86f0 100644 --- a/arch/riscv/errata/thead/errata.c +++ b/arch/riscv/errata/thead/errata.c @@ -102,9 +102,7 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al /* On vm-alternatives, the mmu isn't running yet */ if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) - memcpy((void *)__pa_symbol(oldptr), - (void *)__pa_symbol(altptr), - alt->alt_len); + memcpy(oldptr, altptr, alt->alt_len); else patch_text_nosync(oldptr, altptr, alt->alt_len); } From patchwork Sun Feb 12 02:15:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 55873 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1743232wrn; Sat, 11 Feb 2023 18:42:17 -0800 (PST) X-Google-Smtp-Source: AK7set861E80PZ7zhS/HDo7ynBJUyNAs3p/No5ImEBW1wu0gdQ3nfkG/VDSkeHN0OHWgAYQiBTYJ X-Received: by 2002:aa7:943b:0:b0:5a7:6568:2a09 with SMTP id y27-20020aa7943b000000b005a765682a09mr16301152pfo.2.1676169737442; Sat, 11 Feb 2023 18:42:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676169737; cv=none; d=google.com; s=arc-20160816; b=fVroCAChD3emcL/sEwivy1E83WpwZ1j1nF+iW5PjyVvCyjsXK0+Lv7MblpHSba4poU Od6XhcOFVkf1lDelDxE2VQOIPLqt9dPphuh7Syoi2FliPuRtWVfTKLM+DU2JwgnlFaJ5 BxaIcnNuCLDWyOkRXlBvnGY9raTydSnFBNPGt56L7DNZdWMUW1LbjegPchMv3Q+WCtVC bJ3m3rHr1eUtJJZdyBJGIygk19V2YLgiwooiMKkcEm7tmqvVkDsJ5RC4lPbd4nVmWz4V gQfDXQWEOPkwQ0vZd6NiJy0+hh1W9GwCFsbQcovhU1IpecYVU33lC7WCCmsXBX0avny4 KtsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :feedback-id:dkim-signature:dkim-signature; bh=Uq5aQpvzKMkJKSQwmWMMR9mZ/TQ6KPX7R/4xIPuGG1g=; b=oeuQZQAkgdwDEPQWvph5yJ5oFerpgRPTrxu5oxg7W57Isac+TGt4/r88Y2iZOVkb/a pjCrH9iMRVMElrDnt3cCSXIaTiIG2wstG2BQM4Pgn8v9l6Wp8E6TEXfSB6G5JPg6KujX GQ7YQiut4sel5gEJ0YBeh3F4bDsCxKdA9FtkozPU8HYwDkzZb4TwlE/pU1lSsOxBngVv VvpT+JEO+Z2TlmhBhmEgoc1hlPtA0vC7xdNq9n+SJT7p1lOFav6UpyKYYnW0zFMVodg2 dPxShFsWQXS2Eh+eZK0eNnUqi/9pSv0UMX8vc+alF0nKbINrtgKjdVxDZQ40DuELuJf5 y7Pg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sholland.org header.s=fm2 header.b=OFVr68Ci; dkim=pass header.i=@messagingengine.com header.s=fm1 header.b="RB/lFibS"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sholland.org Received: from out1.vger.email (out1.vger.email. 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Sat, 11 Feb 2023 21:15:32 -0500 (EST) From: Samuel Holland To: Heiko Stuebner , Jisheng Zhang , Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Samuel Holland , Andrew Jones , Christoph Muellner , Conor Dooley , Guo Ren , Heiko Stuebner , Nathan Chancellor , linux-kernel@vger.kernel.org Subject: [PATCH 2/2] riscv: Fix Zbb alternative IDs Date: Sat, 11 Feb 2023 20:15:33 -0600 Message-Id: <20230212021534.59121-3-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20230212021534.59121-1-samuel@sholland.org> References: <20230212021534.59121-1-samuel@sholland.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757591358794928613?= X-GMAIL-MSGID: =?utf-8?q?1757591358794928613?= Commit 4bf8860760d9 ("riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions") switched ISA extension alternatives to use the RISCV_ISA_EXT_* macros instead of CPUFEATURE_*. This was mismerged when applied on top of the Zbb series, so the Zbb alternatives referenced the wrong errata ID values. Fixes: 9daca9a5b9ac ("Merge patch series "riscv: improve boot time isa extensions handling"") Signed-off-by: Samuel Holland Reviewed-by: Conor Dooley Reviewed-by: Andrew Jones Reviewed-by: Guo Ren --- arch/riscv/include/asm/errata_list.h | 5 ----- arch/riscv/lib/strcmp.S | 2 +- arch/riscv/lib/strlen.S | 2 +- arch/riscv/lib/strncmp.S | 2 +- 4 files changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h index e158439029ce..274c6f889602 100644 --- a/arch/riscv/include/asm/errata_list.h +++ b/arch/riscv/include/asm/errata_list.h @@ -23,11 +23,6 @@ #define ERRATA_THEAD_NUMBER 3 #endif -#define CPUFEATURE_SVPBMT 0 -#define CPUFEATURE_ZICBOM 1 -#define CPUFEATURE_ZBB 2 -#define CPUFEATURE_NUMBER 3 - #ifdef __ASSEMBLY__ #define ALT_INSN_FAULT(x) \ diff --git a/arch/riscv/lib/strcmp.S b/arch/riscv/lib/strcmp.S index 8148b6418f61..986ab23fe787 100644 --- a/arch/riscv/lib/strcmp.S +++ b/arch/riscv/lib/strcmp.S @@ -9,7 +9,7 @@ /* int strcmp(const char *cs, const char *ct) */ SYM_FUNC_START(strcmp) - ALTERNATIVE("nop", "j strcmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) + ALTERNATIVE("nop", "j strcmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) /* * Returns diff --git a/arch/riscv/lib/strlen.S b/arch/riscv/lib/strlen.S index 0f9dbf93301a..8345ceeee3f6 100644 --- a/arch/riscv/lib/strlen.S +++ b/arch/riscv/lib/strlen.S @@ -9,7 +9,7 @@ /* int strlen(const char *s) */ SYM_FUNC_START(strlen) - ALTERNATIVE("nop", "j strlen_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) + ALTERNATIVE("nop", "j strlen_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) /* * Returns diff --git a/arch/riscv/lib/strncmp.S b/arch/riscv/lib/strncmp.S index 7940ddab2d48..ee49595075be 100644 --- a/arch/riscv/lib/strncmp.S +++ b/arch/riscv/lib/strncmp.S @@ -9,7 +9,7 @@ /* int strncmp(const char *cs, const char *ct, size_t count) */ SYM_FUNC_START(strncmp) - ALTERNATIVE("nop", "j strncmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) + ALTERNATIVE("nop", "j strncmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) /* * Returns