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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q10-20020a656a8a000000b004fabdc5c7c3si422181pgu.495.2023.02.08.17.26.21; Wed, 08 Feb 2023 17:26:35 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=nh0NFJxV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231262AbjBIBPH (ORCPT + 99 others); Wed, 8 Feb 2023 20:15:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231273AbjBIBPC (ORCPT ); Wed, 8 Feb 2023 20:15:02 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F84544AF; Wed, 8 Feb 2023 17:15:01 -0800 (PST) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3191B5M3023926; Thu, 9 Feb 2023 01:14:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=GGCDrD1fRQVfqryQDH4mh5EfzTuBkKy/vEkm/guCnlE=; b=nh0NFJxV781jpUxOZ/zheJQ7zF9/rA5/Lle/srpNOS6PWOgJP2qMF4/K8Blo6FQoyzQD wFwAzUNJ+3o1PhLFSQlOnBXST21rl2RsAYH4gLeLU13+CaaerNaWWn7jFdNFu1ElXajM 0j85OAwBRcYOJXC1GPdaqvbT2Xqf+V97Fmo2tKclADWnUMG3udYneFZKij3F3cPxDqUc MOBC0Tpp3yOxotf4yefcn4yWUy5jwv++qV7Lw2kh5jETE7VuiErlkafFLO4NiSqWiAcV EqBOB1VsXBa+o1xGZjGZkJVeT73nUn47DMBGE0SqoW7EYTJqsqrcVh4EUt5zacZhhxPr 1Q== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3nmpte00qa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Feb 2023 01:14:47 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3191Ei1W015201 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 9 Feb 2023 01:14:46 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 8 Feb 2023 17:14:37 -0800 From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Konrad Dybcio CC: Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon , , , , Subject: [PATCH v2 1/4] arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks Date: Wed, 8 Feb 2023 17:13:22 -0800 Message-ID: <20230209011325.2603663-2-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230209011325.2603663-1-quic_bjorande@quicinc.com> References: <20230209011325.2603663-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: KBOUpnqa27xb8QHoblXhW12aBeI8QaCJ X-Proofpoint-ORIG-GUID: KBOUpnqa27xb8QHoblXhW12aBeI8QaCJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-08_11,2023-02-08_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 mlxlogscore=999 malwarescore=0 spamscore=0 adultscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302090009 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757314804961195951?= X-GMAIL-MSGID: =?utf-8?q?1757314804961195951?= From: Bjorn Andersson Add the two DisplayPort controllers that are attached to QMP phys for providing display output on USB Type-C. Signed-off-by: Bjorn Andersson Signed-off-by: Bjorn Andersson --- Changes since v1: - None arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 170 ++++++++++++++++++++++++- 1 file changed, 166 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index dceb7eb3106b..fcd393444f47 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3155,6 +3155,20 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + mdss0_intf0_out: endpoint { + remote-endpoint = <&mdss0_dp0_in>; + }; + }; + + port@4 { + reg = <4>; + mdss0_intf4_out: endpoint { + remote-endpoint = <&mdss0_dp1_in>; + }; + }; + port@5 { reg = <5>; mdss0_intf5_out: endpoint { @@ -3199,6 +3213,154 @@ opp-600000000 { }; }; + mdss0_dp0: displayport-controller@ae90000 { + compatible = "qcom,sc8280xp-dp"; + reg = <0 0xae90000 0 0x200>, + <0 0xae90200 0 0x200>, + <0 0xae90400 0 0x600>, + <0 0xae91000 0 0x400>, + <0 0xae91400 0 0x400>; + interrupt-parent = <&mdss0>; + interrupts = <12>; + clocks = <&dispcc0 DISP_CC_MDSS_AHB_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX0_AUX_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>; + clock-names = "core_iface", "core_aux", + "ctrl_link", + "ctrl_link_iface", "stream_pixel"; + + assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>, + <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>; + assigned-clock-parents = <&usb_0_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys = <&usb_0_qmpphy QMP_USB43DP_DP_PHY>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + operating-points-v2 = <&mdss0_dp0_opp_table>; + power-domains = <&rpmhpd SC8280XP_CX>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss0_dp0_in: endpoint { + remote-endpoint = <&mdss0_intf0_out>; + }; + }; + + port@1 { + reg = <1>; + }; + }; + + mdss0_dp0_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + + mdss0_dp1: displayport-controller@ae98000 { + compatible = "qcom,sc8280xp-dp"; + reg = <0 0xae98000 0 0x200>, + <0 0xae98200 0 0x200>, + <0 0xae98400 0 0x600>, + <0 0xae99000 0 0x400>, + <0 0xae99400 0 0x400>; + interrupt-parent = <&mdss0>; + interrupts = <13>; + clocks = <&dispcc0 DISP_CC_MDSS_AHB_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX1_AUX_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>, + <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>; + clock-names = "core_iface", "core_aux", + "ctrl_link", + "ctrl_link_iface", "stream_pixel"; + + assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>, + <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>; + assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + operating-points-v2 = <&mdss0_dp1_opp_table>; + power-domains = <&rpmhpd SC8280XP_CX>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss0_dp1_in: endpoint { + remote-endpoint = <&mdss0_intf4_out>; + }; + }; + + port@1 { + reg = <1>; + }; + }; + + mdss0_dp1_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + mdss0_dp2: displayport-controller@ae9a000 { compatible = "qcom,sc8280xp-dp"; reg = <0 0xae9a000 0 0x200>, @@ -3387,10 +3549,10 @@ dispcc0: clock-controller@af00000 { clocks = <&gcc GCC_DISP_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>, - <0>, - <0>, - <0>, - <0>, + <&usb_0_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <&mdss0_dp2_phy 0>, <&mdss0_dp2_phy 1>, <&mdss0_dp3_phy 0>, From patchwork Thu Feb 9 01:13:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 54657 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp51903wrn; Wed, 8 Feb 2023 17:24:47 -0800 (PST) X-Google-Smtp-Source: AK7set9JBCu5fWjDSWXYyhgGzrUHGS+VRnbhgQRupWfjIlqgeh7b8/Kd48cl4SBHu0Q8Y5xP9l3Q X-Received: by 2002:a17:902:d48a:b0:196:6308:c9d3 with SMTP id c10-20020a170902d48a00b001966308c9d3mr10230188plg.0.1675905887371; Wed, 08 Feb 2023 17:24:47 -0800 (PST) ARC-Seal: i=1; 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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q10-20020a656a8a000000b004fabdc5c7c3si422181pgu.495.2023.02.08.17.24.31; Wed, 08 Feb 2023 17:24:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=RVHm4rGD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231289AbjBIBPF (ORCPT + 99 others); Wed, 8 Feb 2023 20:15:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231262AbjBIBPB (ORCPT ); Wed, 8 Feb 2023 20:15:01 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D4312112; Wed, 8 Feb 2023 17:15:00 -0800 (PST) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 318NtCrE002600; Thu, 9 Feb 2023 01:14:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=Gefn7U10FjXoZFMeGM4wlvJm5FR6Qk3g5g9TG7UvIb0=; b=RVHm4rGDVYnOyEECoC31eIx9F3cR5TV0LjSb2dQvIXJ18T9QzLBtNrpMBCQQo7igrjqh E5LXZWj94iwlUU/8/KYts8uXDB46hekL5m4SVtzyELceLBSk9rTo+/s8cSmjgxwdCxM1 +u0cWtGrso7gPY/hWcknLd/HIWQaXPADV58tBKBMA2MAKAHzaaI5owBo1+YxQtschcsM Ctn3Z02gYnAs3T32Ih1P2Er7W0oqKhAQ9+ryl32Nb0+AMbCU36q2Ew5qsbEwKPkNGn+W HkkTkBAT293BHIocSw8uMAI6xBioktD2gCUmm7PcARqINjWuk9dlii6v1m8+cz0V+Zeq ag== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3nm7u8abdb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Feb 2023 01:14:47 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3191Ei1Z015201 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 9 Feb 2023 01:14:46 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 8 Feb 2023 17:14:44 -0800 From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Konrad Dybcio CC: Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon , , , , Subject: [PATCH v2 2/4] arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink Date: Wed, 8 Feb 2023 17:13:23 -0800 Message-ID: <20230209011325.2603663-3-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230209011325.2603663-1-quic_bjorande@quicinc.com> References: <20230209011325.2603663-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ePCZzepJxsWrxPVqeyfTMrXFuTLOUcGr X-Proofpoint-ORIG-GUID: ePCZzepJxsWrxPVqeyfTMrXFuTLOUcGr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-08_11,2023-02-08_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxscore=0 mlxlogscore=999 bulkscore=0 priorityscore=1501 spamscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302090010 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757314691646028871?= X-GMAIL-MSGID: =?utf-8?q?1757314691646028871?= From: Bjorn Andersson The SC8280XP CRD control over battery management and its two USB Type-C port using pmic_glink and two GPIO-based SBU muxes. Enable the two DisplayPort instances, GPIO SBU mux instance and pmic_glink with the two connectors on the CRD. Signed-off-by: Bjorn Andersson Signed-off-by: Bjorn Andersson --- Changes since v1: - Fixed style and property sort issues - Moved dwc3/port to sc8280xp.dtsi, override remote-endpoint here - Added pinconf properties to SBU control pins arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 200 +++++++++++++++++++++- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 9 + 2 files changed, 207 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 3f116a879e22..d2276b28b5db 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -36,6 +36,78 @@ chosen { stdout-path = "serial0:115200n8"; }; + pmic-glink { + compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink"; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + pmic_glink_con0_hs: endpoint { + remote-endpoint = <&usb_0_role_switch>; + }; + }; + + port@1 { + reg = <1>; + pmic_glink_con0_ss: endpoint { + remote-endpoint = <&mdss0_dp0_out>; + }; + }; + + port@2 { + reg = <2>; + pmic_glink_con0_sbu: endpoint { + remote-endpoint = <&usb0_sbu_mux>; + }; + }; + }; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + pmic_glink_con1_hs: endpoint { + remote-endpoint = <&usb_1_role_switch>; + }; + }; + + port@1 { + reg = <1>; + pmic_glink_con1_ss: endpoint { + remote-endpoint = <&mdss0_dp1_out>; + }; + }; + + port@2 { + reg = <2>; + pmic_glink_con1_sbu: endpoint { + remote-endpoint = <&usb1_sbu_mux>; + }; + }; + }; + }; + }; + vreg_edp_3p3: regulator-edp-3p3 { compatible = "regulator-fixed"; @@ -139,6 +211,46 @@ linux,cma { linux,cma-default; }; }; + + usb0-sbu-mux { + compatible = "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb0_sbu_default>; + + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + port { + usb0_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_con0_sbu>; + }; + }; + }; + + usb1-sbu-mux { + compatible = "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb1_sbu_default>; + + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + port { + usb1_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_con1_sbu>; + }; + }; + }; }; &apps_rsc { @@ -262,6 +374,34 @@ &mdss0 { status = "okay"; }; +&mdss0_dp0 { + data-lanes = <0 1>; + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss0_dp0_out: endpoint { + remote-endpoint = <&pmic_glink_con0_ss>; + }; + }; + }; +}; + +&mdss0_dp1 { + data-lanes = <0 1>; + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss0_dp1_out: endpoint { + remote-endpoint = <&pmic_glink_con1_ss>; + }; + }; + }; +}; + &mdss0_dp3 { compatible = "qcom,sc8280xp-edp"; /delete-property/ #sound-dai-cells; @@ -480,7 +620,6 @@ &usb_0 { }; &usb_0_dwc3 { - /* TODO: Define USB-C connector properly */ dr_mode = "host"; }; @@ -499,12 +638,15 @@ &usb_0_qmpphy { status = "okay"; }; +&usb_0_role_switch { + remote-endpoint = <&pmic_glink_con0_hs>; +}; + &usb_1 { status = "okay"; }; &usb_1_dwc3 { - /* TODO: Define USB-C connector properly */ dr_mode = "host"; }; @@ -523,6 +665,10 @@ &usb_1_qmpphy { status = "okay"; }; +&usb_1_role_switch { + remote-endpoint = <&pmic_glink_con1_hs>; +}; + &xo_board_clk { clock-frequency = <38400000>; }; @@ -709,4 +855,54 @@ reset-n-pins { drive-strength = <16>; }; }; + + usb0_sbu_default: usb0-sbu-state { + oe-n-pins { + pins = "gpio101"; + function = "gpio"; + bias-disable; + drive-strengh = <16>; + output-high; + }; + + sel-pins { + pins = "gpio164"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + }; + + mode-pins { + pins = "gpio167"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + output-high; + }; + }; + + usb1_sbu_default: usb1-sbu-state { + oe-n-pins { + pins = "gpio48"; + function = "gpio"; + bias-disable; + drive-strengh = <16>; + output-high; + }; + + sel-pins { + pins = "gpio47"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + }; + + mode-pins { + pins = "gpio50"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + output-high; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index fcd393444f47..0495361fc0fd 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3040,6 +3040,11 @@ usb_0_dwc3: usb@a600000 { iommus = <&apps_smmu 0x820 0x0>; phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + + port { + usb_0_role_switch: endpoint { + }; + }; }; }; @@ -3095,6 +3100,10 @@ usb_1_dwc3: usb@a800000 { iommus = <&apps_smmu 0x860 0x0>; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + port { + usb_1_role_switch: endpoint { + }; + }; }; }; From patchwork Thu Feb 9 01:13:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 54659 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp53799wrn; Wed, 8 Feb 2023 17:29:05 -0800 (PST) X-Google-Smtp-Source: AK7set8miqoc+QFanMaoGNnx5fCXtFE1o0EJe+KTaKQfxDaJMgh+V3yAIGwwesEG56Cxns6Nin2Y X-Received: by 2002:a05:6a20:8e19:b0:b8:84d2:f9aa with SMTP id y25-20020a056a208e1900b000b884d2f9aamr6257098pzj.2.1675906145634; Wed, 08 Feb 2023 17:29:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675906145; cv=none; d=google.com; s=arc-20160816; b=IzFOazs/liJfxNqCZIIqe8IPYaGjJaPsvBOgrzNADETagHBvk84jQdZUIwsgVD5r/B 9mEGzsvpTzYVc05+o7jEN23hAk0AlYaY/5KdJqAhX1SMKJfFvj/6W1SM5zM24kc0EsFF WYrT+C8OaTv9LZxKNmVheX6i7EIes+OrYN1r0WPhHXr5sGFf19yEccbg/LZOxoucKr4f NP4+dQT2ELtgi9BGFMBfUreDOyH48aJD4IX1GljH1qdL5i4GyTvDFip1nu+s4voawVWg j5IuD58Eg2Qzlxb6+A6NvPDUEsYrvEEaurgCrkjbxyrS/OkWqCf9IM8ql+D4MxbSqnkL eYpw== ARC-Message-Signature: i=1; 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Signed-off-by: Bjorn Andersson --- Changes since v1: - Fixed style and property sort issues - Moved dwc3/port to sc8280xp.dtsi, override remote-endpoint here - Added pinconf properties to SBU control pins - Dropped unused mode-pins .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 188 +++++++++++++++++- 1 file changed, 186 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index f936b020a71d..923972e54eb1 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -77,6 +77,78 @@ switch-lid { }; }; + pmic-glink { + compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink"; + + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + pmic_glink_con0_hs: endpoint { + remote-endpoint = <&usb_0_role_switch>; + }; + }; + + port@1 { + reg = <1>; + pmic_glink_con0_ss: endpoint { + remote-endpoint = <&mdss0_dp0_out>; + }; + }; + + port@2 { + reg = <2>; + pmic_glink_con0_sbu: endpoint { + remote-endpoint = <&usb0_sbu_mux>; + }; + }; + }; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + pmic_glink_con1_hs: endpoint { + remote-endpoint = <&usb_1_role_switch>; + }; + }; + + port@1 { + reg = <1>; + pmic_glink_con1_ss: endpoint { + remote-endpoint = <&mdss0_dp1_out>; + }; + }; + + port@2 { + reg = <2>; + pmic_glink_con1_sbu: endpoint { + remote-endpoint = <&usb1_sbu_mux>; + }; + }; + }; + }; + }; + vreg_edp_3p3: regulator-edp-3p3 { compatible = "regulator-fixed"; @@ -238,6 +310,46 @@ map1 { }; }; }; + + usb0-sbu-mux { + compatible = "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb0_sbu_default>; + + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + port { + usb0_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_con0_sbu>; + }; + }; + }; + + usb1-sbu-mux { + compatible = "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>; + select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb1_sbu_default>; + + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + port { + usb1_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_con1_sbu>; + }; + }; + }; }; &apps_rsc { @@ -377,6 +489,34 @@ &mdss0 { status = "okay"; }; +&mdss0_dp0 { + data-lanes = <0 1>; + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss0_dp0_out: endpoint { + remote-endpoint = <&pmic_glink_con0_ss>; + }; + }; + }; +}; + +&mdss0_dp1 { + data-lanes = <0 1>; + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss0_dp1_out: endpoint { + remote-endpoint = <&pmic_glink_con1_ss>; + }; + }; + }; +}; + &mdss0_dp3 { compatible = "qcom,sc8280xp-edp"; @@ -871,8 +1011,13 @@ &usb_0 { }; &usb_0_dwc3 { - /* TODO: Define USB-C connector properly */ dr_mode = "host"; + + port { + usb_0_role_switch: endpoint { + remote-endpoint = <&pmic_glink_con0_hs>; + }; + }; }; &usb_0_hsphy { @@ -895,8 +1040,13 @@ &usb_1 { }; &usb_1_dwc3 { - /* TODO: Define USB-C connector properly */ dr_mode = "host"; + + port { + usb_1_role_switch: endpoint { + remote-endpoint = <&pmic_glink_con1_hs>; + }; + }; }; &usb_1_hsphy { @@ -1147,6 +1297,40 @@ reset-n-pins { }; }; + usb0_sbu_default: usb0-sbu-state { + oe-n-pins { + pins = "gpio101"; + function = "gpio"; + bias-disable; + drive-strengh = <16>; + output-high; + }; + + sel-pins { + pins = "gpio164"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + }; + }; + + usb1_sbu_default: usb1-sbu-state { + oe-n-pins { + pins = "gpio48"; + function = "gpio"; + bias-disable; + drive-strengh = <16>; + output-high; + }; + + sel-pins { + pins = "gpio47"; + function = "gpio"; + bias-disable; + drive-strength = <16>; + }; + }; + wcd_default: wcd-default-state { reset-pins { pins = "gpio106"; From patchwork Thu Feb 9 01:13:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 54656 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp50899wrn; Wed, 8 Feb 2023 17:22:39 -0800 (PST) X-Google-Smtp-Source: AK7set/VAmqyIG4pyeKlvl87Bi9bno5AEVIyymre+6wynMueJVDzcr02mmTGg5JXvswwoaitfiKX X-Received: by 2002:a17:902:ced2:b0:196:4d17:2f51 with SMTP id d18-20020a170902ced200b001964d172f51mr10152699plg.5.1675905759644; Wed, 08 Feb 2023 17:22:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675905759; cv=none; d=google.com; s=arc-20160816; b=W5RF6Em37UQ18zUL2G1Gw4CzyOTAyR+/O6C930DhVWU38Ar4cf/aoiDlAevIKpfVoy gaWp+4dCoFggx5na3zMfpjroVb4S2krfyuDLwwY8D8T+baHeeD4C8CKJDYiUB5IUmXnk /7+XxGn4a4T7H2eO5ZV61lz52HkVSMWuB9qoiPc2R81o+qifnu1FHjrw9GvD2bGX5nNW GMZkLCQG598jBYSwcdMtCpRkIpRRIBLVchavUPvtm3aQJPtlyvdEv2P0UUg51/CI7D0G 2nwkV1lsauJF+CZse7stjPzPd1yPM3qEXdCCmFVOsI82GaaQkHOvccbfSouvRdqL1Miz TAXQ== ARC-Message-Signature: i=1; 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Signed-off-by: Bjorn Andersson Reviewed-by: Konrad Dybcio --- Changes since v1: - None arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 695c4e44d241..edafb5c4b9a1 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -972,6 +972,7 @@ CONFIG_TYPEC_TPS6598X=m CONFIG_TYPEC_HD3SS3220=m CONFIG_TYPEC_UCSI=m CONFIG_UCSI_CCG=m +CONFIG_TYPEC_MUX_GPIO_SBU=m CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_ARMMMCI=y @@ -1207,6 +1208,7 @@ CONFIG_QCOM_CPR=y CONFIG_QCOM_GENI_SE=y CONFIG_QCOM_LLCC=m CONFIG_QCOM_OCMEM=m +CONFIG_QCOM_PMIC_GLINK=m CONFIG_QCOM_RMTFS_MEM=m CONFIG_QCOM_RPMH=y CONFIG_QCOM_RPMHPD=y