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[93.34.91.73]) by smtp.googlemail.com with ESMTPSA id n2-20020a05600c3b8200b003dfe659f9b1sm6755596wms.3.2023.02.08.07.39.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Feb 2023 07:39:34 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v6 1/3] dt-bindings: cpufreq: qcom-cpufreq-nvmem: specify supported opp tables Date: Wed, 8 Feb 2023 16:39:11 +0100 Message-Id: <20230208153913.24436-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757278305153033134?= X-GMAIL-MSGID: =?utf-8?q?1757278305153033134?= Add additional info on what opp tables the defined devices in this schema supports (operating-points-v2-kryo-cpu and operating-points-v2-qcom-level) and reference them. Signed-off-by: Christian Marangi Reviewed-by: Krzysztof Kozlowski --- Changes v6: - No change Changes v5: - Swap patch 1 and patch 2 to fix dt_check_warning on single patch bisecting Changes v4: - Add patch split from patch 1 .../bindings/cpufreq/qcom-cpufreq-nvmem.yaml | 35 ++++++++++++++----- 1 file changed, 26 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml index 9c086eac6ca7..7c42d9439abd 100644 --- a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml +++ b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml @@ -55,15 +55,32 @@ properties: patternProperties: '^opp-table(-[a-z0-9]+)?$': - if: - properties: - compatible: - const: operating-points-v2-kryo-cpu - then: - patternProperties: - '^opp-?[0-9]+$': - required: - - required-opps + allOf: + - if: + properties: + compatible: + const: operating-points-v2-kryo-cpu + then: + $ref: /schemas/opp/opp-v2-kryo-cpu.yaml# + + - if: + properties: + compatible: + const: operating-points-v2-kryo-cpu + then: + patternProperties: + '^opp-?[0-9]+$': + required: + - required-opps + + - if: + properties: + compatible: + const: operating-points-v2-qcom-level + then: + $ref: /schemas/opp/opp-v2-qcom-level.yaml# + + unevaluatedProperties: false additionalProperties: true From patchwork Wed Feb 8 15:39:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 54462 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp3527752wrn; Wed, 8 Feb 2023 07:45:24 -0800 (PST) X-Google-Smtp-Source: AK7set/sVJKMW0L2aSgVCpxZJPdo+7b6AnZifHwRt2nf01DS1BkXTUDb10UUsoi9QQmPoMd531l5 X-Received: by 2002:a17:906:5307:b0:88f:1255:59c with SMTP id h7-20020a170906530700b0088f1255059cmr5972579ejo.1.1675871124101; Wed, 08 Feb 2023 07:45:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675871124; cv=none; d=google.com; s=arc-20160816; b=GAYd/2bUPnZq+jzu5Vx/wCI7fkH0vdU5ydJZpNXGo2w7cftOGa/GGpzGr+XPzL0vMm SMo/Ju30+FI7c8JdtQ3AvASD+RnyJxObeWcsxC1GFiIK0wOD4FbSpbNwj1Yi2zz3DR4c fKJBuB5DWNOisD9fkr4+XC1mdiigiUwJvbNdX5+O1DGEyKdLXBfHTj1Slr8o8UbftGYp vRUbCDiDHgw8GIVn+Hv15RqGzwy9/QSgJRXY9aTTQtkZsg0nlOvntCZ+eLeKBPno61JP +Ar0+vz+CjjofBo1g/Pu2aCAD9GjZ1+oQycIklOoxSl4Zn8FeNAnEjf/BrO3pZvsGw1b D9zw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=HFW09DSWE151zjBNnB3HWCYqZY622+jBm6O+Jc9cnLw=; b=WDJMTZi8PKqTT7xRHb0+ZEjQZ0IBw5shgg8nEtfSFW0YsCz2B4W8IxSOvzhPfD2y0S saXdWq1YfTKd35EkK1StA06PH70NQbjYADZvWAl1tVtp6oYosRm2JyfVnTyjI0qaQFwl cIp25oGEY8GeSAe22/dPlaF1H8y3OYL1Uwbw4avdEyDQEMvsnS6Jf4b3v3ErxgntOnoS 4+MJJk+icCNcACVCkXszlc/95b65zIDxRYnAH9ZlzvaLFupGBgGzHnKZySVzazlnSIZB bIfsDiAJn29jYV4s7f8n7KEe3W9EeKgn2fJKxtY7bostBH4sQPsFsvg2jBlob8Bq+HMo c3XA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b="fhKRU/ws"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[93.34.91.73]) by smtp.googlemail.com with ESMTPSA id n2-20020a05600c3b8200b003dfe659f9b1sm6755596wms.3.2023.02.08.07.39.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Feb 2023 07:39:35 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v6 2/3] dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr bindings optional Date: Wed, 8 Feb 2023 16:39:12 +0100 Message-Id: <20230208153913.24436-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230208153913.24436-1-ansuelsmth@gmail.com> References: <20230208153913.24436-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757278239961022009?= X-GMAIL-MSGID: =?utf-8?q?1757278239961022009?= The qcom-cpufreq-nvmem driver supports 2 kind of devices: - pre-cpr that doesn't have power-domains and base everything on nvmem cells and multiple named microvolt bindings. Doesn't need required-opp binding in the opp nodes as they are only used for genpd based devices. - cpr-based that require power-domain in the cpu nodes and use various source to decide the correct voltage and freq Require required-opp binding since they need to be linked to the related opp-level. When the schema was introduced, it was wrongly set to always require these binding but this is not the case for pre-cpr devices. Make the power-domain and the required-opp optional and set them required only for qcs404 based devices. Signed-off-by: Christian Marangi Reviewed-by: Krzysztof Kozlowski --- Changes v6: - Drop Fixes tag (can't be backported due to prereq changes required) Changes v5: - Swap patch 1 and patch 2 to fix dt_check_warning on single Changes v4: - Explain why required-opp needs to be conditional - Split additional ref part Changes v3: - No change Changes v2: - Reword commit description - Fix condition order - Add allOf .../bindings/cpufreq/qcom-cpufreq-nvmem.yaml | 74 +++++++++++-------- 1 file changed, 44 insertions(+), 30 deletions(-) diff --git a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml index 7c42d9439abd..6f5e7904181f 100644 --- a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml +++ b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml @@ -17,6 +17,9 @@ description: | on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level according to the required OPPs defined in the CPU OPP tables. + For old implementation efuses are parsed to select the correct opp table and + voltage and CPR is not supported/used. + select: properties: compatible: @@ -33,26 +36,6 @@ select: required: - compatible -properties: - cpus: - type: object - - patternProperties: - '^cpu@[0-9a-f]+$': - type: object - - properties: - power-domains: - maxItems: 1 - - power-domain-names: - items: - - const: cpr - - required: - - power-domains - - power-domain-names - patternProperties: '^opp-table(-[a-z0-9]+)?$': allOf: @@ -63,16 +46,6 @@ patternProperties: then: $ref: /schemas/opp/opp-v2-kryo-cpu.yaml# - - if: - properties: - compatible: - const: operating-points-v2-kryo-cpu - then: - patternProperties: - '^opp-?[0-9]+$': - required: - - required-opps - - if: properties: compatible: @@ -82,6 +55,47 @@ patternProperties: unevaluatedProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,qcs404 + + then: + properties: + cpus: + type: object + + patternProperties: + '^cpu@[0-9a-f]+$': + type: object + + properties: + power-domains: + maxItems: 1 + + power-domain-names: + items: + - const: cpr + + required: + - power-domains + - power-domain-names + + patternProperties: + '^opp-table(-[a-z0-9]+)?$': + if: + properties: + compatible: + const: operating-points-v2-kryo-cpu + then: + patternProperties: + '^opp-?[0-9]+$': + required: + - required-opps + additionalProperties: true examples: From patchwork Wed Feb 8 15:39:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 54461 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp3527697wrn; Wed, 8 Feb 2023 07:45:18 -0800 (PST) X-Google-Smtp-Source: AK7set/OnGGPTG6zliakv7DwQdM1S41Z03HI+8dU28ljX9sP/1Y8V0VgPPp5ey8GGWNoTRALNz5O X-Received: by 2002:a05:6402:51d2:b0:4a2:64d7:16bc with SMTP id r18-20020a05640251d200b004a264d716bcmr8842427edd.4.1675871118228; Wed, 08 Feb 2023 07:45:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675871118; cv=none; d=google.com; s=arc-20160816; b=mMf10ntmRLUm7zs4sANVcj7iCez+TgQFmMfGjol3TiKpR6qD6RkxfCQejxlHsu3gie Gf+8dB+E2nh1oBeJWafJ/D3bXlcqH7W1uoEb8s4CiOOdRVzc4Bb3DniNQ/hjBTgH7ELi BZjo+dxqKXpVvIAJ8eok0a1i4sfkeWWgVHdUGYe3KdHPj4834eIlHPNxBjJKfxNdkQ86 gnKz5uygTLoLJdSfq6IgFY3/zZT/RsmYe9LwXqgBP2hokpAA9wx/s07ZHMtXekFvSZKo 8RmnN0LquZCvsEH2VLevO9fmcbqCLe03cnOwUxDkbzdcl8Gs89wFL2KKAaAhuNgQMP4o QAEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Ai4b+jYyw5cqGgwQurdqHixIHibtkEl/YStppo1UAEw=; b=FzUPzSJFV1C0hZ02tEQPcD2k+rV+4WpXvLkXGUfSf/5IAevrJSecwVt40rf66EiwXK YNhGPv+xzhoWPXRUy+gP4PfaaUtQyJ4x5sJQXVCN+/syHDxpr8gIPVZcUNK8OCx8kZuv ub57qhxXDKvCMAI8B9Ebs4ygVBctrCeEhv5HzDmoL4gbBLPJAhvbC2rTXMx9CWABjMCE vx9pSh6ZAkoXxmU1EOALWoE6Aa/DIH0ldwt02MfKQf5qZ1/POevPY/5Z6YuozXmkWwgJ Twj9tPkH0PS8EYlGBLC3Gqga/LcSuS/LBTR9YqP0cJEIrRzomWudNq81ncWrMaPbhXBX fSHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=FQLtuY3S; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. 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[93.34.91.73]) by smtp.googlemail.com with ESMTPSA id n2-20020a05600c3b8200b003dfe659f9b1sm6755596wms.3.2023.02.08.07.39.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Feb 2023 07:39:36 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi , Krzysztof Kozlowski Subject: [PATCH v6 3/3] dt-bindings: opp: opp-v2-kryo-cpu: enlarge opp-supported-hw maximum Date: Wed, 8 Feb 2023 16:39:13 +0100 Message-Id: <20230208153913.24436-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230208153913.24436-1-ansuelsmth@gmail.com> References: <20230208153913.24436-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757278233357888882?= X-GMAIL-MSGID: =?utf-8?q?1757278233357888882?= Enlarge opp-supported-hw maximum value. In recent SoC we started matching more bit and we currently match mask of 112. The old maximum of 7 was good for old SoC that didn't had complex id, but now this is limiting and we need to enlarge it to support more variants. Document all the various mask that can be used and limit them to only reasonable values instead of using a generic maximum limit. Signed-off-by: Christian Marangi Reviewed-by: Krzysztof Kozlowski --- changes v6: - No change Changes v5: - No change Changes v4: - Add review tag from Krzysztof Changes v3: - Fix dt_binding_check for missing 0x5 and 0x6 value Changes v2: - Document additional bit format .../devicetree/bindings/opp/opp-v2-kryo-cpu.yaml | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml index b4947b326773..bbbad31ae4ca 100644 --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml @@ -50,12 +50,22 @@ patternProperties: opp-supported-hw: description: | A single 32 bit bitmap value, representing compatible HW. - Bitmap: + Bitmap for MSM8996 format: 0: MSM8996, speedbin 0 1: MSM8996, speedbin 1 2: MSM8996, speedbin 2 - 3-31: unused - maximum: 0x7 + 3: MSM8996, speedbin 3 + 4-31: unused + + Bitmap for MSM8996SG format (speedbin shifted of 4 left): + 0-3: unused + 4: MSM8996SG, speedbin 0 + 5: MSM8996SG, speedbin 1 + 6: MSM8996SG, speedbin 2 + 7-31: unused + enum: [0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, + 0x9, 0xd, 0xe, 0xf, + 0x10, 0x20, 0x30, 0x70] clock-latency-ns: true