From patchwork Mon Oct 17 10:23:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 3371 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1369261wrs; Mon, 17 Oct 2022 03:25:45 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5huLIiiDg37nv/s9G6Mg4xnLz/uMaRWPAKm57m0+I4Cc2CGLNUK4mEIrc2q6mV2WuzKEFl X-Received: by 2002:a05:6402:ca:b0:45c:dbdd:8143 with SMTP id i10-20020a05640200ca00b0045cdbdd8143mr9584013edu.213.1666002345242; Mon, 17 Oct 2022 03:25:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666002345; cv=none; d=google.com; s=arc-20160816; b=wE4KwxlSh6/cNP4tj6py+cKNEKK8eJEATMHjv/yM1EcFo0w1Ii+us09foeLjBDExlQ YZxd2Ph+1Z2YbDHOMAI7mhN8uOzM4XZ0SYJNCqxjvxhDT7MeDNWaht4Bv2l9y4dvBbyJ +e3IRam9uDBex9tU1dI3YE2jyxfHaN/yzIlqmTBPXgzhZqgqVgXPumevLcDy986alcIk NUCfkCwPxjmpCzucHsHN5q4xnGlBFaTEKnOk2kn+VxVszv+GA2UEa+NwHq5Q8FsYoZ9c B98HOhnZe3c6z9S4mFOeRneaI08Sf6Z69vxWUkePu7b0ibdiMC/UVbOedk6/AeqYyTYX YcKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=0BtCteD54q02kgUkMkj2OAC+PDkYwPzaE7W/pW2qQxs=; b=ZJSKAnYS/304abFwPEOK/PE3733/zyFIHgpZnaYiwL/8Ho+7yrDui/X9SUS2P5e8J0 D7Uy+G3RQX6kjfiTz1qzv2SXoB3BEwUbQr9XQIe6P9u4fsNUQc1oJ70KTFBNXB0C9sMR eX2j4D0CHRPfLQSp0Xxliara8sjQxrh+7SCP6M8ngNZZk4QG98TKNJ3rMJ/7qTrms0JB GG6+n991ZonrWDT3GyWmKmXW9E2x9pSY09yE0Gvhx9bM7oGF3oYV9NNiPq2CaI66nQgm GiSdflrA8YY2ARabJxGpDhI2B43f0ZoyMOFizIckQxe1m91/f49I4f5CVi3a4VfhlJrg Fx5A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dAaFQ8Mm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id n10-20020a170906724a00b007808f3f4cbcsi7522657ejk.239.2022.10.17.03.25.06; Mon, 17 Oct 2022 03:25:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dAaFQ8Mm; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230120AbiJQKXV (ORCPT + 99 others); Mon, 17 Oct 2022 06:23:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229905AbiJQKXO (ORCPT ); Mon, 17 Oct 2022 06:23:14 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C4A3F5FDEA for ; Mon, 17 Oct 2022 03:23:12 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id bp11so17722480wrb.9 for ; Mon, 17 Oct 2022 03:23:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=0BtCteD54q02kgUkMkj2OAC+PDkYwPzaE7W/pW2qQxs=; b=dAaFQ8MmIj1mfftRn85kI1Q3UM+UcI9CdXnNOaS2QeJCFzWf2UxzefLcCo+UhC3YWL WiAhVTEQC2unmT6AJp663ECO4dkEISWkrz33zUnpLotiJKeUkSOk7lsEmWU/QuF/yc66 Im6qqKpiDh2c58jZp76TnILCsv61o9ifH3xGVs3K78SGQDSN5ZGSRq0KY0R4HyR02xYC QFtPm2gmwr7hPvxr2TMPfwAJcIN1qHSpkGaA4zVuUgq4K0JoAz7uDlyCtYmA2HXgAZSj 5usxkYO2bGWWWj9sRjKFpkKWu2p6Mk1+rS8800SkzzJwcdWimT9pdX2MEW1iiEuYqaOT 9tTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0BtCteD54q02kgUkMkj2OAC+PDkYwPzaE7W/pW2qQxs=; b=hQs8PRSmm0D1VFz/chxwnyEDLyagc8h9NxN5ExuvYOEvfJcSJ/Jc9h07Rjt52Xx4K2 WidEa9iK06orezS1Z7iQ+kCc4XGtAubsFBupxEwT9Pb1FyhEs9VETbWzagQseLLE2zLz cDyxIIYvatQwxoja++Qlrlm9+2rraF8/+ygCe/8P6VNcHLwXTUBqoP3kPxUOVIS0/pYE wIWdm+mk/6YAhUe89Ah7SY0vniT6EvFeJyfwryJcvB6QMgMZ2wZOZSo/XtwKZoAHs4Xv zesKYAYNnBkVVU9qRQoDZ51xrljvpbBwc2ldTAx5fE1EcN91JD7wdFZVF0iuxvFl2KaA BORA== X-Gm-Message-State: ACrzQf1otXRXNGb6D2Fdg7pIyPnPiG8rPKkfUwcTs4uddi70O4UnIySg h44r4T6ekpgCFbPOhHaPQFNhhg== X-Received: by 2002:a5d:4150:0:b0:22f:f9f6:cca1 with SMTP id c16-20020a5d4150000000b0022ff9f6cca1mr5974819wrq.510.1666002191072; Mon, 17 Oct 2022 03:23:11 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id t9-20020a05600c198900b003b4fe03c881sm15590707wmq.48.2022.10.17.03.23.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Oct 2022 03:23:10 -0700 (PDT) From: Neil Armstrong Date: Mon, 17 Oct 2022 12:23:05 +0200 Subject: [PATCH v2 1/5] dt-bindings: pinctrl: convert qcom,mdm9615-pinctrl.txt to dt-schema MIME-Version: 1.0 Message-Id: <20221005-mdm9615-pinctrl-yaml-v2-1-639fe67a04be@linaro.org> References: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> In-Reply-To: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> To: Lee Jones , Krzysztof Kozlowski , Konrad Dybcio , Andy Gross , Mark Brown , Liam Girdwood , Linus Walleij , Rob Herring , Bjorn Andersson Cc: Krzysztof Kozlowski , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, Neil Armstrong , devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746930075364778387?= X-GMAIL-MSGID: =?utf-8?q?1746930075364778387?= Convert the MDM9515 pinctrl bindings to dt-schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, optional children with '-pins'). Signed-off-by: Neil Armstrong Acked-by: Linus Walleij Reviewed-by: Rob Herring --- .../bindings/pinctrl/qcom,mdm9615-pinctrl.txt | 161 --------------------- .../bindings/pinctrl/qcom,mdm9615-pinctrl.yaml | 120 +++++++++++++++ 2 files changed, 120 insertions(+), 161 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt deleted file mode 100644 index d46973968873..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt +++ /dev/null @@ -1,161 +0,0 @@ -Qualcomm MDM9615 TLMM block - -This binding describes the Top Level Mode Multiplexer block found in the -MDM9615 platform. - -- compatible: - Usage: required - Value type: - Definition: must be "qcom,mdm9615-pinctrl" - -- reg: - Usage: required - Value type: - Definition: the base address and size of the TLMM register space. - -- interrupts: - Usage: required - Value type: - Definition: should specify the TLMM summary IRQ. - -- interrupt-controller: - Usage: required - Value type: - Definition: identifies this node as an interrupt controller - -- #interrupt-cells: - Usage: required - Value type: - Definition: must be 2. Specifying the pin number and flags, as defined - in - -- gpio-controller: - Usage: required - Value type: - Definition: identifies this node as a gpio controller - -- #gpio-cells: - Usage: required - Value type: - Definition: must be 2. Specifying the pin number and flags, as defined - in - -- gpio-ranges: - Usage: required - Definition: see ../gpio/gpio.txt - -- gpio-reserved-ranges: - Usage: optional - Definition: see ../gpio/gpio.txt - -Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for -a general description of GPIO and interrupt bindings. - -Please refer to pinctrl-bindings.txt in this directory for details of the -common pinctrl bindings used by client devices, including the meaning of the -phrase "pin configuration node". - -The pin configuration nodes act as a container for an arbitrary number of -subnodes. Each of these subnodes represents some desired configuration for a -pin, a group, or a list of pins or groups. This configuration can include the -mux function to select on those pin(s)/group(s), and various pin configuration -parameters, such as pull-up, drive strength, etc. - - -PIN CONFIGURATION NODES: - -The name of each subnode is not important; all subnodes should be enumerated -and processed purely based on their content. - -Each subnode only affects those parameters that are explicitly listed. In -other words, a subnode that lists a mux function but no pin configuration -parameters implies no information about any pin configuration parameters. -Similarly, a pin subnode that describes a pullup parameter implies no -information about e.g. the mux function. - - -The following generic properties as defined in pinctrl-bindings.txt are valid -to specify in a pin configuration subnode: - -- pins: - Usage: required - Value type: - Definition: List of gpio pins affected by the properties specified in - this subnode. Valid pins are: - gpio0-gpio87 - -- function: - Usage: required - Value type: - Definition: Specify the alternative function to be configured for the - specified pins. - Valid values are: - gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart, - sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio, - cdc_mclk - -- bias-disable: - Usage: optional - Value type: - Definition: The specified pins should be configured as no pull. - -- bias-pull-down: - Usage: optional - Value type: - Definition: The specified pins should be configured as pull down. - -- bias-pull-up: - Usage: optional - Value type: - Definition: The specified pins should be configured as pull up. - -- output-high: - Usage: optional - Value type: - Definition: The specified pins are configured in output mode, driven - high. - -- output-low: - Usage: optional - Value type: - Definition: The specified pins are configured in output mode, driven - low. - -- drive-strength: - Usage: optional - Value type: - Definition: Selects the drive strength for the specified pins, in mA. - Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16 - -Example: - - msmgpio: pinctrl@800000 { - compatible = "qcom,mdm9615-pinctrl"; - reg = <0x800000 0x4000>; - - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&msmgpio 0 0 88>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <0 16 0x4>; - - gsbi8_uart: gsbi8-uart { - mux { - pins = "gpio34", "gpio35"; - function = "gsbi8"; - }; - - tx { - pins = "gpio34"; - drive-strength = <4>; - bias-disable; - }; - - rx { - pins = "gpio35"; - drive-strength = <2>; - bias-pull-up; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml new file mode 100644 index 000000000000..69a8549beef6 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,mdm9615-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. MDM9615 TLMM block + +maintainers: + - Bjorn Andersson + +description: Top Level Mode Multiplexer pin controller in Qualcomm MDM9615 SoC. + +$ref: /schemas/pinctrl/qcom,tlmm-common.yaml# + +properties: + compatible: + const: qcom,mdm9615-pinctrl + + reg: + maxItems: 1 + + interrupts: true + interrupt-controller: true + '#interrupt-cells': true + gpio-controller: true + '#gpio-cells': true + gpio-ranges: true + +required: + - compatible + - reg + +additionalProperties: false + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-mdm9615-pinctrl-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-mdm9615-pinctrl-state" + additionalProperties: false + +$defs: + qcom-mdm9615-pinctrl-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-7][0-9]|8[0-7])$" + minItems: 1 + maxItems: 16 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + + enum: [ gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart, + sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio, cdc_mclk, ] + + bias-disable: true + bias-pull-down: true + bias-pull-up: true + drive-strength: true + output-high: true + output-low: true + input-enable: true + + required: + - pins + - function + + additionalProperties: false + +examples: + - | + #include + tlmm: pinctrl@1000000 { + compatible = "qcom,mdm9615-pinctrl"; + reg = <0x01000000 0x300000>; + interrupts = ; + gpio-controller; + gpio-ranges = <&msmgpio 0 0 88>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + gsbi3-state { + pins = "gpio8", "gpio9", "gpio10", "gpio11"; + function = "gsbi3"; + drive-strength = <8>; + bias-disable; + }; + + gsbi5-i2c-state { + sda-pins { + pins = "gpio16"; + function = "gsbi5_i2c"; + drive-strength = <8>; + bias-disable; + }; + + scl-pins { + pins = "gpio17"; + function = "gsbi5_i2c"; + drive-strength = <2>; + bias-disable; + }; + }; + }; From patchwork Mon Oct 17 10:23:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 3373 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1369438wrs; Mon, 17 Oct 2022 03:26:32 -0700 (PDT) X-Google-Smtp-Source: AMsMyM49HGAolRvd1ijNq+qbWlY6VjQ+A8m1T9knAKQrX5aZVinMawPiPZ71NnYu9NWZC6IHJpjR X-Received: by 2002:a63:2d81:0:b0:446:8d24:c90f with SMTP id t123-20020a632d81000000b004468d24c90fmr9950398pgt.160.1666002391844; Mon, 17 Oct 2022 03:26:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666002391; cv=none; d=google.com; s=arc-20160816; b=VGnYwbb4sjezVuTzXf4v8u8+Lc81aMJi5zTJ6ffGdYNC/Ot9X9kpvOpjc3bgPJwr27 9qZ0jjJYb60UM2VR+j2p6n22dzdZGk0mHJD1X8imIaicMkjIlQEIUm5ZSKMvd0C336ja uWU4mrPuWO8KNvIEzAbER0Uz/6KLb5Et0Qjc8cS74w0YrKkaLOLMY4ByttLiI5XYYkvG aJqImBEliMoL/+1LPlthouS/mAQDXEqcjh27CctjgZOKBJSE7JwXEWobh15VBCajkFZG JrCmvDUqeBnOspcJrLvkiELn4YNP7dt5kPsLE9t6fXkAz2LMwaY9IzD0POArpE+SWhJV pomg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=E6w6wyU+dRkLa1kli5D9X2hxBFzXMiHiBuCpH2iVcFY=; b=vt/2bZ3LdRj90du1d9KlGPEGzxpQRFcawMrOLJ/D40Rej4LJ9rJ6eC3eeY+spAiScB oFa309MFsv4PBklPYYijtCd3/mrz27FITQbikLfzPzi3iT6pFWwdVPUpdcuQKud5lwvE xo6TQtP6g5w3V7AqszdLKYR3v86PD0fDci1UYV1DY+OlTtqskRny7zq8SDmUSIT8J0VV sUpNbhUEoe+g6ygLuc62ig7QXZT8b2W8Z0smWiX3LV1mUtY2inf6BcjYEU8QdR5cEmbQ oAISa6k+jhgedxg/YAOwTH3Fj+G/r8/2yI9M1CIdULyo4CMWRq5pN0oHV38im3NcH0Cp f5hw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cPfMAnpu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k25-20020a635619000000b0043946964302si12152024pgb.173.2022.10.17.03.26.17; Mon, 17 Oct 2022 03:26:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cPfMAnpu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230116AbiJQKX1 (ORCPT + 99 others); Mon, 17 Oct 2022 06:23:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229968AbiJQKXP (ORCPT ); Mon, 17 Oct 2022 06:23:15 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA39F5FDF1 for ; Mon, 17 Oct 2022 03:23:13 -0700 (PDT) Received: by mail-wr1-x433.google.com with SMTP id j16so17747412wrh.5 for ; Mon, 17 Oct 2022 03:23:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=E6w6wyU+dRkLa1kli5D9X2hxBFzXMiHiBuCpH2iVcFY=; b=cPfMAnpuF8qyj6njXDkVKeqwd+B0thMSlg3UkDdQTOLNr1oj7UPqBlt29OpCp1A83B Y/Ji1w2E7vMOncrKfoyg780kOALOpFqzVSCVAX50FyinJDzkYHKDrnXGAT5OsJt+cuWr 7/4RCJJEMxazA9b5510A6aDzB5BnlmOwV/HDvTHwqNp8x7zNNuyzwT0VVapAlW4PTTYy c3YEkaW2H9aYUSPI2VznPYXgZrkgSXTsoany3D6YomSuS5/4W41fyIGzyFlQrKJATM2c 0unHPqItsh+yhJmfLcv2h/+CBCXT6+4Zaao7BXYZQn8oKUzhbpD5zHZ1SBA1/qNygE9C BytA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E6w6wyU+dRkLa1kli5D9X2hxBFzXMiHiBuCpH2iVcFY=; b=Y90TkFdNrIY/BRk0KRQQTTWtmrRDgcQGu2uDMecoeM2rmx/zRDcmNHFslZT42weaLV gnNAY/nbkckt//ubxBXx6a5pIs3TwnNIJjNkunh4T9OxdSKrPvzyb6cgni52MaQYUCDf oF21Qp91sHmv+UbW8+gWGOvi//jlhXJGofeMuDJyB1VjoF6OYisCweBImJFLjo0NRm5j nz3ouwMPjbVKSBZcQlFH5IfB8j1k59Ln2/Bws+76b1Yjdo8bg4R4nNE3yHlTgRBQ0w7F TRh3KNP+o4UtzrD4v/cPxrBcZjzQGi19LRQrDvtV7MDwvx25xTXrSnko5qa28OBlfBvQ G0KA== X-Gm-Message-State: ACrzQf38MTjqF/ePXyeRxnsXFPYGpWGNNjsL/z7ilaWDj+XCE1rfHENs wG1Hn90kRIQD52/E3LjFXouZAg== X-Received: by 2002:a5d:5948:0:b0:230:8e9d:d073 with SMTP id e8-20020a5d5948000000b002308e9dd073mr6032538wri.599.1666002192006; Mon, 17 Oct 2022 03:23:12 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id t9-20020a05600c198900b003b4fe03c881sm15590707wmq.48.2022.10.17.03.23.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Oct 2022 03:23:11 -0700 (PDT) From: Neil Armstrong Date: Mon, 17 Oct 2022 12:23:06 +0200 Subject: [PATCH v2 2/5] arm: dts: qcom: mdm9615: align pinctrl subnodes with dt-schema bindings MIME-Version: 1.0 Message-Id: <20221005-mdm9615-pinctrl-yaml-v2-2-639fe67a04be@linaro.org> References: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> In-Reply-To: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> To: Lee Jones , Krzysztof Kozlowski , Konrad Dybcio , Andy Gross , Mark Brown , Liam Girdwood , Linus Walleij , Rob Herring , Bjorn Andersson Cc: Krzysztof Kozlowski , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, Neil Armstrong , devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746930124218500687?= X-GMAIL-MSGID: =?utf-8?q?1746930124218500687?= Align the MDM9615 DT to the expected subnodes namings in the dt-schema bindings. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong --- .../boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts | 8 ++++---- arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 22 +++++++++++----------- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts index 4e53b3d70195..30a110984597 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts @@ -45,8 +45,8 @@ &msmgpio { * - 42: IOT0_GPIO1 and SD Card Detect */ - gpioext1_pins: gpioext1_pins { - pins { + gpioext1_pins: gpioext1-state { + gpioext1-pins { pins = "gpio2"; function = "gpio"; input-enable; @@ -54,8 +54,8 @@ pins { }; }; - sdc_cd_pins: sdc_cd_pins { - pins { + sdc_cd_pins: sdc-cd-state { + sdc-cd-pins { pins = "gpio42"; function = "gpio"; drive-strength = <2>; diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi index 2fe8693dc3cd..92c8003dac25 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi @@ -22,8 +22,8 @@ &msmgpio { pinctrl-0 = <&reset_out_pins>; pinctrl-names = "default"; - gsbi3_pins: gsbi3_pins { - mux { + gsbi3_pins: gsbi3-state { + gsbi3-pins { pins = "gpio8", "gpio9", "gpio10", "gpio11"; function = "gsbi3"; drive-strength = <8>; @@ -31,8 +31,8 @@ mux { }; }; - gsbi4_pins: gsbi4_pins { - mux { + gsbi4_pins: gsbi4-state { + gsbi4-pins { pins = "gpio12", "gpio13", "gpio14", "gpio15"; function = "gsbi4"; drive-strength = <8>; @@ -40,15 +40,15 @@ mux { }; }; - gsbi5_i2c_pins: gsbi5_i2c_pins { - pin16 { + gsbi5_i2c_pins: gsbi5-i2c-state { + sda-pins { pins = "gpio16"; function = "gsbi5_i2c"; drive-strength = <8>; bias-disable; }; - pin17 { + scl-pins { pins = "gpio17"; function = "gsbi5_i2c"; drive-strength = <2>; @@ -56,8 +56,8 @@ pin17 { }; }; - gsbi5_uart_pins: gsbi5_uart_pins { - mux { + gsbi5_uart_pins: gsbi5-uart-state { + gsbi5-uart-pins { pins = "gpio18", "gpio19"; function = "gsbi5_uart"; drive-strength = <8>; @@ -65,8 +65,8 @@ mux { }; }; - reset_out_pins: reset_out_pins { - pins { + reset_out_pins: reset-out-state { + reset-out-pins { pins = "gpio66"; function = "gpio"; drive-strength = <2>; From patchwork Mon Oct 17 10:23:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 3370 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1369219wrs; Mon, 17 Oct 2022 03:25:35 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5QuESuUPrXDa996N0BpOK99Y56nqlnFaJu6Bg+Yg6XYoav3i+AYY53rfNut1kEB68ioVLv X-Received: by 2002:a17:90b:1b51:b0:20d:8594:bd5f with SMTP id nv17-20020a17090b1b5100b0020d8594bd5fmr31773786pjb.125.1666002334831; Mon, 17 Oct 2022 03:25:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666002334; cv=none; d=google.com; s=arc-20160816; b=Hu7NYzfbcKGBsqkc73u8P/3/7hcHaDnuoKIBRme7KQjitpzR6NAkVUIoTLa/VHNv5W wpDRk/6acu+MgU6QOGdMxlfvkTu+AGFxMjNMUKPfeKJ93xZS81FYkIsbEK0N4/puqQhe 8sdhL73j+AtNmUXVlcYGhoIG0vC7EuAzp7kcna1dWi6TqVDGIM6MppFhr72OEuF5fWHS ld8Ka7rsXqFF7dQBEFv/7k/cg25vyYZsuPoMDXEmF1exa/2hm4BxYgZIzIvUIF2ssewf 6iFbMCpW5io/nqTOUUKqAfpAu8b2bc1oibkNbaQ2XGRKmUeX9lCrzNKgbWtuKrQnqEOc SvOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=DpV/qCEWf/oxdA4ww51qfQjnCUWo3HbkpcM9BvV5fno=; b=qJ247tO8i5du1K8t6/s/J+iFKGsfbTEI2M9wvgQTMgyR0cwFM3tvWrZRuyI5L5EIfv asDD8HoQH+2TcTeltU6YBP8wsCzHmb80jnIycIGiU2W45h1dvHXwRAhX+jDPzyHSyWwB cwv99P8NJ/mdAVwjmSBN7OMRloUrIqqjGbqDuPMK5uBzDGsKbXGsdt6o5Oqv4jcpKxfD krqJedEe7SHw5HXpJDYQLyEvqQZ0qLOFF3oqGTB3ylAmJIh3BBGAsmL3X90bN0FJqC+x FnPlwK1WGOxezOOlcx3/cFB8iYsVA03/SAnpgTeTA/HIDPV3+984wB+ys5zpYP1sAbFI oIRA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=os1RfSXZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c19-20020aa78c13000000b00536bf099c14si10507186pfd.307.2022.10.17.03.25.22; Mon, 17 Oct 2022 03:25:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=os1RfSXZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230151AbiJQKXs (ORCPT + 99 others); Mon, 17 Oct 2022 06:23:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230038AbiJQKXQ (ORCPT ); Mon, 17 Oct 2022 06:23:16 -0400 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E83C5FDE8 for ; Mon, 17 Oct 2022 03:23:14 -0700 (PDT) Received: by mail-wr1-x436.google.com with SMTP id j7so17746365wrr.3 for ; Mon, 17 Oct 2022 03:23:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=DpV/qCEWf/oxdA4ww51qfQjnCUWo3HbkpcM9BvV5fno=; b=os1RfSXZtHCkU6GI6uXXkcEXJfLtaPZhkfLfPfmPyIMNVxXNjQy5ta95vojoukfmsC G7KsJEO7XAv1guEoNs582HHYPf5Axn2VB/Nj1ktY5ocPtwwDs35xQfvPw6WoV2Jx1KgC /BKr1Q322PFVBS8X0NgOW3ck8bPt6L5GGiBhpoI2hAIt3vW1g93q+RB3J10ZvK0vALLE cDri5ua3+X1UaRh+Bwvuy/wMRnsfUU9UJAiy9ZUb25ATHLH1aqyYFXv3RFep96rbq6nt TLg9v6E5D00RsriKmySXPT/sR7KWEke9DDTpcBoE59b0eEq8ZRUfQEGsYhD/SX3PgURU Bo/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DpV/qCEWf/oxdA4ww51qfQjnCUWo3HbkpcM9BvV5fno=; b=SUEb9QJM/iCRjq2SFgm3J9Xy3KyhN28sCrKZDD9+8zWDRFXowmQEfabzHpKy2Bqf3p xm7MEFnZfEsDoFTHMKdOEhliZ+i/Q+sAkEFgXRAd0dXsmAt5usdhYv8w8oSRMX9YcSde 7QAxKuyN5eoaGuG/FyYbT3bjDYEYT10f5k9UfemhWLrs1BllH5Y8OWkfufa+YxxGZbL7 kn3swOheOeZvypytoziAPACY2GJasmx/36rA0/9Fu/yCAzlqaAVQrxtsln2AN0YDNdRr oYXZ8iJu/r4BvTzSa18rtBhJU7RWZlsjBoZje7MOnxcg7T8+loSab5/dtqKS1dFrgDFw Ig9g== X-Gm-Message-State: ACrzQf2ZqtMaw3L/BdIwzoVYRetR9Bti3En9QZLrLrzhz5D2snudQ5DU Xc6fuU0nZq+10SujeaEK/8Cj4g== X-Received: by 2002:a5d:584a:0:b0:231:636c:de28 with SMTP id i10-20020a5d584a000000b00231636cde28mr5875835wrf.175.1666002193007; Mon, 17 Oct 2022 03:23:13 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id t9-20020a05600c198900b003b4fe03c881sm15590707wmq.48.2022.10.17.03.23.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Oct 2022 03:23:12 -0700 (PDT) From: Neil Armstrong Date: Mon, 17 Oct 2022 12:23:07 +0200 Subject: [PATCH v2 3/5] arm: dts: qcom: mdm9615: wp8548-mangoh-green: fix sx150xq node names and probe-reset property MIME-Version: 1.0 Message-Id: <20221005-mdm9615-pinctrl-yaml-v2-3-639fe67a04be@linaro.org> References: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> In-Reply-To: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> To: Lee Jones , Krzysztof Kozlowski , Konrad Dybcio , Andy Gross , Mark Brown , Liam Girdwood , Linus Walleij , Rob Herring , Bjorn Andersson Cc: Krzysztof Kozlowski , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, Neil Armstrong , devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746930064431436268?= X-GMAIL-MSGID: =?utf-8?q?1746930064431436268?= Fix the sx150xq node names to pinctrl and use the right probe-reset property. Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts index 30a110984597..a8304769b509 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts @@ -116,7 +116,7 @@ i2c@4 { #size-cells = <0>; reg = <4>; - gpioext0: gpio@3e { + gpioext0: pinctrl@3e { /* GPIO Expander 0 Mapping : * - 0: ARDUINO_RESET_Level shift * - 1: BattChrgr_PG_N @@ -142,7 +142,7 @@ gpioext0: gpio@3e { interrupt-parent = <&gpioext1>; interrupts = <0 IRQ_TYPE_EDGE_FALLING>; - probe-reset; + semtech,probe-reset; gpio-controller; interrupt-controller; @@ -154,7 +154,7 @@ i2c@5 { #size-cells = <0>; reg = <5>; - gpioext1: gpio@3f { + gpioext1: pinctrl@3f { /* GPIO Expander 1 Mapping : * - 0: GPIOEXP_INT1 * - 1: Battery detect @@ -183,7 +183,7 @@ gpioext1: gpio@3f { interrupt-parent = <&msmgpio>; interrupts = <0 IRQ_TYPE_EDGE_FALLING>; - probe-reset; + semtech,probe-reset; gpio-controller; interrupt-controller; @@ -195,7 +195,7 @@ i2c@6 { #size-cells = <0>; reg = <6>; - gpioext2: gpio@70 { + gpioext2: pinctrl@70 { /* GPIO Expander 2 Mapping : * - 0: USB_HUB_INTn * - 1: HUB_CONNECT @@ -221,7 +221,7 @@ gpioext2: gpio@70 { interrupt-parent = <&gpioext1>; interrupts = <14 IRQ_TYPE_EDGE_FALLING>; - probe-reset; + semtech,probe-reset; gpio-controller; interrupt-controller; From patchwork Mon Oct 17 10:23:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 3372 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1369258wrs; Mon, 17 Oct 2022 03:25:45 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5TDau3UazxDehZNtwwqvsBN1h06u8KXSjx3zzK1AsJz9GWMNZonLiibJCnjsuYjMAZ28Xn X-Received: by 2002:a17:90a:d588:b0:202:aa2d:1022 with SMTP id v8-20020a17090ad58800b00202aa2d1022mr32635222pju.31.1666002344826; Mon, 17 Oct 2022 03:25:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666002344; cv=none; d=google.com; s=arc-20160816; b=XoYNSCT5AufZtV8MdJ8+hdbv1Gug6Rla4DCbCZ0IIn4vxyOfg1JZhhUfWbDB4D2F2J FZEFf5NK0rHnFTHnHbyJqcac8uPCPShrO3wpOmaI6eiHxMrgD39bzl1PFrlwAglF1HTL WN/D4oFu4htQxZh2joQQsVjpr3XYD25oCvi61eThp1F24aOWCcId8XYeVKsaj9BL9NmS BiDEDdos61MAUrGVuDjx+7bm9zH9x/0ZiVmjm54nGxmp/IbpPmhmpXr4saACIrC3JjkP T9fPJAy5einX79m1qGwAbCyfaocamrM0hi0Qfep/qO4c6mhCVB7O28YZnqnV78u7V7sZ Ur/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=T4vnnNnC74AadFGPIaQilMOOArwGooyURI20oo6pvdI=; b=Bogcsl3S+HbhMME8gbu+ZKJcY5YWLnx7dWgNwMnxOy3oRqJKmDLZ0V4ADPRHQGBMNs IAFL4cq5mftOjySm5fxe6+TH9TJniCyqJLeq2OPpfFZdnxcZYRwy4u2uazuNADsBcYcF ZB3WrlORB97nJ7IeGsdMF4hqyKvRGu7bvl2BuQJOEfOBIkUip4OIiJcEMVee6kfEsC/c Izdi5gqOJ0gvvH8k+ixdQc1Ftzhahgl6YeF/BWUY5Xn6bNs2bavms3ZDQU70BQ2tWbVR uLXPFzcnYsuUmlZTlCIYp9uMziDn8ZlB6bfM93uFklfHk5omjaCiQRL5Svh/JTbBO6cP DXjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=E7UkAb98; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h63-20020a638342000000b0046b3ba2c807si4553214pge.143.2022.10.17.03.25.30; Mon, 17 Oct 2022 03:25:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=E7UkAb98; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230177AbiJQKXw (ORCPT + 99 others); Mon, 17 Oct 2022 06:23:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230064AbiJQKXS (ORCPT ); Mon, 17 Oct 2022 06:23:18 -0400 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C1EA27FD5 for ; Mon, 17 Oct 2022 03:23:15 -0700 (PDT) Received: by mail-wr1-x436.google.com with SMTP id n12so17698217wrp.10 for ; Mon, 17 Oct 2022 03:23:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=T4vnnNnC74AadFGPIaQilMOOArwGooyURI20oo6pvdI=; b=E7UkAb984yGO2S+TPiMJI8VNnm2hyTRukt0iCsSbfG4/frAjKuMNKkaTWVYhqG22Eo pYd6DhLCyEVYISG8IRmNxxaOk0Zc7Fxdus5A4DZ1UuDas40yDtOLQ9wsTVGgn/BW4bIT aPUQuU6sO8iw1POLSvGTFPe4/8ETooxDRhhBnT4qxK03duAsazPQT5pTKkUcx4EyLdkR 3oY1B8OHUEIBiBYFgcxcAXAg4GvtQhN9htlrFDR9lSTYw/1qdexnMrCnAxqIRTpeM0mm LIh8sGTt8HUxDJnNWkO6u0GDIWTjNu148ul5nKLuKk/1jMhHKJZZlajwD1rbZ8h2NaFf mzrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=T4vnnNnC74AadFGPIaQilMOOArwGooyURI20oo6pvdI=; b=254g3mXuGeRX/gOHfqZ10rnvFRK6vDP+VBYdXFmeYhZF6cf4l1Z4k4l63ng/OeI0bK C6FoyNWbRisdW6zMejXxGZQS+BgDAU8Hif8fFJl+iELiw+d+2W+MwazDFXUodNrZzbao 4sZB3f/BzBIwFNLDwESjU0h2d86Bk6w3EdG8OHgowPEXTXEpwbWuCZj6FQemDg04lI0B Oy9Tj3tGYejUOdmtbE7t2uQeZpTqfwXvcx8aA/1omV78ifXlCC7eHHdMjOeMBmdE+PaR 7Z66Ie7bViShD5Fpj4IxO8RYKf/pVuszWKcVjqU1jNuQXrFJ+L8ydMMbQc+H+pjeqGwB lGGg== X-Gm-Message-State: ACrzQf2rUG5QHt0bwCOA35CQQJX5NQHSivjEubLQyWsxsQlz9VEuyVR2 I9ADaxAUziPBFpnv4wKgQfEbcQ== X-Received: by 2002:a05:6000:1d82:b0:22c:ae77:c8dc with SMTP id bk2-20020a0560001d8200b0022cae77c8dcmr6046310wrb.413.1666002193889; Mon, 17 Oct 2022 03:23:13 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id t9-20020a05600c198900b003b4fe03c881sm15590707wmq.48.2022.10.17.03.23.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Oct 2022 03:23:13 -0700 (PDT) From: Neil Armstrong Date: Mon, 17 Oct 2022 12:23:08 +0200 Subject: [PATCH v2 4/5] dt-bindings: regulators: convert non-smd RPM Regulators bindings to dt-schema MIME-Version: 1.0 Message-Id: <20221005-mdm9615-pinctrl-yaml-v2-4-639fe67a04be@linaro.org> References: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> In-Reply-To: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> To: Lee Jones , Krzysztof Kozlowski , Konrad Dybcio , Andy Gross , Mark Brown , Liam Girdwood , Linus Walleij , Rob Herring , Bjorn Andersson Cc: Krzysztof Kozlowski , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, Neil Armstrong , devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746930074737993049?= X-GMAIL-MSGID: =?utf-8?q?1746930074737993049?= Convert the non-SMD Regulators bindings to dt-schema, the old text based bindings will be deleted later since the RPM bindings are not yet converted. Signed-off-by: Neil Armstrong --- .../bindings/regulator/qcom,ipc-rpm-regulator.yaml | 127 +++++++++++++++++++++ 1 file changed, 127 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,ipc-rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,ipc-rpm-regulator.yaml new file mode 100644 index 000000000000..e18bb8b87c43 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/qcom,ipc-rpm-regulator.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/qcom,ipc-rpm-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: QCOM IPC RPM REGULATOR + +description: + The Qualcomm RPM over IPC regulator is modelled as a subdevice of the RPM. + + Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,ipc-rpm.yaml + for information regarding the RPM node. + + The regulator node houses sub-nodes for each regulator within the device. + Each sub-node is identified using the node's name, with valid values listed + for each of the pmics below. + + For pm8058 l0, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, + l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, s0, s1, s2, s3, s4, + lvs0, lvs1, ncp + + For pm8901 l0, l1, l2, l3, l4, l5, l6, s0, s1, s2, s3, s4, lvs0, lvs1, lvs2, lvs3, + mvs + + For pm8921 s1, s2, s3, s4, s7, s8, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, + l12, l14, l15, l16, l17, l18, l21, l22, l23, l24, l25, l26, l27, l28, + l29, lvs1, lvs2, lvs3, lvs4, lvs5, lvs6, lvs7, usb-switch, hdmi-switch, + ncp + + For pm8018 s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, + l12, l14, lvs1 + + For smb208 s1a, s1b, s2a, s2b + +maintainers: + - Bjorn Andersson + +properties: + compatible: + enum: + - qcom,rpm-pm8058-regulators + - qcom,rpm-pm8901-regulators + - qcom,rpm-pm8921-regulators + - qcom,rpm-pm8018-regulators + - qcom,rpm-smb208-regulators + +patternProperties: + ".*-supply$": + description: Input supply phandle(s) for this node + + "^((s|l|lvs)[0-9]*)|(s[1-2][a-b])|(ncp)|(mvs)|(usb-switch)|(hdmi-switch)$": + description: List of regulators and its properties + $ref: regulator.yaml# + properties: + bias-pull-down: + description: enable pull down of the regulator when inactive + type: boolean + + qcom,switch-mode-frequency: + description: Frequency (Hz) of the switch-mode power supply + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 19200000 + - 9600000 + - 6400000 + - 4800000 + - 3840000 + - 3200000 + - 2740000 + - 2400000 + - 2130000 + - 1920000 + - 1750000 + - 1600000 + - 1480000 + - 1370000 + - 1280000 + - 1200000 + + qcom,force-mode: + description: Indicates that the regulator should be forced to a particular mode + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # QCOM_RPM_FORCE_MODE_NONE do not force any mode + - 1 # QCOM_RPM_FORCE_MODE_LPM force into low power mode + - 2 # QCOM_RPM_FORCE_MODE_HPM force into high power mode + - 3 # QCOM_RPM_FORCE_MODE_AUTO allow regulator to automatically select its own mode + # based on realtime current draw, only for pm8921 smps and ftsmps + + qcom,power-mode-hysteretic: + description: select that the power supply should operate in hysteretic mode, + instead of the default pwm mode + type: boolean + +additionalProperties: false + +required: + - compatible + +examples: + - | + #include + regulators { + compatible = "qcom,rpm-pm8921-regulators"; + vdd_l1_l2_l12_l18-supply = <&pm8921_s4>; + + s1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + + bias-pull-down; + + qcom,switch-mode-frequency = <3200000>; + }; + + pm8921_s4: s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + + qcom,force-mode = ; + }; + }; +... From patchwork Mon Oct 17 10:23:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 3374 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp1369439wrs; Mon, 17 Oct 2022 03:26:32 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5+XzivoJacJuRuS9+QJbjKaoiXUyPs+eYECDF5PPEh3DjcOTa/mlg+mM/qJ4BIAJh3qaAd X-Received: by 2002:a17:902:e552:b0:179:e796:b432 with SMTP id n18-20020a170902e55200b00179e796b432mr11015557plf.21.1666002391862; Mon, 17 Oct 2022 03:26:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666002391; cv=none; d=google.com; s=arc-20160816; b=mevHHYwNWv/hAZ4KFQNzrnbTOx3NuglB9w/gxe9NVuboW7DPS4a3tuCAM6LEcLoQ3h OQhVW655ufzurAXGcqs7eaJQku8tu1vsMCyD3jEGDCQAXLNmQMFHj2dsOwAf/6bceZWw SgN+IRr8sQnNO8ObQxvHLCnx35Pyh81p5Ih6wInzI5y/BxxkprlghFdHQlMJCfkno3Zk DodhsXKqOYbNi3CNZyCxdrlDZWpZcpBajBQiSzupkkgdgquwDCP5x/nSH8fBIj4EaI6O 0ARGX03+x7rJp81NSV3Ou3p7fdSa9R1RV6FMobch9445t8YvxiQV+y2DzoZV2K0wZEXO ncug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=tehVJdn+YAMIW8sLG9rprzziEgXG4Ftde1HFsUXm3BM=; b=UY7QnHE9lyT8rYK1E+sSdqg82mBzkmsUuMunuDyTXL7ZT/eDAimNnyNrSxH8yhHjYI b96EjL1+rkAhh4IyaggiMfwtecmORyeBNmEDl6b1MlZCB0i2keExtD3l/Mk5UGQZ3kA6 8vTgi7Ra4YmdsXdbVeR4FJno/GLEJjol1a+84G/9+u2xSoZww82VMMyRTmKZmhNY66Ue D1AnAdI6x2lT/u0nHTdTOIJ59v0ZaNikiy9frsnwtuvybg1imN2kBHeZjLn+oO9LRm+K T70ulxO/Jvj7xK24I++w3iBk9JUVhywA1QXkUIti9217VwGuyQV3j2CRaslWe0dZzot7 NElA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="YNS/sa5F"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s9-20020a17090302c900b0017f5ea214a8si11881037plk.462.2022.10.17.03.26.17; Mon, 17 Oct 2022 03:26:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="YNS/sa5F"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230200AbiJQKX5 (ORCPT + 99 others); Mon, 17 Oct 2022 06:23:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230086AbiJQKXU (ORCPT ); Mon, 17 Oct 2022 06:23:20 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA15B5FDD1 for ; Mon, 17 Oct 2022 03:23:16 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id a10so17681839wrm.12 for ; Mon, 17 Oct 2022 03:23:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=tehVJdn+YAMIW8sLG9rprzziEgXG4Ftde1HFsUXm3BM=; b=YNS/sa5FYlrEdmuyt1YnX3pWQrHkLlA1LCv/KrF1/dpGANt6DKTxPbF0B+ZGrLEgTg wG+/6VVDLNxAb9p0nV+r00x0bwggUlA7ITbWiUr7U+cYkr0tDsW1Sojf+D0E3ri8NAPV D4d2UMm/5M91+XKlLYR9Xr+cuY46dShojyvkgZknYByPZHJKxdoMgXTVZAB6gqbgmrlM nUEwpXbB6WWurHaYn9dIWP6ewEQfTR6/pJ99e5QCueMEvN3+KWEDwy+yr3L3u5Wztm2z eG2HCBSVxEqliXMcVuewvTyn79iJZ0ifn0vvPpneTxX4XdGSfvuyHS5/GsliFD6icQy2 xztw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tehVJdn+YAMIW8sLG9rprzziEgXG4Ftde1HFsUXm3BM=; b=fVnUYHUFm/eCo0itnrUpbDMFr0mYG7lhk1JCkPEBcgOtvVkN2Ilbbynzi2nEzCZe87 jo/HqLl8ZdrNM2yuO5v80qPzrJp/ck3f6HOQkiJVXW3cIOlA+MtF3iZ0222BHdAs6wzB 0PR6MYCGOj+9rQyXXDQmX5FZ58EP7EkDMmf2cyisTxV+h1IFd9VF+K2+mCrlQHX68Zkb meNR1H1pDaOWoG+PMK4YVhi3jc19AnOlZ+qvq/Z8d/EGCBG4rJR/qTjupza2z8N/cX/5 zsD7ZZ7t2TOqjhqdm8CpPC+7Uuh0vH4ES93Pt7tlVAdJjhM76TUyCfMnkmJ1hjFVqIRM dfuw== X-Gm-Message-State: ACrzQf28krAb3ogMSxgk7Sa3Liub17GHsBHhHg/RjV4Nrh4qJJcmDsHu uqjdqt+GDtTVG5GJa1Ndl+/4iA== X-Received: by 2002:a5d:4c4f:0:b0:22e:6c5b:a4b0 with SMTP id n15-20020a5d4c4f000000b0022e6c5ba4b0mr5881692wrt.574.1666002194823; Mon, 17 Oct 2022 03:23:14 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id t9-20020a05600c198900b003b4fe03c881sm15590707wmq.48.2022.10.17.03.23.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Oct 2022 03:23:14 -0700 (PDT) From: Neil Armstrong Date: Mon, 17 Oct 2022 12:23:09 +0200 Subject: [PATCH v2 5/5] dt-bindings: soc: qcom: convert non-smd RPM bindings to dt-schema MIME-Version: 1.0 Message-Id: <20221005-mdm9615-pinctrl-yaml-v2-5-639fe67a04be@linaro.org> References: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> In-Reply-To: <20221005-mdm9615-pinctrl-yaml-v2-0-639fe67a04be@linaro.org> To: Lee Jones , Krzysztof Kozlowski , Konrad Dybcio , Andy Gross , Mark Brown , Liam Girdwood , Linus Walleij , Rob Herring , Bjorn Andersson Cc: Krzysztof Kozlowski , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, Neil Armstrong , devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746930123968913114?= X-GMAIL-MSGID: =?utf-8?q?1746930123968913114?= Convert the non-SMD RPM node bindings to dt-schema, the old txt bindings are now removed since all bindings were converted. Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/mfd/qcom-rpm.txt | 283 --------------------- .../devicetree/bindings/soc/qcom/qcom,ipc-rpm.yaml | 99 +++++++ 2 files changed, 99 insertions(+), 283 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/qcom-rpm.txt b/Documentation/devicetree/bindings/mfd/qcom-rpm.txt deleted file mode 100644 index b823b8625243..000000000000 --- a/Documentation/devicetree/bindings/mfd/qcom-rpm.txt +++ /dev/null @@ -1,283 +0,0 @@ -Qualcomm Resource Power Manager (RPM) - -This driver is used to interface with the Resource Power Manager (RPM) found in -various Qualcomm platforms. The RPM allows each component in the system to vote -for state of the system resources, such as clocks, regulators and bus -frequencies. - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,rpm-apq8064" - "qcom,rpm-msm8660" - "qcom,rpm-msm8960" - "qcom,rpm-ipq8064" - "qcom,rpm-mdm9615" - -- reg: - Usage: required - Value type: - Definition: base address and size of the RPM's message ram - -- interrupts: - Usage: required - Value type: - Definition: three entries specifying the RPM's: - 1. acknowledgement interrupt - 2. error interrupt - 3. wakeup interrupt - -- interrupt-names: - Usage: required - Value type: - Definition: must be the three strings "ack", "err" and "wakeup", in order - -- qcom,ipc: - Usage: required - Value type: - - Definition: three entries specifying the outgoing ipc bit used for - signaling the RPM: - - phandle to a syscon node representing the apcs registers - - u32 representing offset to the register within the syscon - - u32 representing the ipc bit within the register - - -= SUBNODES - -The RPM exposes resources to its subnodes. The below bindings specify the set -of valid subnodes that can operate on these resources. - -== Regulators - -Regulator nodes are identified by their compatible: - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,rpm-pm8058-regulators" - "qcom,rpm-pm8901-regulators" - "qcom,rpm-pm8921-regulators" - "qcom,rpm-pm8018-regulators" - "qcom,rpm-smb208-regulators" - -- vdd_l0_l1_lvs-supply: -- vdd_l2_l11_l12-supply: -- vdd_l3_l4_l5-supply: -- vdd_l6_l7-supply: -- vdd_l8-supply: -- vdd_l9-supply: -- vdd_l10-supply: -- vdd_l13_l16-supply: -- vdd_l14_l15-supply: -- vdd_l17_l18-supply: -- vdd_l19_l20-supply: -- vdd_l21-supply: -- vdd_l22-supply: -- vdd_l23_l24_l25-supply: -- vdd_ncp-supply: -- vdd_s0-supply: -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: - Usage: optional (pm8058 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- lvs0_in-supply: -- lvs1_in-supply: -- lvs2_in-supply: -- lvs3_in-supply: -- mvs_in-supply: -- vdd_l0-supply: -- vdd_l1-supply: -- vdd_l2-supply: -- vdd_l3-supply: -- vdd_l4-supply: -- vdd_l5-supply: -- vdd_l6-supply: -- vdd_s0-supply: -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s3-supply: -- vdd_s4-supply: - Usage: optional (pm8901 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vdd_l1_l2_l12_l18-supply: -- vdd_l3_l15_l17-supply: -- vdd_l4_l14-supply: -- vdd_l5_l8_l16-supply: -- vdd_l6_l7-supply: -- vdd_l9_l11-supply: -- vdd_l10_l22-supply: -- vdd_l21_l23_l29-supply: -- vdd_l24-supply: -- vdd_l25-supply: -- vdd_l26-supply: -- vdd_l27-supply: -- vdd_l28-supply: -- vdd_ncp-supply: -- vdd_s1-supply: -- vdd_s2-supply: -- vdd_s4-supply: -- vdd_s5-supply: -- vdd_s6-supply: -- vdd_s7-supply: -- vdd_s8-supply: -- vin_5vs-supply: -- vin_lvs1_3_6-supply: -- vin_lvs2-supply: -- vin_lvs4_5_7-supply: - Usage: optional (pm8921 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -- vin_lvs1-supply: -- vdd_l7-supply: -- vdd_l8-supply: -- vdd_l9_l10_l11_l12-supply: - Usage: optional (pm8018 only) - Value type: - Definition: reference to regulator supplying the input pin, as - described in the data sheet - -The regulator node houses sub-nodes for each regulator within the device. Each -sub-node is identified using the node's name, with valid values listed for each -of the pmics below. - -pm8058: - l0, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, - l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, s0, s1, s2, s3, s4, - lvs0, lvs1, ncp - -pm8901: - l0, l1, l2, l3, l4, l5, l6, s0, s1, s2, s3, s4, lvs0, lvs1, lvs2, lvs3, - mvs - -pm8921: - s1, s2, s3, s4, s7, s8, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, - l12, l14, l15, l16, l17, l18, l21, l22, l23, l24, l25, l26, l27, l28, - l29, lvs1, lvs2, lvs3, lvs4, lvs5, lvs6, lvs7, usb-switch, hdmi-switch, - ncp - -pm8018: - s1, s2, s3, s4, s5, , l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, - l12, l14, lvs1 - -smb208: - s1a, s1b, s2a, s2b - -The content of each sub-node is defined by the standard binding for regulators - -see regulator.txt - with additional custom properties described below: - -=== Switch-mode Power Supply regulator custom properties - -- bias-pull-down: - Usage: optional - Value type: - Definition: enable pull down of the regulator when inactive - -- qcom,switch-mode-frequency: - Usage: required - Value type: - Definition: Frequency (Hz) of the switch-mode power supply; - must be one of: - 19200000, 9600000, 6400000, 4800000, 3840000, 3200000, - 2740000, 2400000, 2130000, 1920000, 1750000, 1600000, - 1480000, 1370000, 1280000, 1200000 - -- qcom,force-mode: - Usage: optional (default if no other qcom,force-mode is specified) - Value type: - Definition: indicates that the regulator should be forced to a - particular mode, valid values are: - QCOM_RPM_FORCE_MODE_NONE - do not force any mode - QCOM_RPM_FORCE_MODE_LPM - force into low power mode - QCOM_RPM_FORCE_MODE_HPM - force into high power mode - QCOM_RPM_FORCE_MODE_AUTO - allow regulator to automatically - select its own mode based on - realtime current draw, only for: - pm8921 smps and ftsmps - -- qcom,power-mode-hysteretic: - Usage: optional - Value type: - Definition: select that the power supply should operate in hysteretic - mode, instead of the default pwm mode - -=== Low-dropout regulator custom properties - -- bias-pull-down: - Usage: optional - Value type: - Definition: enable pull down of the regulator when inactive - -- qcom,force-mode: - Usage: optional - Value type: - Definition: indicates that the regulator should not be forced to any - particular mode, valid values are: - QCOM_RPM_FORCE_MODE_NONE - do not force any mode - QCOM_RPM_FORCE_MODE_LPM - force into low power mode - QCOM_RPM_FORCE_MODE_HPM - force into high power mode - QCOM_RPM_FORCE_MODE_BYPASS - set regulator to use bypass - mode, i.e. to act as a switch - and not regulate, only for: - pm8921 pldo, nldo and nldo1200 - -=== Negative Charge Pump custom properties - -- qcom,switch-mode-frequency: - Usage: required - Value type: - Definition: Frequency (Hz) of the switch mode power supply; - must be one of: - 19200000, 9600000, 6400000, 4800000, 3840000, 3200000, - 2740000, 2400000, 2130000, 1920000, 1750000, 1600000, - 1480000, 1370000, 1280000, 1200000 - -= EXAMPLE - - #include - - rpm@108000 { - compatible = "qcom,rpm-msm8960"; - reg = <0x108000 0x1000>; - qcom,ipc = <&apcs 0x8 2>; - - interrupts = <0 19 0>, <0 21 0>, <0 22 0>; - interrupt-names = "ack", "err", "wakeup"; - - regulators { - compatible = "qcom,rpm-pm8921-regulators"; - vdd_l1_l2_l12_l18-supply = <&pm8921_s4>; - - s1 { - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - - bias-pull-down; - - qcom,switch-mode-frequency = <3200000>; - }; - - pm8921_s4: s4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - qcom,switch-mode-frequency = <1600000>; - bias-pull-down; - - qcom,force-mode = ; - }; - }; - }; - diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,ipc-rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,ipc-rpm.yaml new file mode 100644 index 000000000000..4e9df94ecd44 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,ipc-rpm.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/qcom/qcom,ipc-rpm.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Resource Power Manager (RPM) over IPC + +description: | + This driver is used to interface with the Resource Power Manager (RPM) found + in various Qualcomm platforms. The RPM allows each component in the system + to vote for state of the system resources, such as clocks, regulators and bus + frequencies. + +maintainers: + - Bjorn Andersson + +properties: + compatible: + enum: + - qcom,rpm-apq8064 + - qcom,rpm-msm8660 + - qcom,rpm-msm8960 + - qcom,rpm-ipq8064 + - qcom,rpm-mdm9615 + + reg: true + + interrupts: + minItems: 3 + + interrupt-names: + items: + - const: ack + - const: err + - const: wakeup + + qcom,ipc: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to a syscon node representing the APCS registers + - description: u32 representing offset to the register within the syscon + - description: u32 representing the ipc bit within the register + description: + Three entries specifying the outgoing ipc bit used for signaling the RPM. + +patternProperties: + "(regulators|-regulators)$": + type: object + $ref: /schemas/regulator/qcom,ipc-rpm-regulator.yaml# + +required: + - compatible + - reg + - interrupts + - interrupt-names + - qcom,ipc + +additionalProperties: false + +examples: + - | + #include + #include + #include + + rpm@108000 { + compatible = "qcom,rpm-msm8960"; + reg = <0x108000 0x1000>; + qcom,ipc = <&apcs 0x8 2>; + + interrupts = , , ; + interrupt-names = "ack", "err", "wakeup"; + + regulators { + compatible = "qcom,rpm-pm8921-regulators"; + vdd_l1_l2_l12_l18-supply = <&pm8921_s4>; + + s1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + + bias-pull-down; + + qcom,switch-mode-frequency = <3200000>; + }; + + pm8921_s4: s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + + qcom,force-mode = ; + }; + }; + };