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Tue, 07 Feb 2023 14:30:05 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 317EU1Mc002892; Tue, 7 Feb 2023 14:30:01 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3nhgeke6d4-1; Tue, 07 Feb 2023 14:30:01 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 317EU1Gn002886; Tue, 7 Feb 2023 14:30:01 GMT Received: from kalyant-linux.qualcomm.com (kalyant-linux.qualcomm.com [10.204.66.210]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 317EU0ci002882; Tue, 07 Feb 2023 14:30:01 +0000 Received: by kalyant-linux.qualcomm.com (Postfix, from userid 94428) id 24F1F4BE0; Tue, 7 Feb 2023 06:30:00 -0800 (PST) From: Kalyan Thota To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Kalyan Thota , linux-kernel@vger.kernel.org, robdclark@chromium.org, dianders@chromium.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, dmitry.baryshkov@linaro.org, quic_abhinavk@quicinc.com, marijn.suijten@somainline.org Subject: [PATCH v2 1/4] drm/msm/dpu: clear DSPP reservations in rm release Date: Tue, 7 Feb 2023 06:29:53 -0800 Message-Id: <1675780196-3076-2-git-send-email-quic_kalyant@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1675780196-3076-1-git-send-email-quic_kalyant@quicinc.com> References: <1675780196-3076-1-git-send-email-quic_kalyant@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 7ZXjkCzfrYQ7Nflp3MINy7ELbYlx01C3 X-Proofpoint-ORIG-GUID: 7ZXjkCzfrYQ7Nflp3MINy7ELbYlx01C3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-07_06,2023-02-06_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 clxscore=1015 phishscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 mlxlogscore=762 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302070129 X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757183250642102123?= X-GMAIL-MSGID: =?utf-8?q?1757183250642102123?= Clear DSPP reservations from the global state during rm release Fixes: e47616df008b ("drm/msm/dpu: add support for color processing blocks in dpu driver") Signed-off-by: Kalyan Thota Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index 73b3442..718ea0a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -572,6 +572,8 @@ void dpu_rm_release(struct dpu_global_state *global_state, ARRAY_SIZE(global_state->ctl_to_enc_id), enc->base.id); _dpu_rm_clear_mapping(global_state->dsc_to_enc_id, ARRAY_SIZE(global_state->dsc_to_enc_id), enc->base.id); + _dpu_rm_clear_mapping(global_state->dspp_to_enc_id, + ARRAY_SIZE(global_state->dspp_to_enc_id), enc->base.id); } int dpu_rm_reserve( From patchwork Tue Feb 7 14:29:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalyan Thota X-Patchwork-Id: 53947 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2388:b0:96:219d:e725 with SMTP id i8csp4045605dyf; Tue, 7 Feb 2023 06:34:32 -0800 (PST) X-Google-Smtp-Source: AK7set/ikAGWzJV4b2qsPKbB+Lp5IGJDSvNqSZXL5mcaT4AZ7RYp6BTvLk2AoE7WyrPyR5EIMYEq X-Received: by 2002:a17:902:dac3:b0:196:845f:e221 with SMTP id q3-20020a170902dac300b00196845fe221mr3991363plx.15.1675780472422; Tue, 07 Feb 2023 06:34:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675780472; cv=none; d=google.com; s=arc-20160816; b=hUWlOlJn2zU0/wLA2YJlk8ecc79JIJsi2XC7LNTEKkNcxos9n0fHED0aiCEJnTIhEz zM8UdZCkVin8+eqy3dz9nI/GV19bRdef0w/k+rljtZEh/eJ94YmwkeUBSX8QX9MWbzG9 5Gq28PYWvff+8andHAFmHEH2oC9xkVXu9/UF/WLyq10v6etLgMYMpvdrHliJ3JjExEHW iOXOBkroTvuSua0XlTW4aHY+vuqvAdGBcl2yx+ACm9+tsUSSAo5a1x0iI4/1uzvBIeE/ hXDJi3qEyTEueeHwvH2I4KDQn+a7dlwl4D5fJxK71RfNCy0QfnUJBBEKAxrMrshMQH4t /UZg== ARC-Message-Signature: i=1; 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Tue, 07 Feb 2023 14:30:06 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 317EU2pl003102; Tue, 7 Feb 2023 14:30:02 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3nhgeke6e1-1; Tue, 07 Feb 2023 14:30:02 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 317EU1Gp002886; Tue, 7 Feb 2023 14:30:02 GMT Received: from kalyant-linux.qualcomm.com (kalyant-linux.qualcomm.com [10.204.66.210]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 317EU2NZ003066; Tue, 07 Feb 2023 14:30:02 +0000 Received: by kalyant-linux.qualcomm.com (Postfix, from userid 94428) id 859C94BDD; Tue, 7 Feb 2023 06:30:01 -0800 (PST) From: Kalyan Thota To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Kalyan Thota , linux-kernel@vger.kernel.org, robdclark@chromium.org, dianders@chromium.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, dmitry.baryshkov@linaro.org, quic_abhinavk@quicinc.com, marijn.suijten@somainline.org Subject: [PATCH v2 2/4] drm/msm/dpu: add DSPPs into reservation upon a CTM request Date: Tue, 7 Feb 2023 06:29:54 -0800 Message-Id: <1675780196-3076-3-git-send-email-quic_kalyant@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1675780196-3076-1-git-send-email-quic_kalyant@quicinc.com> References: <1675780196-3076-1-git-send-email-quic_kalyant@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: xDMnplkPLoUY88LFctKGIDNn-ko4foUg X-Proofpoint-ORIG-GUID: xDMnplkPLoUY88LFctKGIDNn-ko4foUg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-07_06,2023-02-06_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 malwarescore=0 spamscore=0 mlxlogscore=666 adultscore=0 priorityscore=1501 phishscore=0 impostorscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302070129 X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757183184887720268?= X-GMAIL-MSGID: =?utf-8?q?1757183184887720268?= Add DSPP blocks into the topology for reservation, if there is a CTM request for that composition. Signed-off-by: Kalyan Thota Reviewed-by: Dmitry Baryshkov --- Changes in v1: - Minor nits (Dmitry) Changes in v2: - Populate DSPPs into the reservation only if CTM is requested (Dmitry) --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 9c6817b..46d2a5c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -545,7 +545,8 @@ bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc) static struct msm_display_topology dpu_encoder_get_topology( struct dpu_encoder_virt *dpu_enc, struct dpu_kms *dpu_kms, - struct drm_display_mode *mode) + struct drm_display_mode *mode, + struct drm_crtc_state *crtc_state) { struct msm_display_topology topology = {0}; int i, intf_count = 0; @@ -563,8 +564,7 @@ static struct msm_display_topology dpu_encoder_get_topology( * 1 LM, 1 INTF * 2 LM, 1 INTF (stream merge to support high resolution interfaces) * - * Adding color blocks only to primary interface if available in - * sufficient number + * Add dspps to the reservation requirements if ctm is requested */ if (intf_count == 2) topology.num_lm = 2; @@ -573,11 +573,8 @@ static struct msm_display_topology dpu_encoder_get_topology( else topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1; - if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) { - if (dpu_kms->catalog->dspp && - (dpu_kms->catalog->dspp_count >= topology.num_lm)) - topology.num_dspp = topology.num_lm; - } + if (crtc_state->ctm) + topology.num_dspp = topology.num_lm; topology.num_enc = 0; topology.num_intf = intf_count; @@ -643,7 +640,7 @@ static int dpu_encoder_virt_atomic_check( } } - topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode); + topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode, crtc_state); /* Reserve dynamic resources now. */ if (!ret) { From patchwork Tue Feb 7 14:29:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalyan Thota X-Patchwork-Id: 53950 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2388:b0:96:219d:e725 with SMTP id i8csp4046527dyf; Tue, 7 Feb 2023 06:35:45 -0800 (PST) X-Google-Smtp-Source: AK7set953omTwvPk9wSeJi5+4RBl1JXEMd+CT7SV63a5Ex0ABzURx90nl9NtupXPAX7U/ik4G94V X-Received: by 2002:a17:906:528d:b0:8aa:8b52:5914 with SMTP id c13-20020a170906528d00b008aa8b525914mr1581201ejm.53.1675780545388; Tue, 07 Feb 2023 06:35:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675780545; cv=none; d=google.com; s=arc-20160816; b=gho9n0g0Kv7g1TfNPw9BksLEI+o/Wd7fZpggUMlD1Ea+Sm/t1PyIrJzNgjGZUFef/a i6K9GLPgRcELszjFLmC6Rpy+hJrXK/hXvFD3ADBRWJPV8ywlN3z8Ls0Nf+DmVgjgAqyz ls0piCUl4OUNz2NWUf+Hjtmvr1uqKE0aD5jvzieasvD1LbIJSZ2hJ5mKHvqSoIZtYIH7 u0EXwQWbHd6MpoOtFJ/yWKqWSo6nykX74wPMg/2q+wH0wG1sGkwxRJHQUZu9MI7Jh0BZ CqFCstZa1aNcyQXUPALek/hbl/OzLhzyepbEfyZtHPtiltBg6fRzI7Z8tfCZ5uAbrDOo xvwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=NS90slSACWJ0/WLpkNKGa2YnsV2TaoWISg4Fks6F5M4=; b=fimJ2n9Quti1gHfKzXAeYbI86whMZjJyqXQrL8aF8r4L8EUks2Osnxv+yrGbS57Nxi GTzTD9AgvaXXIx2OT6LPX/GfeUivJikjGtAXhwGJ1GJ8NuLDEhNcBq7CyO7wy5McDvOF jtdKYijZHwdQjU/QlVihhuHg2WF0mN1H/+qn5OgWH8Zpc0vFO5EbIIH4sXzN2+DEnjwM rAVu8XfHc7zAT4lYuASRaQt7+rVW5W+dqwGiKPCyRQm2NWbhWHQpxnxzU3qULVQvpokd sYlygcKX43JSAwzaa4TQVKtX5FEGgkoB6QcLG9v0AhH8GWwgiljQ2R4EhNOf+G3hEUal t2Pw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=drSl5OGY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Tue, 07 Feb 2023 14:30:08 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 317EU48x003184; Tue, 7 Feb 2023 14:30:04 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3nhgeke6f5-1; Tue, 07 Feb 2023 14:30:04 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 317EU48p003164; Tue, 7 Feb 2023 14:30:04 GMT Received: from kalyant-linux.qualcomm.com (kalyant-linux.qualcomm.com [10.204.66.210]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 317EU4tx003148; Tue, 07 Feb 2023 14:30:04 +0000 Received: by kalyant-linux.qualcomm.com (Postfix, from userid 94428) id 80FDF4BE0; Tue, 7 Feb 2023 06:30:02 -0800 (PST) From: Kalyan Thota To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Kalyan Thota , linux-kernel@vger.kernel.org, robdclark@chromium.org, dianders@chromium.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, dmitry.baryshkov@linaro.org, quic_abhinavk@quicinc.com, marijn.suijten@somainline.org Subject: [PATCH v2 3/4] drm/msm/dpu: avoid unnecessary check in DPU reservations Date: Tue, 7 Feb 2023 06:29:55 -0800 Message-Id: <1675780196-3076-4-git-send-email-quic_kalyant@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1675780196-3076-1-git-send-email-quic_kalyant@quicinc.com> References: <1675780196-3076-1-git-send-email-quic_kalyant@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: BXMRNY_kPOrCf1ZjiQC0ETQMhboBheCy X-Proofpoint-GUID: BXMRNY_kPOrCf1ZjiQC0ETQMhboBheCy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-07_06,2023-02-06_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 mlxlogscore=858 phishscore=0 adultscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 suspectscore=0 spamscore=0 lowpriorityscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302070129 X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757183260847118190?= X-GMAIL-MSGID: =?utf-8?q?1757183260847118190?= Return immediately on failure, this will make dpu reservations part look cleaner. Signed-off-by: Kalyan Thota Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 46d2a5c..3920efd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -636,25 +636,22 @@ static int dpu_encoder_virt_atomic_check( if (ret) { DPU_ERROR_ENC(dpu_enc, "mode unsupported, phys idx %d\n", i); - break; + return ret; } } topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode, crtc_state); - /* Reserve dynamic resources now. */ - if (!ret) { - /* - * Release and Allocate resources on every modeset - * Dont allocate when active is false. - */ - if (drm_atomic_crtc_needs_modeset(crtc_state)) { - dpu_rm_release(global_state, drm_enc); + /* + * Release and Allocate resources on every modeset + * Dont allocate when active is false. + */ + if (drm_atomic_crtc_needs_modeset(crtc_state)) { + dpu_rm_release(global_state, drm_enc); - if (!crtc_state->active_changed || crtc_state->active) - ret = dpu_rm_reserve(&dpu_kms->rm, global_state, - drm_enc, crtc_state, topology); - } + if (!crtc_state->active_changed || crtc_state->active) + ret = dpu_rm_reserve(&dpu_kms->rm, global_state, + drm_enc, crtc_state, topology); } trace_dpu_enc_atomic_check_flags(DRMID(drm_enc), adj_mode->flags); From patchwork Tue Feb 7 14:29:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalyan Thota X-Patchwork-Id: 53951 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:7300:2388:b0:96:219d:e725 with SMTP id i8csp4046529dyf; Tue, 7 Feb 2023 06:35:45 -0800 (PST) X-Google-Smtp-Source: AK7set/tXPjp0yiJKlShDRAf638ysNUc058X9hEIQqCXv2I6zmqftlyz3yGCoMAXRE4ge4xRHAPm X-Received: by 2002:a50:cd5d:0:b0:4a2:358f:52b6 with SMTP id d29-20020a50cd5d000000b004a2358f52b6mr4105287edj.7.1675780545690; Tue, 07 Feb 2023 06:35:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675780545; cv=none; d=google.com; s=arc-20160816; b=kEmDNa8F71+hJrEB+JYAGzZWJGQ+kB8w/hATFjcBElcFTIn6d08vqnjrkDykM4ZzWr 7WiyhpVd1Qgjt3T1/EwWd8sxc+uB1K06oLtQe9mGNaPGTLCd+dU2GPKLrQ2bzOgia6fh keB30poJeZMD9CDtEMzSx64IZhP2wvP9UYm2IZ/0+HplDfKNL/iks4/pS8VkpjOfzTko NeFBfsaE6oyYvdzVWrHom5vDWijF5BHpXPVP7Y2SWG+VgnrUH5kKbwCUhAXw7rtsU+Tx lG4Ilf8WdKS5BHtrv1Yaw+e52IM1SPfUvIC4jgYfguJGCIdNAYROJujzZi/QcbS4J7CV XeKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=GwcZMBJ+t9sh8tBQ7PFQ+Eh5/Zaszc1egC6gMYlmjmk=; b=RDhAZNRRvpQlYPDqO+Om0g22zqwLHjdGpKMZPfNHzyZMHyjYrqvJg9kEU4ECWa8dXJ OHI+Vi34/G06YVzYSApO4xu5zN/CWad+WNQIldNGBqEvNqAo0Q2swTsyJRinnyXlbcRP bD9dZ6NrehNTWXjk/OcS10/TtpTIezJbYzUFdKmcE8XsLC1jmj/aX9GWJSMwbeGBX9w6 MkqVgIwNrT7zVdqxzl9EKMiUBq/Oosm86C8C8c3LCSnOme07zEQSIT0vxydKXITFQc7i i1yrVjjHRo8/Wi8tL7OQ2OvtsxThWm3IojDJZ5jMcXeXpjWXnafjN9CissUhlp1DM+mv KBcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=NOzW+4ot; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. 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Tue, 07 Feb 2023 14:30:09 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 317EU40p003191; Tue, 7 Feb 2023 14:30:04 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3nhgeke6f8-1; Tue, 07 Feb 2023 14:30:04 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 317EU4bO003174; Tue, 7 Feb 2023 14:30:04 GMT Received: from kalyant-linux.qualcomm.com (kalyant-linux.qualcomm.com [10.204.66.210]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 317EU44Z003162; Tue, 07 Feb 2023 14:30:04 +0000 Received: by kalyant-linux.qualcomm.com (Postfix, from userid 94428) id 8B29B4BDD; Tue, 7 Feb 2023 06:30:03 -0800 (PST) From: Kalyan Thota To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Kalyan Thota , linux-kernel@vger.kernel.org, robdclark@chromium.org, dianders@chromium.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, dmitry.baryshkov@linaro.org, quic_abhinavk@quicinc.com, marijn.suijten@somainline.org Subject: [PATCH v2 4/4] drm/msm/dpu: reserve the resources on topology change Date: Tue, 7 Feb 2023 06:29:56 -0800 Message-Id: <1675780196-3076-5-git-send-email-quic_kalyant@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1675780196-3076-1-git-send-email-quic_kalyant@quicinc.com> References: <1675780196-3076-1-git-send-email-quic_kalyant@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 80fGcj61k9ziaqQf2A0Y29FZpsBY9Nno X-Proofpoint-ORIG-GUID: 80fGcj61k9ziaqQf2A0Y29FZpsBY9Nno X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-07_06,2023-02-06_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 suspectscore=0 phishscore=0 priorityscore=1501 mlxlogscore=999 adultscore=0 impostorscore=0 mlxscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302070129 X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757183261450780034?= X-GMAIL-MSGID: =?utf-8?q?1757183261450780034?= Some features like CTM can be enabled dynamically. Release and reserve the DPU resources whenever a topology change occurs such that required hw blocks are allocated appropriately. Signed-off-by: Kalyan Thota --- Changes in v1: - Avoid mode_set call directly (Dmitry) Changes in v2: - Minor nits (Dmitry) --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 ++ drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 27 ++++++++++++++++++++++----- 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h index 539b68b..85bd5645 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h @@ -204,6 +204,7 @@ struct dpu_crtc { * @hw_ctls : List of active ctl paths * @crc_source : CRC source * @crc_frame_skip_count: Number of frames skipped before getting CRC + * @ctm_enabled : Cached color management enablement state */ struct dpu_crtc_state { struct drm_crtc_state base; @@ -225,6 +226,7 @@ struct dpu_crtc_state { enum dpu_crtc_crc_source crc_source; int crc_frame_skip_count; + bool ctm_enabled; }; #define to_dpu_crtc_state(x) \ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 3920efd..7bb4840 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -217,6 +217,22 @@ static u32 dither_matrix[DITHER_MATRIX_SZ] = { 15, 7, 13, 5, 3, 11, 1, 9, 12, 4, 14, 6, 0, 8, 2, 10 }; +static bool _dpu_enc_is_dspp_changed(struct drm_crtc_state *crtc_state, + struct msm_display_topology topology) +{ + struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc_state); + + if (drm_atomic_crtc_needs_modeset(crtc_state)) + return true; + + if ((cstate->ctm_enabled && !topology.num_dspp) || + (!cstate->ctm_enabled && topology.num_dspp)) { + crtc_state->mode_changed = true; + return true; + } + + return false; +} bool dpu_encoder_is_widebus_enabled(const struct drm_encoder *drm_enc) { @@ -642,14 +658,15 @@ static int dpu_encoder_virt_atomic_check( topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode, crtc_state); + _dpu_enc_is_dspp_changed(crtc_state, topology); + /* * Release and Allocate resources on every modeset - * Dont allocate when active is false. */ if (drm_atomic_crtc_needs_modeset(crtc_state)) { dpu_rm_release(global_state, drm_enc); - if (!crtc_state->active_changed || crtc_state->active) + if (crtc_state->enable) ret = dpu_rm_reserve(&dpu_kms->rm, global_state, drm_enc, crtc_state, topology); } @@ -1022,7 +1039,7 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc, struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC]; struct dpu_hw_blk *hw_dspp[MAX_CHANNELS_PER_ENC] = { NULL }; struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC]; - int num_lm, num_ctl, num_pp, num_dsc; + int num_lm, num_ctl, num_pp, num_dsc, num_dspp; unsigned int dsc_mask = 0; int i; @@ -1053,7 +1070,7 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc, drm_enc->base.id, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl)); num_lm = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, drm_enc->base.id, DPU_HW_BLK_LM, hw_lm, ARRAY_SIZE(hw_lm)); - dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, + num_dspp = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, drm_enc->base.id, DPU_HW_BLK_DSPP, hw_dspp, ARRAY_SIZE(hw_dspp)); @@ -1084,7 +1101,7 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc, } cstate->num_mixers = num_lm; - + cstate->ctm_enabled = !!num_dspp; dpu_enc->connector = conn_state->connector; for (i = 0; i < dpu_enc->num_phys_encs; i++) {